JPH06291639A - Terminating set for signal line in integrated circuit - Google Patents

Abstract

PURPOSE: To always obtain an appropriate resistance value that is needed for termination of a signal line of an integrated circuit and to compensate the fluctuation of an integrated circuit process. CONSTITUTION: A MOSFET resistance circuit network 201 is formed by MOSFET resistance 203 to 215 which are parallel and are connected between the signal line of an integrated circuit and a signal ground. NAND gates 227 to 237 are connected to the gates of the resistance 205 to 215, and the continuity or non continuity of the resistance 205 to 215 are controlled in response to a 'DRV' signal of the gates 227 and 237 and logic '1' or '0' of 'R0' to 'R5' signals. This varies a parallel synthetic conductive resistance value of the network 201 and makes the effective resistance value of the network 201 approach the impedance of a signal line.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to integrated circuit design,
And, more particularly, it relates to a signal line terminating device in an integrated circuit network for performing chip impedance matching used in a high speed line receiver.

[0002]

BACKGROUND OF THE INVENTION Computer speed has increased dramatically over the last decade. Computer clock speed is 10
Approaching 0 MHz, there is no longer a clear distinction between what is digital and what is analog. At these speeds, digital signals and lines must be treated as high speed transmitted signals and lines.

Each clock and data line must be designed with the same care as used in the design of analog transmission networks. That is, the source impedance, line impedance, and termination impedance must be matched to prevent undesired phenomena such as line ringing. Line ringing is the result of the wavefront hitting the impedance anomaly and reflecting back towards the signal source. Interactions between the reflected wave and the original wave can have deleterious consequences such as voltage undershoot or overshoot that can damage the integrated circuit. The interaction between the waves may also add delayed or multiple signals to the integrated circuit connected to the line, causing seemingly random errors in the associated circuit.

To prevent line ringing and its associated problems, high speed computer lines are designed with great care so that the traces on a printed circuit board (PCB) look like transmission lines. That is, the PCB traces are designed and configured to have a particular impedance. Similarly P
Devices that drive signals on CB traces are typically designed and formed such that the transistors in an integrated circuit (IC) have the same impedance as the PCB trace. The signal receiving device is also designed to have an impedance that matches the line impedance.

Designing a receiver to have the desired impedance is problematic. Real-world transistors at the receiving end rarely have an inherent impedance that conveniently matches the PCB trace impedance. Therefore, some kind of remedy is needed to minimize the impedance mismatch. To solve this problem, the use of an external resistor is often tried, where the external resistor is placed close to the receiving integrated circuit, and the resistor has the desired resistance value to match the trace impedance. To be selected.

[0006]

The external resistance matching technique is
It is not desirable because the resistors occupy the real estate of the PCB. The signal path from the resistor to the actual receiving transistor in the integrated circuit is also not effectively terminated. The preferred termination method is to place a resistor of appropriate value at the input junction of the receiving transistor in the integrated circuit. This approach provides the most effective signal line termination, while requiring only a minimum chip real estate.

On-chip termination resistor solutions are ideal if the process utilized to fabricate the integrated circuit is complete. However, in reality, the manufacturing process is not perfect, and the terminating resistance has a variation in value of approximately 2 to 1. For example, a termination resistor designed to have a resistance of 50 ohms may have a real value of 50 ohms to 25 ohms. Due to the variable nature of integrated circuit processes, resistance values tend to decrease rather than increase. This wide variation in actual resistance is
Inevitably, the signal line is not properly terminated and causes the above problem.

An industrial need is to provide an apparatus and method for terminating a signal line in a receiving transistor and compensating for variations in integrated circuit processes so that the termination is always at the proper value.

[0009]

The present invention provides a signal line termination in an integrated circuit to compensate for resistance variations due to process variations or other effects. This is
This is accomplished by using multiple resistors of different values and programming them in combination to always provide the proper resistance required for the termination of the signal line. These resistors are designed as part of the IC and are located near the receiving transistor.

Each individual resistor consists of a MOSFET operating in the triode (linear) region. MOSFE
The T resistors are connected in parallel so that each is connected from the high speed signal line to ground. To control this resistance, digital control lines are used to make or break the resistance. By controlling which resistor is conducting, the effective resistance of the resistor network can be adjusted as needed. Variations in the individual values of resistance are therefore compensated by adding more resistance in parallel until the desired resistance value is achieved.

[0011]

The resistor network is controlled by comparing the resistance value of the external resistor with the output of an on-chip digital-to-analog converter (hereinafter referred to as D / A). This D / A converter uses the same MOSFET resistor network as the network used to terminate the high speed signal line, and both the D / A resistor network and the termination network are the same digital line. Controlled by. Therefore, when the D / A is adjusted to match the external reference resistance, the termination network is adjusted at the same time and approaches the resistance of the external reference resistance. By selecting the external reference resistor to have the desired termination resistance value, the resistance value of the on-chip MOSFET resistance termination network is controlled to properly terminate the high speed signal line.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 shows a simplified embodiment of the invention in which the individual resistors are selectively placed in parallel to achieve a particular input impedance. In order to probe the receiving transistor 101 and achieve an input impedance Z _in of 50 ohms, the resistor network 103 is adjusted such that the effective resistance value of the parallel resistors is 50 ohms. In the simple case shown, all switches 105-
117 is closed and therefore all resistors 119
If -131 is connected in parallel, the combined resistance is approximately 50 ohms. This means that resistors 119-13
1 and 100 ohms, 200 ohms, 400 ohms, 800 ohms, 1600 ohms, 3200 ohms and 6400 ohms, respectively, because the effective parallel resistance is approximately 50 ohms, as is well known in the art. Resistor network 10
When 3 is connected to the input terminal 133 of the receiving transistor 101, the input impedance Z _in is about 50 ohms, assuming that the receiving transistor has an inherently high input resistance like a field effect transistor (FET). is there. Therefore, if each resistor 119-131 has exactly the right resistance value, such as 100 ohms, then closing all switches 105-117 will achieve the desired input impedance Z _in of 50 ohms.

Resistors 119-13 due to process variations.
If 1 is not the designed resistance value, various resistor combinations are required to achieve the desired input impedance. For example, if the resistance is half of its design value,
Its parallel combination yields an effective input impedance of 25 ohms, which is too low. Therefore, if different combinations are required and the resistance is half the design value, 10
Since its design value of 0 ohms is 50 ohms, which is actually the desired input impedance, only resistor 119 is needed. An alternative solution consists in combining all the resistors except resistor 119 in parallel to achieve an effective input resistance value of 50 ohms.

If the process variation results in a resistance value between the design value and half the design value, the resistors 119-131 are
Appropriate combinations must be made to achieve the desired input impedance. Of course, it may not be possible to exactly match the desired input impedance to a given resistance value, and therefore the resistor combination closest to the desired value must be used. The use of more resistors in the resistor network allows the network to be matched closer to the desired input impedance.
However, in practice the physical space used by resistors and control logic (not shown) limits the number of resistors used.

FIG. 2 shows a preferred embodiment of the MOSFET resistor network according to the present invention. Metal oxide silicon field effect transistor (hereinafter referred to as MOSFET)
Are used as resistors to form a resistor network 201. MOSFETs that act like resistors are well known to those skilled in the art and are achieved by operating the MOSFETs in the triode (linear) region. The conduction resistance value of the MOSFET is proportional to the channel length of the MOSFET. Therefore, the MOSFET can be designed to have a specific conduction resistance value by configuring the MOSFET with a specific channel length within the manufacturing process tolerance.

Each MOSFET resistor 203-21
5 is designed to have a specific conduction resistance value. If the MOSFET resistors have a conduction resistance value as described in connection with FIG. 1, the resistance value of the MOSFET resistance network will be all MOSFET resistances 203-215.
When turned on, it will be 50 ohms. For example, if the MOSFET resistor 215 has a resistance value of 100 ohms, the MOSFET resistor 213 has a resistance value of 200 ohms, and so on, the effective resistance value of the MOSFET resistor network 201 will be 50 ohms.

If, as a result of variations in the process used to construct the MOSFET, the conduction resistance is half the design value (the MOSFET has a resistance of 50 ohms, etc.), then the MOSFET resistor 203, as described above. -21
3 can conduct while MOSFET resistor 215 cuts off,
This causes the effective resistance of the MOSFET resistor network 201 to be 50 ohms. All MOSFETs
The MOSFET resistor 203 may be configured to always conduct, since the MOSFET resistor 203 conducts if the resistor has or has a design value less than that design value. It simplifies the control logic (not shown) used to control the circuitry.

The gate 217 of the MOSFET resistor 215 has a NAND gate 2 of four transistors 219-225.
27 is connected. MOSFET resistors 205-21
The third gate is also connected to NAND gates 229 to 237 having the same configuration as the NAND gate 227. MOSFET
-The construction and operation of the NAND gate is well known in the art, and the book "CMOS" by Neil Weste and Kamran Eshraghian.
VLSI Design Principles (Principles of CMOS VLSIDesig
n) '' Addison-Wesley publis
hing House) Published by publisher, Copyright 1985 10, 11
And page 12. The purpose of the NAND gate is to control the MOSFET 217 by controlling the gate 217 in response to two signals "DRV" and "R0".
To turn on or off.

When both "DRV" and "R0" are high (logic 1), MOSFET resistor 215 conducts. When either "DRV" or "R0" is low level (logic 0), MOSFET resistor 215 is cut off. MOSFET resistor 213, except that each has its own "Rx" signal instead of the "R0" signal used to control MOSFET resistor 215, where "x" is "1-5". -205 is M
It has a NAND gate to control them as described for OSFET resistor 215. MOSFET resistor 20
3 is controlled by two transistors 239 and 241 which, when the "DRV" signal is high (logic 1), turn on the MOSFET resistor 203 and turn it off.

The "DRV" signal applies to all MOSFETs.
This is a signal that enables conduction of the resistors 203 to 215. This is useful when the driver transistor is connected with the receiving transistor to the MOSFET resistor network, such as when using the receiver / driver with bidirectional signal lines. The "DRV" signal is a MOSFET when the driver transistor is driving the signal line.
Disable the resistor network to prevent unnecessary wire loading. Conversely, when the receiving transistor is operating, "DRV"
The signal enables the MOSFET resistor network and provides the appropriate line termination impedance.

The "Rx" signal enables a particular MOSFET resistor. For example, if "R0" and "R5" are at a high level (logic 1), MOSFET resistors 205 and 215
However, assuming that the "DRV" signal is also at a high level (logic 1), it is not possible to switch by the "Rx" signal.
Enabled with T-resistor 203. This method of MOSFET control provides a digital approximation of the desired resistance value using 6 bits of data (R0-R5).

FIG. 3 illustrates a preferred embodiment of the present invention in which all MOSFET resistor networks control the slave resistor network to approximate the desired resistance value.
A reference resistor network is used. Transistors 301, 3
03 and 305 form a current mirror so that the current I _ref flowing through the transistor 301 is a mirror image (same) of the current flowing through the transistors 303 and 305. Current from transistor 303 flows through reference resistor 307, which is external to the integrated circuit including all of the rest of the circuit shown in FIG. This current causes a voltage drop across the reference resistor 307, which provides a voltage input to the inverting input terminal of the comparator 309.

The current from the transistor 305 is a MOSFET consisting of seven MOSFET resistors 311-323.
It flows through a resistor network. This current is MOSFET
There is a voltage drop across the resistor network that provides a voltage input to the non-inverting input terminal of comparator 309. Addition /
The subtraction 6-bit digital counter 325 is used by the comparator 30.
It is controlled by the output of 9. The design and construction of 6-bit digital counters are well known in the art.

The six output terminals 327-337 of the digital counter 325 are connected to six MOSFET resistors 311-321, respectively. The digital counter 325 counts up when the output of the comparator 309 is high level (logic 1), and counts down when the output of the comparator 309 is low level (logic 0). As the digital counter 325 counts, the six outputs change states (logic 0
To logic 1 etc.), and thereby enable and inhibit individual MOSFET resistors 311-321. MOS
The FET resistor 323 is configured to be always conductive.

In operation, the comparator 309 has a reference resistor 307.
And the two voltages from the MOSFET resistor network 311-323. The voltage from the reference resistor 307 is MO
Below the voltage from the SFET resistor network, the digital counter counts, thereby adding more MOSFET resistors 311-321 in parallel and thereby reducing the voltage drop across the MOSFET resistor network. Conversely, if the voltage from the reference resistor is higher than the voltage from the MOSFET resistor network, the digital counter subtracts and reduces the number of MOSFET resistors in parallel, thereby increasing the voltage drop across the MOSFET resistor network. .

This comparison of the reference voltage and the MOSFET resistor network voltage controls the digital counter and, on the other hand, the resistance of the MOSFET resistor network. In this way, the MOSF of the MOSFET resistance network is
The resistance value of the ET resistors 311 to 323 is close to the resistance value of the reference resistor 307 outside the integrated circuit.

On-chip MOSFE process variation
It affects the value of the T-resistance chip by chip, while the variation within the chip is minimal. Therefore two identical MOSFET resistors on one chip actually have very closely matched values. Multiple MOSFET resistor network is constructed on one chip and MOSFET resistance of one MOSFSET resistor network is replaced by all other MOSFETs.
Designed to be the same as the MOSFET resistance of the resistor network, all MOSFET resistor networks are closely matched. This allows the multiple MOSFET resistor network to connect the control signals in parallel, ensuring that all MOSFET resistor networks match the resistance of the control network.

MOSFET resistors 311-323 form the control network for all other circuitry on the chip. 6 of the digital counters 325 as shown
The two output terminals are connected to a second MOSFET resistor network consisting of MOSFET resistors 339-351,
It is also connected to the controlling MOSFET resistors 339-349. The value of the MOSFET resistors 339-352 is M
Designed to match the value of OSFET resistors 311-323, the two MOSFET resistor networks are identical. M to match the external reference resistor 307
The MOSFET resistors 339-351 second MOSFET of the second MOSFET resistor network when the digital counter 325 counts up and down to adjust the M0SFET resistor network of the OSFET resistors 311-323.
The resistance value of the T resistor is also adjusted, and the external reference resistor 307
To match.

MOSF of the second MOSFET resistor network
ET resistors 339-351 are located in close proximity to the associated receive transistor 353 and are connected between the gate of receive transistor 353 and signal ground. In this way, the input impedance Z _in is equal to the resistance value of the MOSFET resistance network which approximates the reference resistance.

The additional MOSFET resistor network may be located near another receive transistor, with each signal line leading to the receive transistor properly terminated. Since the digital control lines from the digital counter to the MOSFET resistor network run around a chip (not shown) and have digital characteristics, these control lines are basically associated with analog signals. It has nothing to do with the noise problem.

Other modifications and additions will be apparent to those skilled in the art and can be made without departing from the scope and technical scope of the present invention. For example, changing the number of resistors can be done to increase or decrease the accuracy of the MOSFET resistor network with respect to an external reference resistor. The output of the digital counter may be converted to a voltage and used to control individual MOSFET termination resistors. Changes in the voltage across an individual MOSFET resistor change the effective resistance of the resistor. However, this requires the routing of analog signals to the individual MOSFET resistors, which is not as advantageous as the preferred embodiment.

The description and examples are to be considered as illustrative only, and the true scope and spirit of the present invention is:
It shall be as described in the claims.

Although the respective embodiments of the present invention have been described in detail above, the respective embodiments of the present invention will be summarized below. 1. When integrated with an integrated circuit having a signal line, it behaves like a resistor connected from the signal line to the signal ground,
When cut off, the transistor connected between the signal line and the signal ground acts as an open circuit between the signal line and the ground, and the effective impedance between the signal line and the signal ground conducts. And a control unit operatively associated with the resistance external to the integrated circuit for conducting and blocking the transistor so as to terminate the signal line when the resistance of the transistor is close to the resistance outside the integrated circuit. , And a signal line terminating device in an integrated circuit having.

2. At least two series of transistors are connected between the signal line and the signal ground,
The signal line terminating device in the integrated circuit as described in 1 above, which is selectively turned on by the control unit to bring the transistor close to a resistance value outside the integrated circuit.

3. 2. The signal line terminating device in the integrated circuit according to 1, wherein the transistor is a field effect transistor (FET).

4. The controller is arranged to cooperate with the comparator for comparing the resistance value outside the integrated circuit with the effective resistance value of the transistor, and for adding and subtracting in response to the output of the comparator. 3. The signal line terminating device in the integrated circuit according to 2, further comprising a counter, and the transistor connected to the output terminal of the counter and conducting in response to the output of the counter.

5. An integrated circuit having a signal line, at least two first series transistors connected to a reference signal and acting like resistors when each is conducted, and connected between said signal line and signal ground and respectively At least two second series of transistors that behave like resistors when turned on, an external reference resistance of the integrated circuit, and a resistance value of the first series of transistors to a resistance of the integrated circuit external resistance. A comparator that compares the value,
A counter co-located with the comparator for adding and subtracting in response to the output from the comparator, the comparator having the external resistance value and the first series of transistor effective resistance values. The counter is incremented or decremented in response to a difference between and the effective resistance value of the first series of transistors is greater than the external resistance value. Controlling the first series of transistors so that each of the individual transistors is conductive, and the effective resistance of the second series of transistors is responsive to changes in the effective resistance of the first series of transistors. At least one of the first series of transistors for varying a transistor of the second series of transistors to be controlled by the counter; A signal line termination in an integrated circuit in which a transistor conducts in response to the output of the counter and a transistor in the second series of transistors matches the conducting state of a transistor in the first series of transistors. It is a device.

6. The transistor of the first and second series of transistors is a signal line terminating device in the integrated circuit according to 5, which is a field effect transistor.

7. The reference current is generated, the same current is passed through both an external resistor and the first series of transistors, and the current flowing through the first series of transistors produces the reference signal. Is a signal line terminating device in the integrated circuit of.

8. The receiving transistor is the signal line terminating device in the integrated circuit according to 5, which is connected to the signal line.

9. 9. A signal line termination in an integrated circuit as described in 8 above, wherein the second series of transistors are arranged in cooperation with the receiving transistor such that the signal line is terminated close to the input terminal of the receiving transistor. It is a device.

[0042]

As described in detail above, according to the present invention, a transistor is connected between the signal line and the signal ground line on the integrated circuit, and the conduction and interruption control of this transistor is performed by the control unit. , When the effective impedance between the signal line and the signal ground is close to the resistance value of the external resistance of the integrated circuit, the control unit turns on the transistor to terminate the signal line. The resistance value necessary for the termination of the line can be obtained, and the effect of being able to compensate for fluctuations in the integrated circuit process is exerted.

[Brief description of drawings]

FIG. 1 is a simplified schematic circuit diagram of the present invention.

FIG. 2 is a circuit diagram of a resistor network according to the present invention.

FIG. 3 is a schematic diagram illustrating a preferred embodiment according to the present invention utilizing a control resistor network to control a slave resistor network so that all resistor networks approximate a desired resistance value. is there.

[Explanation of symbols]

101, 353 receiving transistor 103 resistance network 201 MOSFET resistance network 203-215, 311-323, 339-351 M
OSFET resistance 219-225, 239, 241, 301-305 transistor 227-237 NAND gate 307 reference resistance 309 comparator 325 digital counter 353 receiving transistor Z _in input impedance

Claims (1)

[Claims] Claim: What is claimed is: 1. An integrated circuit having a signal line and an open circuit between the signal line and ground which, when turned on, acts like a resistor connected from the signal line to signal ground. When the effective impedance between the signal line and signal ground is close to the value of the resistance outside the integrated circuit due to the transistor connected between the signal line and signal ground so that it operates like A signal line terminating device in an integrated circuit, comprising: a control unit operatively associated with a resistance external to the integrated circuit for electrically connecting and disconnecting a transistor so as to terminate a line. .