JPH06289838A - Font cache controller and its applying method - Google Patents

Abstract

PURPOSE:To provide the font cache controller and its applying method which effectively utilize a font cache with limited capacity, reduces the load on the LRU processing the font cache, and performs its printing process at a high speed as to a device which is used to display necessary characters by the printing process. CONSTITUTION:The font cache controller which is equipped with a cache buffer and a cache buffer control data memory (4B) and can perform a preparatory process for a free area generating process when the cache buffer is full by rewriting cache buffer control data corresponding to cache hits includes a cache hit process delay buffer (4E), a means (4C) which preforms registration to the cache hit process delay buffer at the time of a cache hit, and a means (4D) which performs cache hit processes at a time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a font cache control device and its application method, and
In a device used for printing and displaying a certain required character, the font cache with a limited capacity is effectively used, the load of the LRU process in the font cache is reduced, and the printing process is performed at high speed. The present invention relates to a font cache control device that can be executed and a method of applying the same.

[0002]

2. Description of the Related Art This type of font cache control has been conventionally implemented by the following method. That is, the first processing step: the character code to be printed is accepted, and it is checked whether or not the character pattern data corresponding to it is present in the associated font cache. Second processing step: When the required character pattern data exists in the associated font cache, the character pattern data is used for the corresponding printing process. Third processing step: When the required character pattern data does not exist in the associated font cache, the expansion of the corresponding character pattern data is executed again. At this time, if there is a free space in the associated font cache, the expanded character pattern data is stored in this free space. Fourth processing step: When there is no space in the related font cache in the third processing step (that is, the font cache is full), the character pattern data stored in the font cache The oldest reference time is erased, and the character pattern data developed in the third processing step is stored in the area vacated by this.

Generally speaking, in the above-mentioned fourth processing step, the LRU algorithm (of the character pattern data stored in the target font cache, the one with the oldest last reference time is deleted. Method) is applied. By the way, when such LRU processing is strictly executed, since the font cache which is the target of the processing is managed by a so-called bidirectional list structure, the character pattern data corresponding to the character code recently referred to is not stored. , Will be moved to the head position of the font cache and stored. As a result,
Its elimination is made the most difficult. What is admitted about such LRU processing is that it is an effective method for keeping what is highly likely to be referenced in the font cache. However,
Since the LRU process is executed every time a certain predetermined character is drawn, there is no possibility of erasing in the case where the same character is continuously drawn in a relatively short period of time. Even for a character in the LRU rank, the rank is sequentially updated, and as a result, the original goal of speeding up the printing process cannot be met.

For example, Japanese Patent Laid-Open No. 3-48285 [Font cache control system in character processing system]
It has been described as a conventional technique to erase all the data stored up to that point (that is, initialize all the data up to that point) when there is no more area to store the character pattern data. In order to solve the drawbacks of the conventional art, it has been proposed to divide and manage a data area in which character pattern data is stored to reduce the amount of data that is unnecessarily erased. Further, in another Japanese Patent Laid-Open No. 3-48286 [Font cache control system in character processing system], in order to solve the same drawbacks of the prior art as in Japanese Patent Laid-Open No. 3-48285 described above, When there is no more data area in which the pattern data should be stored, it has been proposed to erase from the beginning of the storage area. However, with any of the above methods, even if it is clear that frequently used character pattern data will be erased from the related font cache, when it becomes necessary to use it later, It may be necessary to re-expand the same erased characters. Therefore, the hit rate may be lower than that of the LRU processing method that has been generally used conventionally. In addition to the above-mentioned two documents, the following documents can be cited as reference documents in relation to the above-mentioned technique of this type. That is, JP-A-2-47078 [printing device]; JP-A-2-63759 [output device]; JP-A-3-111890 [output device]; and JP-A-3-149615 [printing device]. Can be cited as a reference. According to these documents, a method of specifying a range of characters to be stored in the font cache from the host side is adopted. According to the techniques disclosed in these documents, it is possible to perform control in a manner suitable for the document to be output, but on the host side, in accordance with the document to be output,
It is necessary to frequently update the range of characters to be stored, and if this is not done, the necessary characters may not be stored in the font cache. by the way,
A technical matter proposed in another reference, Japanese Patent Laid-Open No. 2-202463 [printing device], is that character data is received in a predetermined unit (for example, page),
The character to be stored in the font cache is determined based on the appearance frequency of each character included in the predetermined unit. However, when using such a method, the processing performed to obtain the appearance frequency for each character is
It increases as the number of target characters increases, and after the output of the characters contained in a page as a certain unit, the unnecessary waiting time until the output of the characters contained in the subsequent page. May occur. Further, in this reference, no consideration is given to the case where the capacity of the font cache is small with respect to the number and types of characters to be stored, and the countermeasure for the order of the characters that appear.

[0005]

The above-mentioned conventional technique of this kind has the following problems. That is, L that is generally applied when there is no free space for storing character pattern data in the target font cache.
According to the RU algorithm, it is effective to continuously store those that are highly likely to be referred to in the font cache, but the process based on the LRU algorithm is executed every time a certain predetermined character is drawn. Since the characters are in the LRU order that is never erased because of being executed, the order may be updated sequentially, and as a result, the original goal of speeding up the printing process may not be met. There was a problem. Also, as another separately proposed item, [1] by managing the data area for storing the character pattern data in a divided manner when the area for storing the character pattern data is exhausted, it is possible to reduce unnecessary data to be deleted. And [2] when there is no more area for storing character pattern data,
Delete from the beginning of the storage area;
With either of these methods, even character pattern data that is frequently used will be erased from the associated font cache, and will be erased when it becomes necessary to use it later. Since it may be necessary to expand the same character again,
There is a problem in that the hit rate may be lower than that of the LRU processing method that is generally used in the past.

The present invention has been made to solve the above-mentioned problems, and by providing a buffer for LRU delay processing, when the font cache is hit, the corresponding LRU processing is delayed. Is enabled, and the LRU processing is executed when the buffer becomes full or the font cache is mis-hit and it is necessary to select a candidate to be erased from the font cache. The LRU processing is performed so that the LRU processing for the character code hit multiple times during the LRU delay processing can be performed once, resulting in wasteful LR.
The purpose of the present invention is to reduce the number of times the U process is executed and to significantly improve the printing performance. Similarly, by providing a buffer for LRU delay processing, the selection of a candidate to be erased from the font cache and the processing for erasing the same are delayed when a miss hit occurs in the font cache, and the buffer is delayed. It becomes possible to proceed until it becomes full, and in order to secure the area to store the character pattern of the character that did not hit, the character pattern that may be reused in the near future is deleted. It is also an object to significantly improve the printing performance by preventing the printing.

[0007]

The present invention has been made to achieve the above object, and a font cache control device according to the present invention comprises a cache buffer and a cache buffer management data memory (4B). In a font cache control device capable of preparing for a free area creating process when the cache buffer is full by rewriting the cache buffer management data in response to a cache hit, a cache hit processing delay Buffer (4
E), a unit (4C) for registering in the LRU processing delay buffer at the time of a cache hit, and a unit (4D) for collectively performing the cache hit process. In another font cache control device according to the present invention, the cache buffer management data includes a reservation flag, and the means (4C) for registering in the cache hit processing delay buffer sets the reservation flag at the same time. The means (4D) for collectively performing the cache hit processing resets the reservation flag corresponding to the processing, and the free area creation processing when the cache buffer is full only includes the data entries for which the reservation flag is not set. It is characterized by being an object of erasure. Still another font cache control device according to the present invention comprises a cache buffer, a cache buffer management data memory (4B) and an output buffer, and writes the corresponding data for each requested data identifier in the output buffer. A font cache control device for a data output device accompanied by a font cache control function, and means for determining the presence or absence of necessary data by referring to the cache buffer management data when caching the data (4A ), A means (4D) for writing data in the cache to the output buffer at the time of a cache hit, a cache mishit processing delay buffer (4H), and a means (4C) for registering in the cache mishit processing delay buffer at the time of a cache miss. , Collectively Gerhard miss processing (input of data, writing to the deployment or output buffer) is characterized in that comprising contains means for performing (4G).

[0008]

The font cache control device according to the present invention is capable of efficiently creating a free area when the attached cache buffer is full, and delays the corresponding processing when a cache hit occurs. A cache hit processing delay buffer which is a means for storing the cache hit processing delay buffer, a means (LRU) processing delay buffer registration unit which is a means for registering the fact that the cache hit occurs, and the one registered as described above. And a means for collectively performing cache hit processing. According to the font cache control device of the present invention configured with such characteristics,
The necessary cache hit processing can be collectively performed immediately before, for example, the time when the empty area should be generated in the cache buffer, and the advantage that the usage efficiency of the device is improved accordingly is brought about. Further, in another font cache control device according to the present invention, the setting of the reservation flag included in the cache buffer management data is executed by the means for registering in the cache hit processing delay buffer, and the cache executed collectively. The reservation flag is reset in response to the hit processing, and the free area creation processing when the cache buffer is full selects only the data entry for which the reservation flag is not set as the erasure target. -It is characterized by being executed.
According to another font cache control device of the present invention having such a feature, for example, a normal L
Even if the candidate is to be erased in the RU process, the one to which the reservation flag is set will be removed from the candidate to be erased, and the one that is likely to be needed in the future will be unnecessarily erased. There is an advantage that the risk of being lost is reduced. Further, another font cache control device according to the present invention is a font cache control device for a data output device accompanied by a font cache control function, which stores cache buffer management data when caching data. Refer to determine whether there is necessary data, write data existing in the cache to the output buffer when a cache hit occurs, and register the fact to the cache miss hit processing delay buffer when a cache miss hit occurs. And, for the cache mishits that occurred as described above, the corresponding cache mishit processing is performed collectively (data input, expansion and writing to the output buffer).
Is included. According to still another font cache control device of the present invention configured as described above, it is not necessary to perform a necessary expansion process or the like on a target font every time a cache miss hit occurs, and a necessary cache miss is performed. The hit processing can be collectively performed, and the use efficiency of the device is improved accordingly.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram illustrating a schematic configuration centering on a font cache control device according to an embodiment of the present invention. In FIG. 1, the character code input acceptance device 1 is for accepting a required character code input transmitted from, for example, a host device (not shown) provided at an appropriate external location. The expansion character data storage device 2 may be, for example, a large-capacity low-speed operation storage device, and stores character data (information) used for expansion. The character pattern expansion device 3 is for expanding the character data (information) extracted from the expansion character data storage device 2 into a corresponding character pattern. The font cache control device 4 is the central device of the present invention, which will be described later with reference to FIG. The font cache 5 may be a small-capacity, high-speed operation type storage device, and the character pattern data corresponding to the character code developed in the past is stored by the amount. In the character output page buffer 6, an output image based on the character pattern data from the character pattern expansion device 3 or the font cache 5 is temporarily stored in page units for output under the control of the font cache control device 4. It is a thing.
The character output device 7 visibly outputs and displays an output image in page units, which is processed and stored in the character output page buffer 6 as required.

FIG. 2 is a block diagram showing the configuration of the font cache control device 4, which is the central device in FIG. In FIG. 2, the cache buffer management unit 4A
Is responsible for various management tasks such as creation, registration, storage, and deletion of the character pattern data in the font cache 5 (FIG. 1). The cache buffer management data memory 4B stores various kinds of data necessary for performing the management work of the font cache 5, and includes, for example, a reservation flag as will be described later. There is. Processing delay buffer registration unit 4C
Is a cache that has hits and misses,
The one that should delay the corresponding processing is registered. The data input / output unit 4D acts as an intermediary between the font cache 5 and the character output page buffer 6 (FIG. 1), and receives certain predetermined character pattern data selected in the former font cache 5, and the latter. Is output to the character output page buffer 6. The cache hit batch processing unit 4E collectively performs necessary processing on a plurality of the same character pattern data in the cache where the hit occurs. The cache hit processing delay buffer 4F temporarily stores a plurality of the same character pattern data in the cache in which a hit has occurred, for later batch processing. The cache miss batch processing unit 4G
The necessary processing is collectively performed on a plurality of the same character pattern data in the cache where the mishit has occurred. Then, the cache miss processing delay buffer 4
H is for temporarily storing a plurality of the same character pattern data in the cache in which a mishit has occurred for later batch processing.

FIG. 3 shows the L used in the above embodiment.
FIG. 3 is a diagram illustrating a configuration example of a RU delay processing buffer 20. In FIG. 3, the LRU delay processing buffer 20 is provided with a plurality of pointer storage units 21, and the pointers stored in the respective pointer storage units 21 are character pattern data on which the LRU delay processing is executed. It is for the stored font cache 5 (FIG. 1). The number of characters that can be managed in the LRU delay processing buffer 20 is normally determined in consideration of the size of memory resources used in the above embodiment, but is the same as the number of entries in the font cache 5. Or
Alternatively, it is preferable that the number is smaller than this.

FIG. 4 is a view showing an example of the data structure of the LRU management entry 30 used for managing the font cache 5 in the above embodiment. In FIG. 4, the LRU management entry 30 includes a character information (eg, character code) storage unit 31 corresponding to a character pattern stored in the font cache 5, a front pointer storage unit 32 for LRU management, and a LRU management Back pointer storage section 33; a pointer storage section 34 for the corresponding character pattern data; and an LRU process identifier storage section 35; Here, the LRU processing identifier is LR.
This is a value to be set in the entry that has updated the rank of the LRU list during U update processing, and is the LRU of a predetermined one cycle
It is updated prior to performing the update process. This is an exclusive value that identifies an entry updated in the LRU update processing in one cycle and an entry updated in another cycle. As such an LRU process identifier, it is also possible to adopt, for example, an integer that increases a sufficiently large range by one.

FIG. 5 shows an LRU management entry (30A) managed by the hash table 41 in the above embodiment.
Character pattern data (43A to 43C) corresponding to
FIG. 6 is an exemplary diagram regarding a relationship between C) and the LRU delay processing buffer 20. Note that the hash table here is a table for associating the key with a certain character code or the like as a key, and an entry that may be stored. It is performed by a predetermined calculation formula called a hash function. For example, assuming that the character [A] corresponds to the character code 40, the corresponding entry is at the 40th in the table. If the character [A] is actually registered at the 40th, [hit] If this is not registered, it will be judged as [miss hit]. And
The hash table here has an auxiliary data structure for determining cache hit / miss hit, and is limited to this hash table as long as it can provide a similar function. Although not a thing, this kind of hash table is generally used for the above-mentioned purpose. The hash table itself is a collection of pointers that point to the associated cache entries. In FIG. 5, the LRU management entry (3 that corresponds to the font cache entry (LRU list) is used.
0A to 30C) manage the erasure candidate entries in the case of a cache miss with a bidirectional list structure. The list of erasure candidate entries is managed by the LRU algorithm, and the character patterns stored in the font cache are referred to and are linked in the order of new reference to old reference. That is, the most recently referenced character (corresponding to the character pattern data 43A) is at the head of the list by the pointer 32A to the LRU management head entry, and the character of the oldest reference time (character pattern data 43C) is used. (Corresponding to) is designated as an erasure candidate by the pointer 33A to the LRU management final entry. In FIG. 5, the upper and lower two cache entries registered in the LRU delay processing buffer 20 designate a single cache entry. That is, a certain same character is designated. Further, the character pattern data storage area 43 shown in FIG. 5 functionally corresponds to the font cache 5 in FIG.

FIG. 6 is an exemplary diagram of the output document 50 used for explaining the operation in the above embodiment. The output document 50 in FIG. 6 includes the following sentences. [Recent advances in electronic technology play a major role in the spread and development of existing communication media,
It has achieved various developments in response to the demand for a wide variety of new communications accompanying the development of the surrounding environment such as social and economic activities. this is,]

FIG. 7 is an exemplary diagram used for explaining the operation in the above embodiment. FIG. 7 shows a simplified version of FIG. 5, in which the hash table 41 is omitted, and there is a predetermined number of digits (here, 10 digits, but actually there are more digits than this. LRU delay processing buffer 20 and a certain number of cache entries (LR
U list) 61. The cache entry 61 here corresponds to the LRU management entries (30A to 30C) having the list structure in FIG. In the state shown in FIG. 6, the character pattern data storage area 43 corresponding to the font cache 5 in FIG. 1 is already full, and "[na] [do] [circle] ... [No] [Summer] [Exhibition] "
Character pattern data corresponding to characters such as is fully stored.

FIG. 8 is another illustrative view used for explaining the operation in the above embodiment. In this FIG.
[Na] [do] [no] [circle] [side] [ring] [boundary] [no]
Ten characters of [advance] and [extend] are stored so as to fill the LRU delay processing buffer 20. It is shown that the character pattern of 10 characters here hits the cache, and in particular, the character pattern corresponding to [no] hits continuously.

FIG. 9 is another exemplary diagram used for explaining the operation in the above embodiment. In FIG. 9, a character pattern that does not hit later appears from the state shown in FIG. 8 and a required LRU process is performed. Here, it is shown that the LRU list 61 for three characters is updated, and the LRU processing identifier of each cache entry is also updated. In addition, this is
This is shown by shading three LRU lists 61 in FIG. 9 as viewed from the right side.

FIG. 10 is another illustrative view used for explaining the operation in the above embodiment. FIG. 10 shows a mode of processing regarding the eighth character [] of the 8th character registered / stored in the LRU delay processing buffer 20 when the LRU processing for the first seven characters is completed. Here, since the LRU processing identifier of the registered / stored entry (the one included in the LRU list 61) matches the one of the current cycle, the update of the LRU list 61 is not executed. Here, “the LRU processing identifier matches that of the current cycle” means that a series of LRU delay processing buffer post-processing means that the cache entry has already been LRU processed on the LRU list. It is shown. In our example,
The character [no] may be LRU-processed twice, but that second process is not required. In order to determine such a case, the LR is used during the first processing.
The U identifier is updated to indicate that the necessary processing has already been performed. The LRU identifier here indicates that the post-processing of one LRU delay processing buffer is completed, and
When the U delay process is performed and the post-process is restarted, it takes a different value, which enables the above process.

FIG. 11 is another illustrative view used for explaining the operation in the above embodiment. In FIG. 11, a predetermined one cycle of LRU processing is completed (that is, LR
The state when the U delay processing buffer 20 is cleared) is shown. That is, the corresponding LRU list 61 is updated, and the erasure candidate entry order for the character having the cache miss is confirmed. In this way, when cache mishits occur successively after the order is fixed, the erasure candidate entries are deleted in the order fixed in the list.

FIG. 12 is a flow chart for explaining the operation of the above embodiment, and is for explaining the output of the document illustrated in FIG. 6 from the state of FIG. 7. In FIG. 12, S1: extraction of character code to be printed; first, LRU
It is checked whether the delay processing buffer 20 is in the full state. When it is determined that the LRU delay processing buffer 20 is not in the full state, the character code to be printed is taken out and cache hit /
A process for determining which of the cache misses is performed. Here, when it is determined that the cache hit is [1], the processes of S2 and S3 are performed. On the other hand, when it is determined that there is a [2] cache miss, when there is an entry registered in the [2A] LRU delay processing buffer 20, the processing from S4 onward is performed,
Further, when there is no entry registered in the [2B] LRU delay processing buffer 20, the processing from S10 is performed. S2: When a cache hit occurs in S1; the cache entry in the font cache 5 (character pattern data storage area 43) (corresponding to the LRU management entries 30A to 30C) is stored in the LRU delay processing buffer 20. be registered. S3: Obtain the character pattern from the entry and copy it to the page buffer side; obtain the corresponding character pattern from the related cache entry and copy it to the page buffer (character output page buffer 6: see FIG. 1) side To do. Here, it is checked whether or not there is a character to be further processed, and when the LRU delay processing buffer 20 becomes full, or when a cache miss occurs prior to becoming full, the font cache In order to perform the LRU update processing on the characters inside, the processing after S4 or S10 is performed. S4: When there is a cache miss in S1 or there is no character to be output and there is an entry registered in the LRU delay processing buffer, or LR
When the U delay processing buffer becomes full, L
Predetermined updates are made to the RU identifier. S5: The last registered entry in the LRU deferral buffer is selected; as seen here, the LRU.
The LRU processing is performed on the corresponding entry in the order opposite to the order registered in the delay processing buffer 20. S6: A cache entry registered in the buffer is selected; a predetermined cache entry registered in the LRU delay processing buffer 20 is selected. Here, it is checked whether or not the LRU processing identifier of the cache entry matches the one updated in S4. Then, when it is determined that they match, the required LRU processing has already been performed on the entry in the corresponding LRU processing cycle, and it is not necessary to execute this LRU processing again. On the other hand, when it is determined that they do not match, the process proceeds to the following S7 and S8 in order to perform the required LRU processing. S7: The current entry is moved to the head of the LRU list 61. S8: The LRU processing identifier of the entry is rewritten to the one changed in S4. S9: Following the process of S8, the next entry in the LRU delay process buffer 20 is selected. After that, when there is an entry registered in the LRU delay processing buffer 20, the work from the previous S6 is repeated. On the other hand, the registered entry does not exist, and an LR triggered by a cache miss
When the U list 61 is being updated, in order to perform expansion processing for the character for which a cache miss has occurred, the above S1
The processing after 0 is executed. Otherwise, LRU
Suppose that the LRU processing of the delay processing buffer 20 is completed.
The processing in 15 is executed. S10: An entry as a deletion candidate in the LRU list 61 is selected. S11: The character pattern registered in the entry selected in S10 is erased. S12: Using the area corresponding to the entry in which the character pattern has been deleted, the pattern expansion processing for the required character is executed. S13: The entry managing the expanded character pattern is moved to the head of the LRU list 61. S14: Obtain the expanded character pattern and copy it to the page buffer side. Where S10 to S1
The processes up to 4 are performed when a normal font cache miss occurs. In order to expand the character that failed in the cache hit to the corresponding character pattern, an area for expanding the character pattern is required.
To secure this area, the erasure candidate entry in the LRU list 61 is selected. S15: The management information (for example, information on the number of characters stored in the buffer) regarding the LRU delay processing buffer 20 for which the necessary processing is completed is cleared.

Here, 1 used in the above embodiment
Example sentence of 00 characters ([Recent advances in electronic technology play a major role in the spread and development of existing communication media in Fig. 6 and the new communication that accompanies various environmental changes such as social and economic activities. Various developments have been made according to the demand. For this, the number of appearances for each character is [2: 6 times], [: 4 times], [advance: 2 times],
When counting like [ha: 2 times], ..., 17 types of characters in this 100-character sentence example appear multiple times, and it is recognized that the total number corresponds to 45 characters. To be And the remaining 55 characters appear only once. Here, 17 characters out of the 45 characters appearing a plurality of times need to undergo expansion processing in the first appearance, and the remaining (45-17 = 28) 2
Eight characters may benefit from a cache hit. That is, in the above example sentence, 10 including punctuation marks
The same character appears 0 times in 28 times,
For them, they may be subject to the advantages as described above. Now, assuming that the cache hit rate is 95%, for example, a cache miss will occur once for every 20 characters, but in the above sentence example, the same character can be used within 20 characters. Appears 10 times (for example, the same [no] appears at the 13th character after the first [no] in the above sentence example).
It is recognized that there are times. Therefore, when the embodiment of the present invention is applied to such a text example, the number of LRU list update processes can be reduced by about 10% as compared with the conventional technique of this type. Looking at sentences in which numbers and alphabets are frequently used, for example, some employee lists have many numbers [Example: Name: Fuji XXX Employee No. 11023, October 20, 1961], [1] and [0] are frequently used in this example, and the above-mentioned reduction rate is further increased because the English character [e] is frequently used in English. It may be possible to improve. Where [The man
is very kind. ], The occurrence of the same character here [e: 2 times (7
[Appears in the character]], [n: twice (appears in the 9th character)],
[I: 2 times (appears in the 7th character)], (spaces are ignored).

FIG. 13 is a diagram showing the construction of the LRU delay processing buffer 20 used in another embodiment (to which the reservation flag is applied) of the present invention. In FIG. 13, the LRU delay processing buffer 20 includes a plurality of character drawing information storage units 12A and pointer storage units 12B respectively corresponding to these, and the former character drawing information storage unit 12A. The information included in is the information necessary to draw the character for which the required delay processing has been performed (for example, information about the writing position on a certain page buffer), and The pointer stored in the storage unit 12B is for an entry in the corresponding font cache. The number of characters that can be managed in the LRU delay processing buffer 20 is normally determined in consideration of the size of the memory resource in the above-mentioned another embodiment, but is the same as the number of entries in the font cache, or , To be less than this.

FIG. 14 is a view showing an example of the data structure of the LRU management entry 300 used for managing the font cache 5 in the above another embodiment. In FIG. 14, the LRU management entry 300 is a character information (eg, character code) storage unit 31; LRU corresponding to a character pattern stored in the font cache 5.
Front pointer storage 32 for management; Back pointer storage 33 for LRU management; Pointer storage 34 for corresponding character pattern data; and reservation flag storage 35
A; The reservation flag is used to reserve the use of character pattern data that may be used in the near future.

FIG. 15 shows the LRU management entries (300A to 300C) managed by the hash table 41, the corresponding character pattern data (43A to 43C), and the (LRU) delay processing buffer 20 in another embodiment. It is an illustration figure regarding the relationship between. The shaded portions of the LRU management entries 300A and 300B indicate that the reservation flag is set. In FIG. 15, the LRU management entries (300A to 300C) corresponding to the font cache entry (LRU list) manage the erasure candidate entries in the case of a cache miss with a bidirectional list structure. The list of erasure candidate entries is managed by the LRU algorithm, and the character patterns stored in the font cache are referred to and are linked in the order of new reference to old reference. That is, the most recently referenced character (corresponding to the character pattern data 43A) is at the head of the list by the pointer 32A to the LRU management head entry, and the character of the oldest reference time (character pattern data 43C) is used. (Corresponding to) is designated as an erasure candidate by the pointer 33A to the LRU management final entry. The character pattern data storage area 43 shown in FIG. 15 also functionally corresponds to the font cache 5 in FIG.

FIG. 16 is an exemplary diagram used for explaining the operation in the above-mentioned another embodiment. FIG. 16 shows a simplified version of FIG. 15, in which the hash table 41 is omitted, and a predetermined number of digits (3 in this case).
Digitized (LRU) delay processing buffer 20 and a certain number of cache entries (LRU list) 61
It consists of and. Cache entry 6 here
1 is an LR having a list structure in FIG.
This corresponds to the U management entry (300A to 300C). Then, in the state shown in FIG. 16, in the character pattern data storage area 43 corresponding to the font cache 5 of FIG.
Character pattern data corresponding to characters such as [] ... [] is stored.

FIG. 17 is another illustrative view used for explaining the operation in the above-mentioned another embodiment. In FIG. 17, one character [near] is the LRU delay processing buffer 20.
It is stored in. Then, the character pattern of “near” in this case does not hit the cache, and only the corresponding character information is registered in the LRU delay processing buffer 20.

FIG. 18 is another illustrative view used for explaining the operation in the above-mentioned another embodiment. In this FIG. 18, characters [year] are added following the state shown in FIG.
For LRU, the required LRU processing is performed. In this case, the character pattern of [year] hits the cache. Therefore, the corresponding character information and the cache entry are registered in the LRU delay processing buffer 20, and the reservation flag for the corresponding entry is set. Will be. It should be noted that the setting of the reservation flag is shown by applying the fourth shade as viewed from the left side of the LRU list 61 in FIG.

FIG. 19 is another illustrative view used for explaining the operation in the above-mentioned another embodiment. In this FIG. 19, after the state shown in FIG.
The LRU delay processing buffer 20 is full in this state. Since the character pattern of [ni] in this case also hits the cache, in addition to the corresponding character information and cache entry being registered in the LRU delay processing buffer 20 as in the case of the character [year] described above. Then, the reservation flag for the corresponding entry is set. Regarding the setting of this reservation flag,
This is shown by shading the left end of the LRU list 61 in FIG. 19 (which originally corresponds to the erasure candidate entry).

FIG. 20 is another illustrative view used for explaining the operation in the above-mentioned another embodiment. In this FIG. 20, after the state shown in FIG.
In order to secure an area for storing the characters, unnecessary character pattern data (here, corresponding to the character [order]) can be deleted from the character pattern data storage area 43 corresponding to the font cache 5 in FIG. Selecting a candidate entry is illustrated. In FIG. 20, since the reservation flag for the character [ni] is set at the left end of the LRU list 61 (which corresponds to the original erasure candidate entry as described above), this left end entry is set. The entry for the following [order] is designated as the entry to be erased. In such a case, the character pattern for [ni] is selected as an erasure candidate, although it is referred to in the near future in the conventional method, and the effectiveness of the present invention can be recognized in this respect. .

FIG. 21 is another illustrative view used for explaining the operation in the above-mentioned another embodiment. In this FIG. 21, after the state shown in FIG. 20, the character pattern data (here, corresponding to the character [order]) for the selected entry to be erased is erased and the character [near] is erased. After the expansion of the character pattern data corresponding to, the LRU list 61 is updated as required.

FIG. 22 is another illustrative view used for explaining the operation in the above-mentioned another embodiment. In this FIG. 22, after the state shown in FIG. 21, predetermined post-processing regarding the characters registered in the LRU delay processing buffer 20 is performed and cleared, and all the required work is completed. The subsequent data structure in the character pattern data storage area 43 corresponding to the font cache 5 (FIG. 1) is shown.

FIG. 23 is a flow chart for explaining the operation of the above another embodiment, and is for explaining the output of the document illustrated in FIG. 6 from the state of FIG. . 23, S1: Extraction of character code to be printed; First, character code to be printed is extracted, and it is checked whether or not the LRU delay processing buffer 20 is in a full state. Then, when the LRU delay processing buffer 20 is not in the full state, it is determined whether the character code to be printed is a cache hit or a cache miss. here,
[1] When it is determined that there is a cache hit,
The processing of S2 and S3 is performed. On the other hand, when it is determined that the cache miss is [2], the above steps S2 and S3 are skipped, and the processes after S4 are performed. Here, referring again to FIG. 16 above, [near]
The characters are processed. In this case, the character [near] is not hit and only the corresponding character information is registered in the LRU delay processing buffer 20. S2: When there is a space in the LRU delay processing buffer 20 and a cache hit occurs for the target character; the cache entry (LRU) that manages the hit character pattern data from the font cache 5 (character pattern data storage area 43). Management entries 30A to 30C
(Corresponding item in step 1) is set and its reservation flag is set. S3: The pointer of the cache entry in which the hit has occurred is registered in the LRU delay processing buffer 20. S4: The character output information is registered in the LRU delay processing buffer 20. Information necessary for the actual drawing process, that is, necessary for copying the character pattern in the actual drawing process to the character output page buffer 6 (for example, for specifying the position of the corresponding character). ) Information is registered in the LRU delay processing buffer 20. After that, as long as there are characters to be processed, the process returns to the previous step S1 and the necessary processing is repeated. Then, when there are no more characters to be processed before the LRU delay processing buffer 20 becomes full, the processing in and after step S5 is executed in order to output the characters in the LRU delay processing buffer 20. Referring again to FIG. 18 above,
The state where the character "Year" is processed is shown.
In this case, the character [year] is hit, the corresponding character information and the cache entry are registered in the LRU delay processing buffer 20, and in addition to this, the reservation flag of the corresponding entry is set. . S5: When the LRU delay processing buffer 20 is full, perform post-processing after the delay processing; when the LRU delay processing buffer 20 is full, actual drawing of characters registered in the buffer It will be processed. In step S5, the LRU delay processing buffer 20 is selected from the beginning. Then, it is checked whether or not the cache entry is registered from the head of this buffer. here,
[1] When the cache entry is registered, that is, when the required character pattern is registered in the font cache 5, the work after step S6 is executed. On the other hand, when the [2] cache entry is not registered, that is, when the cache hit does not occur, the work from step S11 is executed. Here, referring to FIG. 19 again, a state in which the character [ni] is processed is shown and a state in which the LRU delay processing buffer 20 is full is shown. In this case, the character [ni] is also hit, which means that the same processing as the character [year] in FIG. 18 has been performed. S6: Clear the reservation flag of the entry (drawing processing when a cache hit occurs); the reservation flag of a predetermined one in the cache entry registered in the LRU delay processing buffer 20 is cleared. The reservation flag here is to prevent the reservation flag from being selected as a candidate to be erased from the font cache 5 after step S11, but is placed at the head of the LRU list 61 in step S6 immediately after. Therefore, even if it is cleared at this point, it will not be a candidate for deletion. S7: The cache entry registered in the LRU delay processing buffer 20 is moved to the head of the LRU list 61. S8: A required character pattern is obtained from the cache entry registered in the LRU delay processing buffer 20 and copied to the character output page buffer 6. That is,
Based on the predetermined character drawing information registered in the LRU delay processing buffer 20, it is copied to the corresponding position of the character output page buffer 6. S9: Only one of the LRU delay processing buffers 20 for which the predetermined processing has been completed is cleared. S10: Select the next buffer. That is, after the step S9, it is checked whether or not the next buffer exists, and when it is determined that the buffer exists, the operation in step S10 is performed. After that, when the character information registered in the LRU delay processing buffer 20 still exists, the character information is selected, and then the processing of step S6 or S11 and subsequent steps is performed. When the drawing processing in the LRU delay processing buffer 20 is completed and there is still a character to be processed, the process returns to step S1 and the LRU delay processing buffer 2 is returned.
The delay process at 0 is restarted. On the other hand, if there is no character to be processed, the process for printing is ended. S11: An entry as an erasure candidate in the LRU list 61 is selected. An area for expanding a corresponding character pattern is required for drawing a character for which no cache hit has occurred, and an entry as an erase candidate in the LRU list 61 is selected to secure such an area. To be done. Here, if the reservation flag is set in the corresponding entry as a result of a predetermined check, the process proceeds to the next step S12, the entry as the next erasure candidate is selected, and the reservation flag is set. The process in step S11 and the process in S12 are repeated until an entry not found is found. When the reservation flag is not set, the work after step S13 is executed. Here, referring to FIG. 20 again, a state is shown in which the erasure candidate entry for the character [near] registered in the LRU delay processing buffer 20 is selected. Here, since the reservation flag is set for the character [ni] in the erasure candidate entries of the LRU list 61, the entry for the next character [ordinal] is selected as the erasure candidate entry. . S12: The entry as the next erasure candidate in the LRU list 61 is selected. S13: Release of the character pattern area registered in the entry; S14: Expansion processing of the character pattern; Here, the character pattern registered in the entry selected in step S11 is erased to make it usable. The selected area is selected (S13), and using the corresponding area, expansion processing is performed on the character to be drawn registered in the LRU delay processing buffer 20 (S14). Then, the character pattern corresponding to this is registered in the font cache 5. For the subsequent processing, in order to execute processing similar to the entry hit in step S5,
The processing after 7 is continued. Here, referring to FIG. 21 again, the character pattern data (for the character [ordinal]) of the entry selected in FIG. 20 is deleted, the character pattern data for the character [near] is expanded, and the associated LRU is extracted. The state where the list 61 is updated is shown. In addition, in FIG. 22 following this FIG.
The font cache 5 after the required post-processing is performed on the characters registered in the RU delay processing buffer 20.
The state of the data structure in the (character pattern data storage area 43) is shown.

FIG. 24 is a block diagram showing the configuration of the LRU delay processing buffer 20 used in still another embodiment (for hit delay processing) of the present invention. In FIG. 24, the LRU delay processing buffer 20 includes a plurality of character drawing information storage units 12A and delay hit flag storage units 12C respectively corresponding to these, and the former character drawing information storage unit is stored. The information contained in section 12A is
It is information necessary for drawing a character on which a required delay process is performed (for example, information on a writing position on a predetermined page buffer), and the delay stored in each flag storage unit 12C. The hit flag is set when the character missed by the delay processing appears again. The number of characters that can be managed in the LRU delay processing buffer 20 is normally determined in consideration of the size of memory resources in the above-mentioned further embodiment, but is the same as the number of entries in the font cache, Or it is made to be less than this.

FIG. 25 shows another embodiment of the above.
Delay processing buffer 20 and delay processing hash table 4
It is an illustration figure of a relation with 1A. In FIG. 25, the delay processing hash table 41A is used to check that a character having a mistake appears again in the font cache 5 (FIG. 1), and the character registered as a result of the delay processing is It is checked whether or not it is registered in the table 41A, and the result is reflected in the delay hit flag 12C in the delay processing buffer 20.
In FIG. 25, the delay hit flag 12C in the third column (3) of the delay processing buffer 20 is set, and the character stored here is the delay processing buffer 20 concerned.
It is shown to be the same as a character stored anywhere else in.

FIG. 26 is an LRU used for managing the font cache 5 in the above another embodiment.
FIG. 6 is an exemplary diagram of a data structure of a management entry 400. In FIG. 26, the LRU management entry 400
Is a character information (eg, character code) storage unit 31 corresponding to a character pattern stored in the font cache 5;
The LRU management front pointer storage unit 32; the LRU management rear pointer storage unit 33; and the pointer storage unit 34 for the corresponding character pattern data.

FIG. 27 shows another embodiment of the above.
It is an illustration figure regarding the relation between the LRU management entry (400A-400C) managed by the hash table 41B for font caches, and the corresponding character pattern data (43A-43C). In FIG. 27, L corresponding to the font cache entry (LRU list)
The RU management entries (400A to 400C) manage erasure candidate entries in the case of a cache miss with a bidirectional list structure. The list of erasure candidate entries is managed by the LRU algorithm, and the character patterns stored in the font cache are referred to and are linked in the order of new reference to old reference. That is, the most recently referenced character (corresponding to the character pattern data 43A) is at the head of the list by the pointer 32A to the LRU management head entry, and the character of the oldest reference time (character pattern data 43C) is used. (Corresponding to) is designated as an erasure candidate by the pointer 33A to the LRU management final entry. The character pattern data storage area 4 shown in FIG.
3 also functionally corresponds to the font cache 5 in FIG.

FIG. 28 is an exemplary diagram used for explaining the operation in the above-mentioned still another embodiment. This FIG. 28 is a simplified view of the related items of FIG. 25 and FIG. 27, the hash table 41B is omitted, and a predetermined number of digits (here, three digits) is set. L
The RU delay processing buffer 20 and a certain number of cache entries (LRU list) 61 are included. The cache entry 61 here is the LRU management entry (400 which has the list structure in FIG. 27).
A to 400C). Then, in the state shown in FIG. 28, in the character pattern data storage area 43 corresponding to the font cache 5 of FIG. 1, "[o] [ni] [year] [] ... []" Character pattern data corresponding to such characters is stored. The area 6A in FIG. 28 corresponds to the image storage area of the character output page buffer 6 (FIG. 1).

FIG. 29 is another illustrative view used for explaining the operation in the above still another embodiment. In FIG. 29, one character [near] is stored in the LRU delay processing buffer 20. In this case, the [near] character pattern does not hit the cache, and only the corresponding character information is stored in the LRU delay processing buffer 20.
Will be registered in. The image storage area 6A in the character output page buffer 6 remains blank.

FIG. 30 is another illustrative view used for explaining the operation in the above still another embodiment. In FIG. 30, after the state shown in FIG. 29, the required LRU processing is performed on the character [year]. The character pattern of [Year] in this case hits the cache, so that the associated entry is L
It is moved to the head of the RU list 61. Then, the corresponding character pattern is taken out from the character pattern data storage area 43 (the font cache 5 in FIG. 1) and is transcribed to a predetermined portion of the image storage area 6A in the character output page buffer 6. .

FIG. 31 is another illustrative view used for explaining the operation in the above still another embodiment. In FIG. 31, after the state shown in FIG. 30, for example, a character string “Advancement of electronic technology in existing communication media is processed” is processed, and the LRU delay processing buffer 2 is processed.
The state where 0 is full (the cache is hit except for []) is shown. Here, if the first character [no] in the character string does not hit the cache, the character information corresponding to this is registered in the LRU delay processing buffer 20. Then, for the character [no] that appears second, the character information with the delay hit flag set is registered in the LRU delay processing buffer 20. In such a state, the image storage area 6A in the character output page buffer 6
In the figure, neither the character [near] nor the character [no] has been drawn.

FIG. 32 is another illustrative view used for explaining the operation in the above still another embodiment. 32, in order to secure an area for storing the character [near] after the state shown in FIG. 31, the character pattern data storage area 4 corresponding to the font cache 5 in FIG.
It is exemplified to select an erasure candidate entry from which unnecessary character pattern data can be erased from 3.
The hit character string processed at this point has been moved to the head position of the hit LRU (that is, a position that is unlikely to be an erasure candidate). Therefore, when the erasure candidate entry is selected here, the leftmost entry among the erasure candidate entries is selected. Note that no special method is adopted for the selection method here. The timing required for selection is delayed as much as possible, and the order of the LRU list is optimized by then.

FIG. 33 is another illustrative view used for explaining the operation in the above still another embodiment. In FIG. 33, following the state shown in FIG. 32, the expansion of the character pattern data corresponding to the character [near] and the character [i] is executed, and then the LRU list 61 is updated as required. To be done. Further, although the expansion processing is performed on the second character [of] in the LRU delay processing buffer 20 in which the delay hit flag is set,
Since the expansion for the first character [] has already been executed in the character pattern data storage area 43 (font cache 5 in FIG. 1), the expansion processing is not executed,
The corresponding character pattern data is retrieved from the character pattern data storage area 43, and a required drawing process is performed based on the retrieval result. As a result, in the image storage area 6A of the character output page buffer 6, the above-mentioned character string "The advance of electronic technology in existing communication media" is drawn.

FIG. 34 is a flow chart for explaining the operation of the above still another embodiment, and is for explaining the output of the document illustrated in FIG. 5 from the state of FIG. 28. is there. In FIG. 34, S1: extraction of character code to be printed; first, LRU
It is checked whether the delay processing buffer 20 is in the full state. Then, when the LRU delay processing buffer 20 is not in the full state, the character code to be printed is taken out. Further, with respect to the character code to be printed here, it is determined whether it is a cache hit or a cache miss. Here, when it is determined that the cache hit is [1], the processes of S2 and S3 are performed. On the other hand, when it is determined that the cache miss is [2], the steps S2 and S3 are skipped and the process of S4 is performed. S2: When a hit occurs for the target character in S1;
Font cache 5 (character pattern data storage area 4
3), a cache entry (LRU management entry 400A for managing the hit character pattern data)
(Corresponding one in 400C) and moves it to the head of the LRU list 61. S3: The character pattern acquired based on the cache entry in which the hit has occurred is copied to an appropriate place of the character output page buffer 6. S4: When an error occurs with respect to the target character in S1; information required later in the actual drawing process, that is,
It is necessary to copy the character pattern to the character output page buffer 6 in the actual drawing process (for example,
Information (such as for specifying the position of the corresponding character) is registered in the LRU delay processing buffer 20. At this time, the corresponding entry of the LRU delay processing buffer 20 is registered in the delay processing hash table 41A. After that, as long as there are characters to be processed, the process returns to the previous step S1 and the necessary processing is repeated. Then, the LRU delay processing buffer 2
When there are no more characters to be processed before 0 becomes full, the processes in and after step S5 are executed to output the characters in the LRU delay processing buffer 20. S5: post-processing after the delay processing when the LRU delay processing buffer 20 is full; when the LRU delay processing buffer 20 is full or when there are no characters to be output, LRU delay When a character registered in the processing buffer 20 exists, the actual drawing process is performed on the character registered in the buffer. In this step S5, L
The RU delay processing buffer 20 is selected from the beginning. Then, it is checked from the head of this buffer whether or not the delay hit flag is set. Here, when the delay hit flag corresponding to [1] is set, that is, when the required character pattern is registered in the font cache 5 according to the expansion processing in steps S11 to S13, which will be described later, the operations in and after step S6. Will be executed. On the contrary,
[2] When the corresponding delay hit flag is not set, that is, when the corresponding character pattern is not stored in the font cache 5 (character pattern data storage area 43), the operation of the character pattern of step S11 and thereafter is performed. The expansion processing is executed. S6: Drawing processing when the delay hit flag is set; at this time, a cache entry corresponding to the corresponding character code is obtained from the font cache 5 (character pattern data storage area 43) side. S7: The cache entry registered in the LRU delay processing buffer 20 is moved to the head of the LRU list 61. S8: Obtain a required character pattern from the cache entry registered in the LRU delay processing buffer 20 and copy it to the character output page buffer 6 (ie,
Perform the required drawing process). At this time, it is copied to the corresponding position of the character output page buffer 6 based on the predetermined character drawing information registered in the LRU delay processing buffer 20. S9: Only one of the LRU delay processing buffers 20 for which the predetermined processing has been completed is cleared. S10: Select the next buffer. That is, after the step S9, it is checked whether or not the next buffer exists, and when it is determined that the buffer exists, the operation in step S10 is performed. After that, when the character information registered in the LRU delay processing buffer 20 still exists, the character information is selected, and then the processing of step S6 or S11 and subsequent steps is performed. When the drawing processing in the LRU delay processing buffer 20 is completed and there is still a character to be processed, the process returns to step S1 and the LRU delay processing buffer 2 is returned.
The delay process at 0 is restarted. On the other hand, if there is no character to be processed, the process for printing is ended. S11: An entry as an erasure candidate in the LRU list 61 is selected. An area for expanding a corresponding character pattern is required for drawing a character for which no cache hit has occurred, and an entry as an erase candidate in the LRU list 61 is selected to secure such an area. To be done. S12: The character pattern registered in the entry selected in step S11 is erased, and the corresponding area is released. S13: A required character pattern expansion process is executed. Here, using the area released in step S12, L
Expansion processing is performed on the characters to be drawn registered in the RU delay processing buffer 20 (S13). And
The character pattern corresponding to this is registered in the font cache 5. For subsequent processing, step S5
In order to execute the same processing as the entry hit in, the processing after step S7 is continued.

[0044]

As described above, according to the font cache control device of the present invention, the LRU delay processing buffer is provided, and the update of the LRU list for the character having the cache hit or the cache miss is delayed. It is possible to let For this reason, it is possible to collectively update the LRU list for characters that appear multiple times within a short period, and it is possible to omit unnecessary update of the LRU list. Further, according to the font cache control device of the present invention, since the LRU delay processing buffer is provided and the predetermined reservation flag is used, the actual expansion of the character pattern and the update of the font cache are performed. It becomes possible to delay, and furthermore, it becomes possible to prevent erasure of characters which may be used in the near future. In particular, in accordance with the state of the font cache being processed and the appearance order of characters to be printed, the optimum erasure candidate can be selected from the font cache.
Optimal font cache control can be performed with a limited amount of memory resources. In addition to this, it has the advantage of not requiring any special instructions from the host side.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a schematic configuration centering on a font cache control device that is an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of a font cache control device according to the above embodiment.

FIG. 3 is a diagram illustrating a configuration of an LRU delay processing buffer 11 used in the above embodiment.

FIG. 4 is a view showing an example of a data structure of entries used for managing the font cache 5 in the above embodiment.

FIG. 5 is a view showing an example of a relationship between a font cache entry managed by a hash table 41, character pattern data, and an LRU delay processing buffer in the above embodiment.

FIG. 6 is a view showing an example of an output document 51 used for explaining the operation in the above embodiment.

FIG. 7 is an exemplary diagram used to describe an operation in the above embodiment.

FIG. 8 is another exemplary diagram used for explaining the operation in the above-described embodiment.

FIG. 9 is another exemplary diagram used for explaining the operation in the above-described embodiment.

FIG. 10 is another exemplary diagram used for explaining the operation in the above-described embodiment.

FIG. 11 is another exemplary diagram used for explaining the operation in the above-described embodiment.

FIG. 12 is a flow chart for explaining the operation of the above embodiment.

FIG. 13 is an LRU delay processing buffer 11 used in another embodiment (to which a reservation flag is applied) of the present invention.
FIG.

FIG. 14 is an LRU management entry 3 used for managing the font cache 5 in the above-mentioned another embodiment.
It is an illustration figure of the data structure of 00.

15 is an LRU management entry (300A to 3) managed by the hash table 41 in the above-described another embodiment. FIG.
00C) and corresponding character pattern data (43A to 43A)
FIG. 6 is an exemplary diagram regarding a relationship between C) and the LRU delay processing buffer 20.

FIG. 16 is an exemplary diagram used for explaining an operation in the another embodiment.

FIG. 17 is an exemplary diagram used to describe an operation in the another embodiment.

FIG. 18 is another exemplary diagram used for description of the operation in the another example.

FIG. 19 is another exemplary diagram used for explaining the operation in the another example.

FIG. 20 is another exemplary diagram used for description of the operation in the another example.

FIG. 21 is another exemplary diagram used for description of the operation in the another example.

FIG. 22 is another exemplary diagram used for explaining the operation in the another example.

FIG. 23 is a flow chart for explaining the operation of the another embodiment.

FIG. 24 is a configuration diagram of an LRU delay processing buffer 12 used in still another embodiment (for hit delay processing) of the present invention.

FIG. 25 is a view showing an example of the relationship between the delay processing buffer 20 and the delay processing hash table 41A in yet another embodiment.

FIG. 26 is a view showing an example of the data structure of an LRU management entry 400 used for managing the font cache 5 in yet another embodiment.

FIG. 27 is an LRU managed by a font cache hash table 41A in yet another embodiment.
It is an illustration figure regarding the relationship between the entry for management (400A-400C) and corresponding character pattern data (43A-43C).

FIG. 28 is an exemplary view used for explaining an operation in the yet another embodiment.

FIG. 29 is another exemplary diagram used for explaining the operation in the yet another embodiment.

FIG. 30 is another exemplary diagram used for explaining the operation in the yet another embodiment.

FIG. 31 is another illustrative diagram used for explaining the operation in the yet another embodiment.

FIG. 32 is another illustrative diagram used for explaining the operation in the yet another embodiment.

FIG. 33 is another exemplary view used for explaining the operation in the yet another embodiment.

FIG. 34 is a flow chart for explaining the operation of the yet another embodiment.

[Explanation of Codes] 1-Character code input acceptance device; 2--Development character data storage device; 3--Character pattern development device; 4--Font cache control device; 5--Font cache;
6 --- Page buffer for character output; 7 --- Character output device.

Claims (6)

[Claims] 1. A cache buffer and a cache buffer management data memory are provided, and a process for preparing a free area when the cache buffer is full is provided by rewriting the cache buffer management data in response to a cache hit. A font cache control device that is enabled to include a cache hit processing delay buffer, means for registering in the cache hit processing delay buffer at the time of a cache hit, and means for collectively performing cache hit processing. A font cache control device characterized by. 2. The cache buffer management data includes a reservation flag, the means for registering in the cache hit processing delay buffer sets the reservation flag at the same time, and the means for collectively performing cache hit processing is The free space creation process when the reservation flag is reset corresponding to that process and the cache buffer is full,
The font cache control device according to claim 1, wherein only a data entry for which a reservation flag is not set is targeted for deletion. 3. Data accompanied by a font cache control function, comprising a cache buffer, a cache buffer management data memory and an output buffer, and adapted to write the corresponding data for each requested data identifier into the output buffer. A font cache control device for an output device, which is a device for caching data, which refers to the cache buffer management data to determine whether or not there is necessary data, and when a cache hit occurs, the data in the cache is output to the output buffer. Writing means, cache miss hit processing delay buffer, means for registering in cache miss hit processing delay buffer at the time of cache miss, cache miss hit processing (data input, expansion and writing to output buffer) collectively Stage, characterized by comprising contains font cache controller for the data output apparatus function of font cache control is associated. 4. A cache buffer and a cache buffer management data memory are provided, and when the cache buffer is full when the cache buffer management data in the cache buffer management data memory is rewritten in response to a cache hit. A method of applying a font cache control device for executing a process for preparing a free area, wherein when the cache hit to the same target occurs a plurality of times, the execution of the corresponding cache hit process is delayed. When a cache hit occurs a plurality of times, registering the fact to the LRU processing delay buffer, and executing the cache hit process collectively for the same target where a cache hit occurs a plurality of times. Characterized by comprising, A method of applying a font cache control device. 5. The setting of the reservation flag included in the cache buffer management data is executed by means for registering in the cache hit processing delay buffer, and the resetting of the reservation flag is performed in a batch of cache hit processing. Correspondingly, and the free area creation processing when the cache buffer is full is characterized in that only data entries for which the reservation flag is not set are selected for deletion. A method of applying the font cache control device according to claim 4. 6. Data accompanied by a font cache control function, comprising a cache buffer, a cache buffer management data memory and an output buffer, and adapted to write the data corresponding to each requested data identifier to the output buffer. A method of applying a font cache control device for an output device, comprising: determining whether or not there is necessary data by referring to cache buffer management data when executing data caching. Existing data in the output buffer, in the case of a cache miss, register that fact in the cache mishit processing delay buffer, and collectively in the cache mishit processing (data input, expansion and output buffer Write to) A method of applying a font cache control device for a data output device accompanied by a function of font cache control, characterized in that: