CN112835716A - CPU (Central processing Unit) cache allocation method and terminal for 5G communication virtualization network element - Google Patents
CPU (Central processing Unit) cache allocation method and terminal for 5G communication virtualization network element Download PDFInfo
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Abstract
The invention discloses a CPU cache allocation method and a terminal of a 5G communication virtualization network element, wherein the method comprises the following steps: setting to enable the UPF network element to be bound to a first core group for operation, setting to enable other network elements to be bound to a second core group for operation, and calculating a first frequency of cache loss of the UPF network element under the condition of sufficient cache according to the traffic of the UPF network element; detecting a second frequency triggering cache deletion on the first core group every other preset period, and dynamically adjusting the size of the cache allocated to the first core group according to the sizes of the first frequency and the second frequency, so as to avoid the high-frequency cache deletion triggered by insufficient cache of the UPF network element; the invention ensures that the UPF network element has enough cache to reduce the frequency of cache deletion of the UPF network element by priority, simultaneously, the cache occupied by the UPF network element is as small as possible, and other network elements are also allocated to obtain caches with certain sizes for use, so that the overall performance of the 5G communication system is optimal.
Description
Technical Field
The invention relates to the technical field of 5G communication, in particular to a CPU cache allocation method and a terminal for a 5G communication virtualization network element.
Background
The fifth Generation mobile communication technology (5th Generation mobile networks or 5th Generation with less systems, 5th-Generation, 5G or 5G technology for short) is the latest Generation cellular mobile communication technology, and is also an extension following 4G (LTE-A, WiMax), 3G (UMTS, LTE) and 2G (gsm) systems. The performance goals of 5G are high data rates, reduced latency, energy savings, reduced cost, increased system capacity, and large-scale device connectivity.
The speed of the CPU executing instructions is tens of times that of reading and writing the memory, so the CPU designs a cache with a certain size (usually, the cache is about ten-thousandth to one-thousandth of the memory size) for copying and storing data in a part of the memory. When CPU reads and writes some memory data, if the memory data is stored in the buffer memory, it will read and write in the buffer memory. If the memory data does not exist in the cache, the memory data is read and written in the memory, and the memory data is copied and stored in the cache (the condition is called cache miss). Caching miss means that the CPU needs to spend more time reading and writing data in the memory (reading and writing cache data is more than ten times faster than reading and writing memory data), and the efficiency of program operation is reduced.
The cache capacity is so small that it will soon be used up by the system program, and when all caches have been used to copy the data stored in the memory, and a program cache miss occurs, another memory data C2 stored in the cache will be flushed from the cache in order to free up cache space to copy and store the memory data C1 accessed at that time.
When a set of 5G communication virtualized network elements (the virtualized network elements include virtual machine system programs and virtual machine application programs) is operated on one physical terminal, the virtualized network elements include AMF, SMF, UDM, UPF, PCF, and the like. The occurrence of the cache miss of the virtualized network element 1 may cause the cache data C2 of the virtualized network element 2 to be cleared; the occurrence of a cache miss in virtualized network element 2 may also result in the cache data C1 of virtualized network element 1 being cleared. After the cache data C1 of the virtualized network element 1 and the cache data C2 of the virtualized network element 2 are cleared, the virtualized network element 1 and the virtualized network element 2 may continue to read and write the data C1 and the data C2 whose caches are cleared, and trigger a new cache miss, which further increases the frequency of the cache miss and reduces the overall performance of the 5G communication system.
In these 5G communication virtualization network elements, different network elements also have different impacts on the overall performance of the 5G communication system, where a UPF network element (User Plane Function, UPF is used to perform User traffic forwarding) has a large impact on the performance of the 5G communication system, and other network elements have a small impact on the performance of the 5G communication system, and if a high-frequency cache miss occurs in the UPF network element, the overall performance of the 5G communication system is greatly reduced.
Accordingly, the prior art is yet to be improved and developed.
Disclosure of Invention
The invention mainly aims to provide a CPU cache allocation method and a terminal for a 5G communication virtualization network element, and aims to solve the problem that the overall performance of a 5G communication system is reduced due to high-frequency cache miss of a UPF network element in the prior art.
In order to achieve the above object, the present invention provides a CPU cache allocation method for a 5G communication virtualized network element, where the CPU cache allocation method for the 5G communication virtualized network element includes the following steps:
numbering a preset number of operation cores of a multi-core CPU in advance, dividing all the operation cores into a first core group and a second core group, allocating a first cache to the first core group, and allocating a second cache to the second core group;
binding and setting the UPF network elements on the first core group to operate, and binding and setting all the rest virtualized network elements on the second core group to operate;
calculating a first frequency of cache miss of the UPF network element under the condition of sufficient cache according to the traffic of the UPF network element;
detecting a second frequency of triggering cache miss on the first core group every other preset period, and comparing the second frequency with the first frequency;
when the second frequency is greater than the first frequency, increasing the size of a preset cache of the cache occupied by the first core group, and reducing the size of the preset cache of the cache occupied by the second core group;
when the second frequency is less than or equal to the first frequency, reducing the size of the cache occupied by the first core group by a preset cache size, and increasing the size of the cache occupied by the second core group by a preset cache size.
Optionally, the CPU cache allocation method of the 5G communication virtualization network element, where the first core group includes a first preset number of operation cores, and the second core group includes a second preset number of operation cores.
Optionally, in the method for allocating CPU caches of a 5G communication virtualization network element, the preset number is 16; the first preset number is 10, and the second preset number is 6; the first core set comprises an operation core 1-an operation core 10; the second core set comprises an arithmetic core 11-an arithmetic core 16; the 16 operation cores share 64Mbyte caches, the first cache is a 32Mbyte cache, and the second cache is a 32Mbyte cache; the preset cache size is 1Mbyte cache.
Optionally, the method for allocating a CPU cache of a 5G communication virtualization network element, where the pre-numbering a preset number of operation cores of a multicore CPU, dividing all operation cores into a first core group and a second core group, allocating a first cache to the first core group, and allocating a second cache to the second core group specifically includes:
numbering 16 operation cores of a multi-core CPU in advance, wherein the number is operation core 1-operation core 16;
setting the operation cores 1-10 as the first core group, and setting the operation cores 11-16 as the second core group;
the first core group is allocated a 32Mbyte cache and the second core group is allocated the remaining 32Mbyte cache.
Optionally, in the method for allocating a CPU cache of a 5G communication virtualization network element, when the cache is sufficient, a first frequency Hm of the UPF network element triggering cache miss is equal to a frequency of the UPF network element system program reading and writing new memory data.
Optionally, the method for allocating a CPU buffer of a 5G communication virtualization network element, where the detecting a second frequency that triggers a buffer miss on the first core group every preset period, and comparing the second frequency with the first frequency specifically includes:
respectively setting a corresponding cache miss register for each operation core, and accumulating 1 for the corresponding cache miss register when each operation core generates cache miss every time;
reading the increment value of the cache miss register of each operation core in the first core group to obtain a second frequency Hc triggering cache miss on the first core group;
the second frequency Hc is compared with the first frequency Hm.
Optionally, the method for allocating a CPU cache of a 5G communication virtualization network element, where, when the second frequency is greater than the first frequency, increasing a cache occupied by the first core group by a preset cache size, and decreasing a cache occupied by the second core group by the preset cache size specifically includes:
when the second frequency Hc is larger than the first frequency Hm and the number of the caches occupied by the first core group is smaller than 64Mbyte caches, the caches occupied by the first core group are increased by 1Mbyte cache, and the caches occupied by the second core group are decreased by 1Mbyte cache.
Optionally, the method for allocating a CPU cache of a 5G communication virtualization network element, where, when the second frequency is less than or equal to the first frequency, reducing the cache occupied by the first core group by a preset cache size, and increasing the cache occupied by the second core group by the preset cache size specifically includes:
when the second frequency Hc is less than or equal to the first frequency Hm and the number of the caches occupied by the first core group is greater than 1Mbyte cache, reducing the caches occupied by the first core group by 1Mbyte cache and increasing the caches occupied by the second core group by 1Mbyte cache.
In addition, to achieve the above object, the present invention further provides a terminal, wherein the terminal includes: the CPU cache allocation program of the 5G communication virtualization network element is stored in the memory and can run on the processor, and when being executed by the processor, the CPU cache allocation program of the 5G communication virtualization network element realizes the steps of the CPU cache allocation method of the 5G communication virtualization network element.
In addition, in order to achieve the above object, the present invention further provides a storage medium, where the storage medium stores a CPU cache allocation program of a 5G communication virtualization network element, and when executed by a processor, the CPU cache allocation program of the 5G communication virtualization network element implements the steps of the CPU cache allocation method of the 5G communication virtualization network element as described above.
The method comprises the steps that a preset number of operation cores of a multi-core CPU are numbered in advance, all the operation cores are divided into a first core group and a second core group, a first cache is distributed to the first core group, and a second cache is distributed to the second core group; binding and setting the UPF network elements on the first core group to operate, and binding and setting all the rest virtualized network elements on the second core group to operate; calculating a first frequency of cache miss of the UPF network element under the condition of sufficient cache according to the traffic of the UPF network element; detecting a second frequency of triggering cache miss on the first core group every other preset period, and comparing the second frequency with the first frequency; when the second frequency is greater than the first frequency, increasing the size of a preset cache of the cache occupied by the first core group, and reducing the size of the preset cache of the cache occupied by the second core group; when the second frequency is less than or equal to the first frequency, reducing the size of the cache occupied by the first core group by a preset cache size, and increasing the size of the cache occupied by the second core group by a preset cache size. The invention ensures that the UPF network element has enough cache to reduce the frequency of cache deletion of the UPF network element by priority, simultaneously, the cache occupied by the UPF network element is as small as possible, and other network elements are also allocated to obtain caches with certain sizes for use, so that the overall performance of the 5G communication system is optimal.
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Fig. 1 is a flowchart of a CPU cache allocation method of a 5G communication virtualization network element according to a preferred embodiment of the present invention;
fig. 2 is a schematic operating environment of a terminal according to a preferred embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, the method for allocating a CPU buffer of a 5G communication virtualized network element according to a preferred embodiment of the present invention includes the following steps:
step S10, numbering a preset number of arithmetic cores of the multicore CPU in advance, dividing all the arithmetic cores into a first core group and a second core group, and allocating a first cache to the first core group and a second cache to the second core group.
Specifically, the first core group includes a first preset number of operation cores, the second core group includes a second preset number of operation cores, and the first preset number and the second preset number may be the same or different; the invention is described by taking an example that a multi-core CPU has 16 operation cores, and 16 operation cores are numbered in sequence, wherein the number is an operation core 1, an operation core 2, an operation core 3 … and an operation core 16, the operation core 1-the operation core 10 is defined as a first core group (or referred to as a core group a, namely the first preset number is 10), the operation core 11-the operation core 16 is defined as a second core group (or referred to as a core group B, namely the second preset number is 6), the 16 operation cores share 64MByte cache, 32MByte cache is allocated to the first core group (core group a), the remaining 32MByte cache is allocated to the second core group (core group B), namely the first cache is 32MByte cache, and the second cache is 32MByte cache. Under the condition that the function of the opened application program is not changed, the more the number of the operation cores is, the more the number of the caches is required to achieve the highest program performance.
Step S20, the binding settings of the UPF network element are set to run on the first core group, and all the remaining binding settings of the virtualized network element are set to run on the second core group.
Specifically, the UPF network element is configured to execute a user traffic forwarding operation, and set the UPF network element to be bound on the first core group (operation core 1-operation core 10) for operation, and set all remaining virtualized network elements (e.g., AMF, SMF, UDM, PCF, etc.) to be bound on the second core group (operation core 11-operation core 16) for operation.
Step S30, calculating a first frequency of cache miss of the UPF network element when the cache is sufficient according to the traffic volume of the UPF network element.
Specifically, before an application program of the UPF reads and writes a memory data for the first time, the memory data is actively called into the cache in advance. Therefore, if the cache is sufficient, the application program of the UPF will not trigger a cache miss (i.e. cache miss), and the UPF network element system program will not actively call the memory data into the cache in advance before first reading and writing a memory data, and will inevitably trigger a cache miss, so even if the cache is sufficient, the first frequency Hm of the UPF network element triggering the cache miss is equal to the frequency of the UPF network element system program reading and writing the new memory data. The frequency of reading and writing new memory data by the UPF network element system program is fixed (about 100 times), and does not change with the function of the UPF application program.
Step S40, detecting a second frequency triggering cache miss on the first core group every preset period, and comparing the second frequency with the first frequency.
Specifically, the preset period is 10 seconds, a corresponding cache miss register is respectively set for each operation core, and the corresponding cache miss register accumulates by 1 every time a cache miss occurs to each operation core; reading the increment value of the cache miss register of each operation core in the first core group to obtain a second frequency Hc triggering cache miss on the first core group; the second frequency Hc is compared with the first frequency Hm.
Step S50, when the second frequency is greater than the first frequency, increasing the size of the cache occupied by the first core group by a preset cache size, and decreasing the size of the cache occupied by the second core group by a preset cache size.
Specifically, when the second frequency Hc is greater than the first frequency Hm and the number of caches occupied by the first core group is less than 64Mbyte caches (the number of caches occupied by the first core group may be equal to 64Mbyte, and no more caches can be added), the number of caches occupied by the first core group is increased by 1Mbyte cache, and the number of caches occupied by the second core group is decreased by 1Mbyte cache.
Step S60, when the second frequency is less than or equal to the first frequency, decreasing the size of the cache occupied by the first core group by a preset cache size, and increasing the size of the cache occupied by the second core group by a preset cache size.
Specifically, when the second frequency Hc is less than or equal to the first frequency Hm and the number of caches occupied by the first core group is greater than 1Mbyte cache, the cache occupied by the first core group is reduced by 1Mbyte cache, and the cache occupied by the second core group is increased by 1Mbyte cache.
According to the number of program functions started by the UPF application program, the required cache number of the UPF network element is in the range of (1Mbyte-48Mbyte), in practice, the first frequency Hm of the UPF network element is 50-200 times, the second frequency Hc can be 100-1 million times, when the cache is sufficient, the second frequency Hc can be 100 times, and when the cache is insufficient, the second frequency Hc can be obviously increased to hundreds of thousands and millions of times.
The invention finally realizes that the frequency of the cache loss of the UPF network element is normal, and meanwhile, the occupied cache of the UPF network element is as small as possible, and other network elements are also allocated to obtain caches with certain sizes for use, so that the overall performance of the 5G communication system is optimal.
Further, as shown in fig. 2, based on the above CPU buffer allocation method for the 5G communication virtualization network element, the present invention also provides a terminal, where the terminal includes a processor 10, a memory 20, and a display 30. Fig. 2 shows only some of the components of the terminal, but it is to be understood that not all of the shown components are required to be implemented, and that more or fewer components may be implemented instead.
The memory 20 may in some embodiments be an internal storage unit of the terminal, such as a hard disk or a memory of the terminal. The memory 20 may also be an external storage device of the terminal in other embodiments, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like provided on the terminal. Further, the memory 20 may also include both an internal storage unit and an external storage device of the terminal. The memory 20 is used for storing application software installed in the terminal and various types of data, such as program codes of the installation terminal. The memory 20 may also be used to temporarily store data that has been output or is to be output. In an embodiment, the memory 20 stores a CPU cache allocation program 40 of the 5G communication virtualization network element, and the CPU cache allocation program 40 of the 5G communication virtualization network element can be executed by the processor 10, so as to implement the CPU cache allocation method of the 5G communication virtualization network element in this application.
The processor 10 may be, in some embodiments, a Central Processing Unit (CPU), a microprocessor or other data Processing chip, and is configured to run program codes stored in the memory 20 or process data, for example, execute a CPU cache allocation method of the 5G communication virtualization network element.
The display 30 may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch panel, or the like in some embodiments. The display 30 is used for displaying information at the terminal and for displaying a visual user interface. The components 10-30 of the terminal communicate with each other via a system bus.
In one embodiment, when the processor 10 executes the CPU buffer allocation program 40 of the 5G communication virtualization network element in the memory 20, the following steps are implemented:
numbering a preset number of operation cores of a multi-core CPU in advance, dividing all the operation cores into a first core group and a second core group, allocating a first cache to the first core group, and allocating a second cache to the second core group;
binding and setting the UPF network elements on the first core group to operate, and binding and setting all the rest virtualized network elements on the second core group to operate;
calculating a first frequency of cache miss of the UPF network element under the condition of sufficient cache according to the traffic of the UPF network element;
detecting a second frequency of triggering cache miss on the first core group every other preset period, and comparing the second frequency with the first frequency;
when the second frequency is greater than the first frequency, increasing the size of a preset cache of the cache occupied by the first core group, and reducing the size of the preset cache of the cache occupied by the second core group;
when the second frequency is less than or equal to the first frequency, reducing the size of the cache occupied by the first core group by a preset cache size, and increasing the size of the cache occupied by the second core group by a preset cache size.
The first core group comprises a first preset number of operation cores, and the second core group comprises a second preset number of operation cores.
Wherein the preset number is 16; the first preset number is 10, and the second preset number is 6; the first core set comprises an operation core 1-an operation core 10; the second core set comprises an arithmetic core 11-an arithmetic core 16; the 16 operation cores share 64Mbyte caches, the first cache is a 32Mbyte cache, and the second cache is a 32Mbyte cache; the preset cache size is 1Mbyte cache.
The pre-numbering a preset number of operation cores of a multi-core CPU, dividing all operation cores into a first core group and a second core group, allocating a first cache to the first core group, and allocating a second cache to the second core group specifically includes:
numbering 16 operation cores of a multi-core CPU in advance, wherein the number is operation core 1-operation core 16;
setting the operation cores 1-10 as the first core group, and setting the operation cores 11-16 as the second core group;
the first core group is allocated a 32Mbyte cache and the second core group is allocated the remaining 32Mbyte cache.
And under the condition of sufficient cache, the first frequency Hm of the UPF network element triggering cache miss is equal to the frequency of the UPF network element system program reading and writing new memory data.
The detecting a second frequency triggering cache miss on the first core group every preset period, and comparing the second frequency with the first frequency specifically includes:
respectively setting a corresponding cache miss register for each operation core, and accumulating 1 for the corresponding cache miss register when each operation core generates cache miss every time;
reading the increment value of the cache miss register of each operation core in the first core group to obtain a second frequency Hc triggering cache miss on the first core group;
the second frequency Hc is compared with the first frequency Hm.
When the second frequency is greater than the first frequency, increasing the size of the cache occupied by the first core group by a preset cache size, and decreasing the size of the cache occupied by the second core group by a preset cache size, specifically including:
when the second frequency Hc is larger than the first frequency Hm and the number of the caches occupied by the first core group is smaller than 64Mbyte caches, the caches occupied by the first core group are increased by 1Mbyte cache, and the caches occupied by the second core group are decreased by 1Mbyte cache.
When the second frequency is less than or equal to the first frequency, reducing the cache occupied by the first core group by a preset cache size, and increasing the cache occupied by the second core group by a preset cache size, specifically including:
when the second frequency Hc is less than or equal to the first frequency Hm and the number of the caches occupied by the first core group is greater than 1Mbyte cache, reducing the caches occupied by the first core group by 1Mbyte cache and increasing the caches occupied by the second core group by 1Mbyte cache.
The present invention further provides a storage medium, where the storage medium stores a CPU cache allocation program of a 5G communication virtualization network element, and the CPU cache allocation program of the 5G communication virtualization network element implements the steps of the CPU cache allocation method of the 5G communication virtualization network element when executed by a processor.
In summary, the present invention provides a CPU cache allocation method and a terminal for a 5G communication virtualization network element, where the method includes: numbering a preset number of operation cores of a multi-core CPU in advance, dividing all the operation cores into a first core group and a second core group, allocating a first cache to the first core group, and allocating a second cache to the second core group; binding and setting the UPF network elements on the first core group to operate, and binding and setting all the rest virtualized network elements on the second core group to operate; calculating a first frequency of cache miss of the UPF network element under the condition of sufficient cache according to the traffic of the UPF network element; detecting a second frequency of triggering cache miss on the first core group every other preset period, and comparing the second frequency with the first frequency; when the second frequency is greater than the first frequency, increasing the size of a preset cache of the cache occupied by the first core group, and reducing the size of the preset cache of the cache occupied by the second core group; when the second frequency is less than or equal to the first frequency, reducing the size of the cache occupied by the first core group by a preset cache size, and increasing the size of the cache occupied by the second core group by a preset cache size. The invention ensures that the UPF network element has enough cache to reduce the frequency of cache deletion of the UPF network element by priority, simultaneously, the cache occupied by the UPF network element is as small as possible, and other network elements are also allocated to obtain caches with certain sizes for use, so that the overall performance of the 5G communication system is optimal.
Of course, it will be understood by those skilled in the art that all or part of the processes of the methods of the above embodiments may be implemented by a computer program instructing relevant hardware (such as a processor, a controller, etc.), and the program may be stored in a computer readable storage medium, and when executed, the program may include the processes of the above method embodiments. The storage medium may be a memory, a magnetic disk, an optical disk, etc.
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.
Claims (10)
1. A CPU cache allocation method of a 5G communication virtualization network element is characterized in that the CPU cache allocation method of the 5G communication virtualization network element comprises the following steps:
numbering a preset number of operation cores of a multi-core CPU in advance, dividing all the operation cores into a first core group and a second core group, allocating a first cache to the first core group, and allocating a second cache to the second core group;
binding and setting the UPF network elements on the first core group to operate, and binding and setting all the rest virtualized network elements on the second core group to operate;
calculating a first frequency of cache miss of the UPF network element under the condition of sufficient cache according to the traffic of the UPF network element;
detecting a second frequency of triggering cache miss on the first core group every other preset period, and comparing the second frequency with the first frequency;
when the second frequency is greater than the first frequency, increasing the size of a preset cache of the cache occupied by the first core group, and reducing the size of the preset cache of the cache occupied by the second core group;
when the second frequency is less than or equal to the first frequency, reducing the size of the cache occupied by the first core group by a preset cache size, and increasing the size of the cache occupied by the second core group by a preset cache size.
2. The method of claim 1, wherein the first core group comprises a first predetermined number of computational cores, and the second core group comprises a second predetermined number of computational cores.
3. The method of claim 2, wherein the predetermined number is 16; the first preset number is 10, and the second preset number is 6; the first core set comprises an operation core 1-an operation core 10; the second core set comprises an arithmetic core 11-an arithmetic core 16; the 16 operation cores share 64Mbyte caches, the first cache is a 32Mbyte cache, and the second cache is a 32Mbyte cache; the preset cache size is 1Mbyte cache.
4. The method according to claim 3, wherein the pre-numbering a preset number of operating cores of a multi-core CPU, dividing all the operating cores into a first core group and a second core group, allocating a first cache to the first core group, and allocating a second cache to the second core group specifically comprises:
numbering 16 operation cores of a multi-core CPU in advance, wherein the number is operation core 1-operation core 16;
setting the operation cores 1-10 as the first core group, and setting the operation cores 11-16 as the second core group;
the first core group is allocated a 32Mbyte cache and the second core group is allocated the remaining 32Mbyte cache.
5. The method of claim 4, wherein the first frequency Hm of the UPF network element triggering cache miss is equal to the frequency of the UPF network element system program reading and writing new memory data when the cache is sufficient.
6. The method of claim 5G communication virtualization network element CPU cache allocation, according to claim 5, wherein the detecting a second frequency that triggers cache miss on the first core group every preset period, and comparing the second frequency with the first frequency specifically includes:
respectively setting a corresponding cache miss register for each operation core, and accumulating 1 for the corresponding cache miss register when each operation core generates cache miss every time;
reading the increment value of the cache miss register of each operation core in the first core group to obtain a second frequency Hc triggering cache miss on the first core group;
the second frequency Hc is compared with the first frequency Hm.
7. The method of claim 6, wherein when the second frequency is greater than the first frequency, the method increases the size of the cache occupied by the first core group by a preset cache size, and decreases the size of the cache occupied by the second core group by a preset cache size, specifically comprising:
when the second frequency Hc is larger than the first frequency Hm and the number of the caches occupied by the first core group is smaller than 64Mbyte caches, the caches occupied by the first core group are increased by 1Mbyte cache, and the caches occupied by the second core group are decreased by 1Mbyte cache.
8. The method of claim 6, wherein when the second frequency is less than or equal to the first frequency, the method of allocating the CPU cache of the 5G communication virtualization network element reduces the cache occupied by the first core group by a preset cache size, and increases the cache occupied by the second core group by a preset cache size specifically includes:
when the second frequency Hc is less than or equal to the first frequency Hm and the number of the caches occupied by the first core group is greater than 1Mbyte cache, reducing the caches occupied by the first core group by 1Mbyte cache and increasing the caches occupied by the second core group by 1Mbyte cache.
9. A terminal, characterized in that the terminal comprises: a memory, a processor and a CPU cache allocation program of a 5G communication virtualization network element stored on the memory and operable on the processor, wherein the CPU cache allocation program of the 5G communication virtualization network element when executed by the processor implements the steps of the CPU cache allocation method of the 5G communication virtualization network element according to any one of claims 1 to 8.
10. A storage medium, characterized in that the storage medium stores a CPU cache allocation program of a 5G communication virtualization network element, and the CPU cache allocation program of the 5G communication virtualization network element implements the steps of the CPU cache allocation method of the 5G communication virtualization network element according to any one of claims 1 to 8 when executed by a processor.
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