JPH06275828A - Thin-film transistor and its manufacture - Google Patents

Abstract

PURPOSE:To provide a thin-film transistor with a metal sate having aluminum as a main constituent by constituting a gate electrode in at least double-layer multilayer structure, constituting a lower layer with a highly pure aluminum, and then constituting an upper layer with aluminum containing silicon. CONSTITUTION:An undeslying film 32 of silicon oxide is formed on a substrate 31. Further, an intrinsic (I-type) amorphous silicon film is formed and then silicon oxide film is deposited on it. Then, the amorphous silicon film is crystallized. After that, an island-shaped silicon region 33 is formed by patterning the silicon film and further silicon oxide film 34 is deposited as a gate insulation film. Then, a first aluminum film is deposited. The purity of aluminum is equal to or more than 99.9%. The film formation process of the silicon oxide and the aluminum film should be performed continuously. Then, a second aluminum film containing 0.5-3%, silicon is deposited and then the first and second aluminum films are subjected to patterning to form a gate electrode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor (TFT) having a non-single crystal semiconductor thin film and a method for manufacturing the same. The thin film transistor manufactured by the present invention is formed on either an insulating substrate such as glass or a semiconductor substrate such as single crystal silicon.

[0002]

2. Description of the Related Art Recently, research has been conducted on an insulating gate type semiconductor device having a thin film active layer (also called an active region) on an insulating substrate. In particular, thin-film insulating gate transistors, so-called thin film transistors (TFTs), have been eagerly studied. These are distinguished as an amorphous silicon TFT or a crystalline silicon TFT depending on the material / crystal state of the semiconductor used.

A crystalline semiconductor has a larger electric field mobility than an amorphous semiconductor, and therefore can operate at high speed. Also, with crystalline silicon, not only NMOS TFTs but also PMOS TFTs can be obtained in the same way, so CMO
It is possible to form S circuits. Therefore, particularly recently, TFTs using crystalline silicon have been actively researched.

[0004]

Conventionally, in a crystalline silicon semiconductor, research has been conducted on the use of aluminum as the material of the gate electrode because of its advantage of low sheet resistance. However, with pure aluminum, 100
Hillocks were generated by heat treatment above ℃. This hillock is much smaller in devices with a channel length of 10 μm or more.
Although not an issue, smaller devices, typically 2-10 μm devices, caused fatal defects.

Therefore, it is usually 0.5% in aluminum.
As described above, a material in which hillock generation is suppressed by adding 2% or more of silicon is preferably used. A method of forming such a gate electrode is shown in FIG. A base insulating film 12 is deposited on a substrate 11, an island-shaped silicon region 13 is further formed, a gate insulating film 14 is deposited to cover the island-shaped silicon region 13, and an aluminum film 15 is continuously formed by a vacuum evaporation method or a sputtering method. Deposit. (Fig. 2 (A))

Then, patterning is performed by a known photolithography method and the aluminum 15 is etched to form a gate electrode 15a. For etching, wet etching using an acid such as phosphoric acid was used from the viewpoint of mass productivity. However, in such etching, a residue as shown by 16 in the figure was observed. This is mainly composed of silicon, and was generated by agglomeration of silicon or aluminum silicide remaining unetched during the etching process. (Fig. 2 (B))

In order to remove the residue 16, it was necessary to treat with an acid containing hydrofluoric acid, but in that case, the gate insulating film 14 (usually silicon oxide) existing thereunder was processed. Naru) will be damaged. That is, the gate insulating film is not a little etched,
Therefore, when the gate electrode is anodized later, vacancies are formed between the anodic oxide of the gate electrode and the gate insulating film, which lowers the reliability. Therefore, there has been a demand for a gate electrode structure that does not cause such a residue.

[0008]

According to the present invention, the gate electrode has a multilayer structure of at least two layers, the lower layer is made of aluminum having a relatively high purity of 99.5% or more, and the upper layer is made of 0.5% silicon. The above problem is solved by using aluminum containing 2% or more. In such a multilayer film, the residue of silicon or the like agglomerates until the etching progresses, but since all the aluminum is dissolved in the vicinity of the gate insulating film, such a residue also adheres to the gate insulating film. Can be removed without Therefore, treatment with hydrofluoric acid or the like is unnecessary. Therefore,
The gate insulating film was hardly affected, and the effect was particularly great when the gate electrode was subsequently anodized.

Further, it has been found that there is substantially no problem with hillocks by making the thickness of aluminum in the upper layer of the gate electrode preferably 5 times or more the thickness of aluminum in the lower layer. Therefore, the present invention is particularly
It is effective when there is a process requiring a temperature of 0 ° C or higher, preferably 250 ° C or higher.

A conceptual diagram of the present invention is shown in FIG. A base insulating film 2 is deposited on a substrate 1 to form an island-shaped silicon region 3, and a gate insulating film 4 and a lower aluminum film (99.5% or more) 5 and an upper aluminum film (0 0.5% or more, preferably 2% or more of silicon) is deposited. (FIG. 1A) Then, this is patterned by a known photolithography method and etched with an acid such as phosphoric acid to form a gate electrode (consisting of the upper layer film 6a and the lower layer film 5a). (Fig. 1 (B))

Since aluminum has strong light reflection, after forming an upper aluminum film, sputtering method, C
Amorphous silicon or the coating film 7 containing amorphous silicon as a main component may be formed as an antireflection film by the VD method or the like. (FIG. 1 (C)) Hereinafter, the present invention will be described in more detail with reference to Examples.

[0012]

[Embodiment] [Embodiment 1] FIG. 3 shows a cross-sectional view of a manufacturing process of this embodiment. First, the substrate (Corning 7059) 31
An underlying film 32 of silicon oxide having a thickness of 2000 Å was formed on the upper surface by a sputtering method. Further, by the plasma CVD method, the thickness is 500 to 1500Å, for example 1500Å
Intrinsic (I-type) amorphous silicon film was further deposited thereon, and a 200 Å thick silicon oxide film was further deposited thereon by a sputtering method. Then, this amorphous silicon film was annealed in a nitrogen atmosphere at 600 ° C. for 48 hours to be crystallized.

After the crystallization step, the silicon film was patterned to form island-shaped silicon regions 33, and a 1000 Å thick silicon oxide film 34 was further deposited as a gate insulating film by a sputtering method. For sputtering, silicon oxide is used as a target, the substrate temperature during sputtering is 200 to 400 ° C., for example 250 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0.
.About.0.5, for example 0.1 or less.

Subsequently, by the sputtering method,
An aluminum film (first aluminum film) having a thickness of 200 to 2000Å, for example, 500Å, was deposited. The purity of aluminum was 99.9% or more. In addition, it is desirable that the steps of forming the silicon oxide film and the aluminum film are continuously performed. Subsequently, an aluminum film (second aluminum film) containing 0.5 to 3%, for example, 2% of silicon was deposited to a thickness of 1000 to 10000Å, for example 5000Å. Then, the first and second aluminum films were patterned to form a gate electrode (consisting of the first aluminum 35 and the second aluminum 36). (Fig. 3
(A))

Subsequently, the substrate was immersed in a solution of tartaric acid in ethylene glycol (1 to 5%), and a current was passed through the gate electrode to grow an anodic oxide (aluminum oxide) layer 37 on the surface of the gate electrode. The thickness of anodic oxide is 1000
~ 5000Å, especially 2000-3000Å was preferred. Here, it is set to 2500Å. (Fig. 3 (B))

Then, by the plasma doping method,
Impurities (phosphorus) were implanted into the silicon region using the gate electrode and the surrounding anodic oxide as a mask. Phosphine (PH ₃ ) was used as the doping gas, and the acceleration voltage was 60
˜90 kV, for example 80 kV. Dose amount is 1 × 1
It was set to 0 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 2 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 38a and 38b are formed. (Fig. 3 (C))

After that, laser annealing was performed by irradiating laser light. KrF excimer laser (wavelength 248 nm, pulse width 20 nsec)
However, other lasers such as XeF excimer laser (wavelength 353 nm), XeCl excimer laser (wavelength 308 nm), ArF excimer laser (wavelength 193 nm) and the like may be used. The energy density of the laser was 200 to 500 mJ / cm ² , for example 250 mJ / cm ^2, and the irradiation was performed for 2 to 10 shots, for example, 2 shots, per location. At the time of laser irradiation, the substrate was heated to 100 to 450 ° C, for example 250 ° C. In this way, the impurities were activated. (Fig. 3 (D))

Subsequently, a silicon oxide film 39 having a thickness of 6000Å
Is formed by plasma CVD as an interlayer insulator,
A contact hole is formed in this, and the TFT is made of a metal material, for example, a multilayer film of titanium nitride and aluminum.
Source / drain region electrodes / wirings 40a, 40
b was formed. Finally, in a hydrogen atmosphere at 1 atm, 350
Annealing was performed at 30 ° C. for 30 minutes. The thin film transistor was completed through the above steps. (Fig. 3 (E))

[Embodiment 2] FIG. 4 shows a cross-sectional view of a manufacturing process of this embodiment. First, the substrate (Corning 7059) 4
An underlayer film 42 of silicon oxide having a thickness of 2000 Å was formed on the substrate 1 by sputtering. Furthermore, plasma CVD
Depending on the method, the thickness is 200-1500Å, for example 500Å
Intrinsic (I-type) amorphous silicon film was deposited.
Then, this silicon film was patterned to form an island-shaped silicon film 43. Further, the silicon region was crystallized by laser annealing. As the laser, a KrF excimer laser (wavelength 248 nm) is used,
Laser energy density is 200-500 mJ / c
m ² , for example, 350 mJ / cm ² and 2 per location
Irradiation was performed for 10 shots, for example, 2 shots. At the time of laser irradiation, the substrate was heated to 100 to 450 ° C, for example 350 ° C.

Furthermore, tetra-ethoxy-silane (Si
Using (OC ₂ H ₅ ) ₄ , TEOS) and oxygen as raw materials, a 1000 Å-thick silicon oxide 44 was formed as a gate insulating film of a crystalline silicon TFT by a plasma CVD method. As the raw material, trichlorethylene (C ₂ HCl ₃ ) was used in addition to the above gas. Oxygen 400SCCM flow into the chamber before film formation, substrate temperature 300 ° C, total pressure 5P
a, plasma was generated with an RF power of 150 W, and this state was maintained for 10 minutes. After that, 300S oxygen is added to the chamber.
A silicon oxide film was formed by introducing 15 SCCM of CCM and TEOS and 2 SCCM of trichloroethylene. The substrate temperature, RF power, and total pressure are each 300
C., 75 W, 5 Pa. After the film formation was completed, 100 Torr of hydrogen was introduced into the chamber, and hydrogen annealing was performed at 350 ° C. for 35 minutes.

Subsequently, by the sputtering method,
An aluminum film (first aluminum film) having a thickness of 200 to 2000Å, for example, 500Å, was deposited. The purity of aluminum was 99.9% or more. Subsequently, an aluminum film (second aluminum film) containing 0.5 to 3%, for example, 2% of silicon has a thickness of 1000 to 10000Å,
For example, 5000 Å was deposited.

Further, by a sputtering method, an antireflection film having a thickness of 100 to 2000Å, for example, 200
Å amorphous silicon film was deposited. Then, this multilayer film was patterned to form the gate electrode 45 of the TFT. The antireflection film 46 remained on the gate electrode. Due to the presence of the antireflection film, fine patterning of, for example, 7 μm or less could be accurately performed. (Fig. 4
(A))

Next, the surfaces of the gate electrode 45 and the antireflection film 46 were anodized to form an oxide (aluminum oxide and silicon oxide) layer 47 on the surface. Anodization was performed in a 1-5% ethylene glycol solution of tartaric acid. The thickness of the obtained oxide layer was 2000Å. The antireflection film 46 was almost completely oxidized. And
Impurities (phosphorus) were implanted by ion implantation using the gate electrode as a mask. The acceleration voltage was 80 kV, and the dose amount was 2 × 10 ¹⁵ cm ^-2 . As a result, N type impurity regions 48a and 48b are formed. (Fig. 4 (C))

After that, the anodic oxide 47 on the gate electrode and the silicon oxide film 44 (except those existing under the gate electrode) were removed. Then, in this state, the impurities were activated by laser annealing. As a laser, a KrF excimer laser (wavelength 248
nm, pulse width 20 nsec) was used. The energy density of the laser was 200 to 500 mJ / cm ² , for example 250 mJ / cm ^2, and the irradiation was performed for 2 to 10 shots, for example, 2 shots, per location. At the time of laser irradiation, the substrate was heated to 100 to 450 ° C, for example 250 ° C. In this way, the impurities were activated. (Fig. 4 (D))

Subsequently, as an interlayer insulator, the thickness is 2000 Å
CV using TEOS as the raw material for the silicon oxide film 49 of
D method is used to form contact holes in the D method, and the source / drain electrodes / wirings 50a, 50 are made of a metal material, for example, a multilayer film of titanium nitride and aluminum.
b was formed. The semiconductor circuit is completed through the above steps. (Fig. 4 (E))

The field effect mobility of the manufactured thin film transistor is 70 to 100 cm ² / V at a gate voltage of 10V.
s, the threshold value was 2.5 to 4.0 V, and the leak current when a voltage of -20 V was applied to the gate was 10 ^-13 A or less.

[0027]

According to the present invention, a TFT having a metal gate containing aluminum as its main component can be obtained.
The gate electrode of the present invention has excellent heat resistance and is unlikely to cause hillocks. Therefore, a great effect is brought about when it is used for a fine pattern of 10 μm or less, particularly 7 μm or less. Thus, the present invention is an industrially useful invention.

[Brief description of drawings]

FIG. 1 shows a configuration example of a gate of a TFT of the present invention.

FIG. 2 shows a configuration example of a conventional TFT gate.

3A to 3D are cross-sectional views of the manufacturing process of the first embodiment.

4A to 4C are cross-sectional views of a manufacturing process of Example 2.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Base insulating film (silicon oxide) 3 ... Island silicon region 4 ... Gate insulating film (silicon oxide) 5 ... Lower aluminum film 6 ... Upper aluminum Film 7 ... Antireflection film

Claims (7)

[Claims] 1. A thin-film non-single-crystal semiconductor region formed on a substrate, and a gate electrode formed thereon,
The gate electrode is a thin film transistor characterized in that a lower layer is made of high-purity aluminum of 99.5% or more and an upper layer is made of aluminum containing silicon in a concentration of 0.5% or more. 2. The thin film transistor according to claim 1, wherein at least a side surface of the gate electrode has an anodic oxide of a gate electrode material. 3. The thin film transistor according to claim 1, wherein the concentration of silicon contained in aluminum in the upper layer of the gate electrode is 2% or more. 4. The thin film transistor according to claim 1, wherein the thickness of aluminum in the upper layer of the gate electrode is 5 times or more the thickness of aluminum in the lower layer. 5. A first step of forming an island-shaped non-single-crystal semiconductor region on a substrate, an insulating coating covering the non-single-crystal semiconductor region, and a purity of 99.5% or more on the insulating coating. A second aluminum film made of aluminum, and a second step of forming a second aluminum film made of aluminum containing 0.5% or more of silicon on the first aluminum film; A third step of patterning the second aluminum film by a photolithography method and etching the gate electrode to form a gate electrode. 6. The method according to claim 5, further comprising a step of forming a film containing amorphous silicon as a main component on the second aluminum film after the second step and before the third step. And a method for manufacturing a thin film transistor. 7. The method for manufacturing a thin film transistor according to claim 5, further comprising a step of anodizing the gate electrode after the third step.