JPH04226040A - Manufacture of polycrystalline silicon thin-film transistor, and active matrix substrate - Google Patents

Abstract

PURPOSE:To produce a large-area TFT substrate with good productivity. CONSTITUTION:A gate insulator film 4 is formed on a non-single-crystal semiconductor 3, and a non-single-crystal semiconductor 5 for a gate electrode is formed on the gate insulator. Impurity is introduced into the semiconductor 5 and the semiconductor 3 in source and drain regions on an insulating substrate 1. Then, a laser beam 6 is applied so that, though the semiconductors 3 is not perfectly melted, it can be polycrystalline or improved in crystallinity in the channel region on the substrate, while the semiconductor 5 for the gate electrode and the semiconductor 3 in the source and drain regions on the substrate can simultaneously be polycrystalline and activated, or activated and improved in crystallinity.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a polycrystalline semiconductor thin film transistor used for driving an image display device, etc.

0002

2. Description of the Related Art In recent years, thin film transistors (TFTs) have been actively developed for application to image display elements such as flat displays. Polycrystalline semiconductor TFTs have advantages such as higher performance and higher reliability than those using amorphous semiconductor thin films, but have the disadvantage of requiring high temperatures for film formation. Therefore, research and application of crystallization techniques for amorphous semiconductor thin films using laser light irradiation, which can obtain polycrystalline semiconductor thin films without going through high-temperature processes, are being actively conducted.

In addition, attempts have been made to reduce the parasitic capacitance between the gate and drain in order to improve the operating speed of TFTs, but the source electrode (hereinafter referred to as source) and the drain electrode (hereinafter referred to as drain) are connected to the gate electrode. (hereinafter referred to as gate) is an extremely effective method.

A conventional manufacturing method of a laser polycrystalline TFT in which the source/drain regions are formed in self-alignment with the gate by ion implantation will be explained with reference to FIG. FIG. 2(a) is a cross-sectional view showing the first stage of the conventional TFT manufacturing method, and FIG. 2(b) is a cross-sectional view showing the next stage of the TFT manufacturing method shown in FIG. 2(a). It is.

A passivation film 22 is formed on the insulating substrate 21.
, an amorphous semiconductor layer 23 is laminated, polycrystallization is performed by laser beam irradiation, a pattern of a polycrystalline semiconductor thin film 26 is formed by photolithography, and a gate insulating film 24 is formed on the amorphous semiconductor layer 23 .
A conductive material 25 that will become the gate electrode is laminated, a gate pattern is formed again by photolithography, and the gate insulating film is also etched into the same pattern as the gate.

Here, impurity ions are doped into the polycrystalline semiconductor layer 26 by ion implantation using the gate as a mask, and heat treatment is performed to activate the impurity ions to form source/drain regions. Further, an interlayer insulating film is deposited, contact holes are formed on the source/drain regions, and a source and a drain are formed thereon.

[0007]

[Problem to be Solved by the Invention] In the conventional method of activating impurity ions by heat treatment, when a material with good productivity and low heat resistance, such as glass, is used as a substrate, the activation of impurity ions is difficult. Since the heat treatment cannot be performed at a high enough temperature, the resistance of the source/drain region cannot be lowered sufficiently.

Furthermore, in order to perform heat treatment at a sufficiently high temperature, a substrate material with good heat resistance such as quartz, which has poor productivity, must be used, and a large-area substrate cannot be used. Therefore, with the conventional methods, there is a problem in that it is not possible to realize a large-area display or to reduce costs by manufacturing a plurality of products from a large-area substrate.

[0009]

[Means for Solving the Problems] The present invention has been made to solve the above-mentioned problems, and consists of beam annealing a non-single crystal semiconductor formed on an insulating substrate with laser light to polycrystallize it. In a method for manufacturing a thin film transistor,
A gate insulating film is formed on the non-single crystal semiconductor, a non-single crystal semiconductor is further formed on the gate insulating film as a semiconductor of the gate electrode, and a non-single crystal semiconductor is formed on the semiconductor of the gate electrode and the non-single crystal semiconductor of the source/drain region on the insulating substrate. After implanting impurity ions into the single crystal semiconductor, laser light is irradiated to polycrystallize or polycrystallize the non-single crystal semiconductor on the insulating substrate in the channel region without completely melting the non-single crystal semiconductor. Improved crystallinity, the semiconductor of the gate electrode and the source
The present invention provides a method for manufacturing a polycrystalline semiconductor thin film transistor, characterized in that the non-single crystal semiconductor on the insulating substrate in the drain region is polycrystallized and activated, or crystallinity is improved and activated at the same time.

The present invention will be explained below with reference to the drawings. FIG. 1(a) is a cross-sectional view showing the first step of the manufacturing method of the present invention. FIG. 1(b) is a sectional view showing the next stage of FIG. 1(a). FIG. 1(c) is a sectional view showing the final stage of the invention.

In FIGS. 1(a), (b), and (c), first, an insulating substrate 1 made of glass, ceramic, plastic, etc.
SiOx, SiNx, SiOxNy,
Passivation film 2 consisting of a single layer or multilayer film such as TaOx (film thickness 50 to 1000 nm), silicon (Si)
, an amorphous semiconductor layer 3 (film thickness: 10 to 500 nm) made of a non-single crystal semiconductor such as germanium (Ge).

[0012] Instead of this amorphous semiconductor, the particle size is 50 μm.
So-called microcrystalline semiconductors or polycrystalline semiconductors containing fine crystal grains of less than m in size can also be used. When a polycrystalline semiconductor is used, the crystallinity is improved by laser irradiation performed later, and the current amplification factor of the TFT is improved.

Although an amorphous semiconductor is used as a representative example in the description of the present invention, the present invention is also applicable to cases where a microcrystalline semiconductor or a polycrystalline semiconductor is used instead of an amorphous semiconductor.

When amorphous silicon is used as the amorphous semiconductor, the hydrogen content of the amorphous silicon is approximately 0.5 to 20% in order to stably perform the laser beam annealing process.
A range of atomic percent is preferred. If it is more than 20 atom%, the usable laser power range is narrow and the amorphous silicon film is likely to peel off, and if it is less than 0.5 atom%, a larger laser power is required and the scanning speed is lowered. I have to do it, which is bad for productivity. More preferably, it is 1 to 10 atomic %.

[0015] Such amorphous silicon can be used in plasma CVD.
It can be formed using the D method at a substrate temperature of 350°C or higher, it can also be formed by controlling the hydrogen partial pressure in the reaction vessel by sputtering or ion cluster beam evaporation, or it can be formed by low pressure CVD, etc. You can. In addition, amorphous silicon with a hydrogen content of about 20 at.% or more formed by plasma CVD or the like can be heat-treated at a temperature of 450°C or higher to release hydrogen, and the hydrogen content can be reduced to about 10 at.% or less. .

Furthermore, in order to control the threshold voltage of a thin film transistor, impurities such as boron (B) or phosphorus (P) are added uniformly or non-uniformly in the thickness direction of the amorphous semiconductor in an amount of several tens to hundreds of ppm. May contain.

The amorphous semiconductor layer 3 is patterned by photolithography, and SiOx is deposited thereon by plasma CVD, sputtering, low pressure CVD, normal pressure CVD, etc.
, SiNx, SiOxNy, TaOx, etc., is formed. Furthermore, a non-single crystal semiconductor such as Si or Ge is formed thereon as a semiconductor material for a gate electrode.

The semiconductor material of this gate electrode is selected from the insulating substrate 1 from the viewpoint of stability of the laser beam annealing process.
Although it is desirable that it be of the same type as the amorphous semiconductor layer above, it may contain more impurities such as B and P in order to increase the conductivity of the gate electrode.

The amorphous semiconductor is again formed in a gate pattern by photolithography to form a gate semiconductor 5. The gate insulating film 4 is also partially or completely etched in the same pattern as the gate, if necessary.

Furthermore, using the gate as a mask, phosphorus (P), boron (B), and arsenic (As) are added to the portions 9 and 10 of the amorphous semiconductor layer 3 that will become the source/drain regions by ion implantation.
5 x 10 impurity ions such as
Dope at 14 to 1×10 16 pieces/cm 2 . At this time, ions such as hydrogen (H) and fluorine (F) may be implanted at the same time, and molecular ions such as PHx, BxHy, and BFx may be implanted at the same time. At this time, the amorphous gate semiconductor 5 is also doped with impurity ions at the same time.

Since the gate was used as a mask, the portion of the amorphous semiconductor 3 under the gate was filled with phosphorus (P) and boron (B).
etc. are not doped, so there is no need to align the positional relationship between the source/drain region and the gate, and inevitably (
self-consistently).

At this point, laser light 6 is irradiated to simultaneously polycrystallize the amorphous semiconductor layer 3 and activate the impurity ions. By optimizing the thickness of each thin film and each layer and laser light irradiation conditions, a gate semiconductor 5 which is an amorphous semiconductor, a portion 9 and 10 which will become a source/drain region and a channel region of the amorphous semiconductor layer are formed. , 11 can be simultaneously polycrystallized by one laser beam irradiation.

As the laser, a continuous wave argon ion laser, a krypton ion laser, etc. can be used, but from the viewpoint of productivity and stability, it is preferable to use an argon ion laser and perform high-speed scanning. Here, "high speed" means that the scanning speed is equal to or higher than the beam spot diameter x 5000/sec, and at this time, the amorphous semiconductor becomes polycrystalline without being completely molten.

This is shown by the fact that the ion distribution in the semiconductor does not change before and after the laser beam irradiation, as shown in FIG.

FIG. 3 shows the results of measuring the depthwise concentration distribution of an impurity (boron (B)) in a silicon thin film by SIMS (secondary ion mass spectrometry).

In FIG. 3, curve (a) shows that after B+ ions are implanted into amorphous silicon at an accelerating voltage of 40 kV,
This is the concentration distribution of boron (B) without any heat treatment. Curve (b) is an argon ion laser with a beam diameter of 50 μm, beam energy of 8 W, and a scanning speed of 10 m/
Boron (B) after annealing and polycrystallization under the conditions of s
shows the concentration distribution of

Curve (c) shows the concentration distribution of boron (B) after polycrystallization by annealing with a pulsed XeCl excimer laser at an energy of 0.8 J/cm-2. In the curve (c), it can be seen that Si in the silicon is diffused and the silicon is completely melted during polycrystallization. On the other hand, curve (b) shows almost no change compared to curve (a), and it is considered that no melting of silicon occurs.

The laser beam irradiation may be performed in the air, in a vacuum, or in an atmosphere of nitrogen gas, hydrogen gas, etc., and the insulating substrate 1 may be heated or cooled. In the case of high-speed scanning with an argon ion laser, the influence of these differences in conditions is small, so from the viewpoint of productivity it is desirable to perform the scanning in the atmosphere at room temperature.

Prior to laser beam irradiation, an insulating film of SiOx, SiNx, SiOxNy, TaOx or the like may be formed to a thickness of 10 to 300 nm as an antireflection film. Furthermore, an interlayer insulating film 7 is deposited, contact holes are formed on the source/drain regions and the gate electrode, and a conductor portion 8 that will become the source/drain electrode and a conductor portion 12 that will become the gate electrode are formed thereon. .

[0030] The product produced in this way contains P, B
The TFT has low-resistance polycrystalline portions 9 and 10 doped with impurity ions such as ions, and a polycrystalline semiconductor 11, and has low-resistance polycrystalline semiconductors as source and drain regions. Note that the region of the polycrystalline semiconductor 11 will be referred to as a channel region.

As mentioned above, the scanning speed of the laser beam according to the present invention is set to be at least the beam spot diameter x 5000/sec, and usually at most the beam spot diameter x 500,000/sec. Note that, specifically, the speed is preferably 40 m/sec or less. Thereby, the amorphous semiconductor thin film can be crystallized without reaching a completely molten state, and can be made into a polycrystalline semiconductor thin film.

The reason for this will be explained below from the relationship with the laser power when the amorphous semiconductor thin film changes during scanning irradiation with a laser beam.

First, when the irradiation laser power is increased from a sufficiently low value at a certain scanning speed, a first laser power threshold appears where the amorphous semiconductor thin film begins to show crystallization and becomes a polycrystalline semiconductor thin film. When the laser power is further increased, the semiconductor thin film finally reaches a molten state and a second laser power threshold is found.

In order to stably form a polycrystalline semiconductor thin film,
It is necessary to select the irradiation laser power between the first and second laser power thresholds. However, when the scanning speed is slow, the interval between the two laser power thresholds becomes small, and when the scanning speed is made even slower, there is a laser power setting margin suitable for stably forming a polycrystalline semiconductor thin film between the two thresholds. I won't. On the other hand, when the scanning speed is fast, the threshold value of the laser power both increases, and at the same time, the interval becomes wider, and the margin for setting the laser power becomes wider. In the present invention, this scanning speed is calculated by multiplying the beam spot diameter by
5000/sec or more.

Here, the reason why a desirable range of scanning speed exists in relation to the beam spot diameter is that when looking at an irradiated area that is sufficiently smaller than the beam spot diameter, at a certain scanning speed, the irradiation speed is equal to the beam spot diameter. This is because the relationship is such that the irradiation energy is approximately proportional to the irradiation time. For the above reasons, the scanning speed is set to be at least 5000/sec (beam spot diameter).

[0036] As a result, the amorphous semiconductor thin film can be crystallized without reaching a completely molten state, and can become a polycrystalline semiconductor thin film in a very short time, making it possible to use an inexpensive glass substrate with a low heat resistance. It is possible to use this method, and it is also possible to easily increase the size of the substrate. Furthermore, since the setting margin for laser power is widened, temperature control becomes easy, and since the scanning speed is high, productivity is also improved.

Note that when scanning and irradiating an amorphous silicon film with a laser beam, an insulating film such as a silicon oxide film or a silicon nitride film is formed on the amorphous semiconductor film in advance to prevent the reflection of the laser beam. It may also be used as a surface protective film.

[0038]

[Examples] Examples of the present invention will be described below. Example 1 Plasma CVD on a glass substrate (Asahi Glass AN)
A 200 nm thick SiOx passivation film and a 100 nm thick a-S
An amorphous semiconductor layer according to i was formed at a glass substrate temperature of 450°C.

The amount of hydrogen contained in this a-Si was approximately 5 atomic %. A-Si is patterned into islands by photolithography, and SiO is deposited on top of it by plasma CVD.
A gate insulating film consisting of N with a thickness of 200 nm was deposited at 300°C, and a-Si was deposited as a semiconductor material for the gate electrode.
A film thickness of 50 nm was formed under the same conditions as the amorphous semiconductor layer. The a-Si was formed in the pattern of the gate electrode 5 by photolithography, and the gate insulating film was also etched into the same pattern as the gate.

Further, by ion implantation, a of the gate electrode is
-Si and the part that will become the source/drain region of the a-Si island on the glass substrate, P ions are accelerated at a voltage of 10 kV.
Doping was carried out at a dose of 2×10 15 particles/cm 2 . Here, a 10W argon ion laser beam is focused and irradiated to a diameter of about 50 μm to polycrystallize the semiconductor of the gate electrode, the channel region, and the a-Si in the source/drain regions, and to form the semiconductor of the gate electrode and the a-Si in the source/drain regions. Impurity ions were activated at the same time. The scanning speed of the laser beam at this time was 13 m/s.

Furthermore, SiON300n is used as an interlayer insulating film.
A contact hole was formed on the gate electrode and the source/drain region, and a conductive portion that would become the gate electrode and a conductive portion that would become the source/drain electrode were formed thereon. In this way, 100 TFs can be placed on the same board.
As a result of forming TFTs and measuring the conductivity of the source/drain regions, all 100 TFTs had a conductivity of 80Ω-1cm-1.
That was it.

Example 2 Plasma CVD on glass substrate (Corning 7059)
A passivation film of SiOx with a thickness of 200 nm and an amorphous semiconductor layer of a-Si with a thickness of 200 nm were formed at a glass substrate temperature of 300° C. using the method.

The amount of hydrogen contained in this a-Si is about 18 atomic %
Met. A-Si is patterned into islands by photolithography, and Si is deposited on top of it by plasma CVD.
A gate insulating film consisting of Nx250nm was deposited at 350°C, and a-Si5 was added as a semiconductor material for the gate electrode.
A thickness of 0 nm was formed under the same conditions as the amorphous semiconductor layer. Here, heat treatment was performed at 450°C for 30 minutes in a nitrogen stream, and a-
The amount of hydrogen contained in Si was reduced to about 10%. The a-Si was formed in the pattern of the gate electrode 5 by photolithography, and the gate insulating film was also etched into the same pattern as the gate.

Further, by ion implantation, a of the gate electrode is
BFx ions (x=0 to 3) are placed in the source/drain regions of the -Si and a-Si islands on the glass substrate.
Accelerating voltage 20kV, dose amount 4 x 1015 pieces/cm2
Doping was carried out under the following conditions. After forming an 80 nm thick anti-reflection film of SiOxNy using the plasma CVD method, a 9W argon ion laser beam was applied to approximately 100 μm.
Light was focused and irradiated to a diameter of m to simultaneously polycrystallize a-Si and activate impurity ions.

The scanning speed of the laser beam at this time is 1.2
m/s. Furthermore, SiOxNy is used as an interlayer insulating film.
A 250 nm thick film was deposited, contact holes were formed on the gate electrode and the source/drain regions, and a conductor portion to become the gate electrode and a conductor portion to become the source/drain electrodes were formed thereon. In this way, 10
As a result of forming 0 TFTs and measuring the conductivity of the source/drain regions, all 100 TFTs had a resistance of 40Ω-1.
cm-1 or more.

Example 3 The a-Si film thickness was set to 50 nm, 300 nm, and 400 nm, and all other conditions were the same as in Examples 1 and 2, and TFT
was manufactured. The results were the same as in Examples 1 and 2.

Example 4 TFTs were manufactured under the same conditions as in Examples 1 and 2, except that the hydrogen content of the a-Si film was set to 4, 6, 8, and 10 atomic %. The results were the same as in Examples 1 and 2.

Example 5 The temperature of the glass substrate immediately before laser irradiation was set to 10, 30, 5
TFTs were manufactured under the same conditions as in Examples 1 and 2 except that the temperature was 0.80°C. The results were the same as in Examples 1 and 2.

[Comparative Example] A comparative example in which impurity ions are activated by heat treatment will be described below. 200n on a glass substrate (Corning 7059) by plasma CVD method.
m-thick SiOx passivation film and 200 m thick SiOx passivation film
An amorphous semiconductor layer of a-Si having a thickness of nm was formed at a glass substrate temperature of 300°C.

The amount of hydrogen contained in this a-Si is about 18 atomic %
Met. Heat treatment was performed at 450° C. for 30 minutes in a nitrogen stream, and the amount of hydrogen contained in a-Si was reduced to about 10%. Here, a 6W argon ion laser beam was focused to a diameter of approximately 50 μm and irradiated at a scanning speed of 13 m/s to polycrystallize a-Si, and then poly-S
i is patterned into an island shape, and a gate insulating film made of 250 nm of SiNx is formed on it by plasma CVD method to a thickness of 350 nm.
Deposited at ℃ and additionally Al 150 as gate material
nm was deposited at 150° C. by sputtering method.

A conductor portion to be a gate electrode was formed in the gate pattern by photolithography, and the gate insulating film was also etched in the same pattern as the gate. Furthermore, using the ion implantation method, poly-S was formed using the gate Al as a mask.
BFx ions (x=0 to 3) were applied to the source/drain regions of the island of i at an acceleration voltage of 20 kV and a dose of 4×.
Doping was carried out under the conditions of 1015 pieces/cm2. Here, heat treatment for activating impurity ions was performed at 300°C, 400°C, or 550°C for 60 minutes.

Furthermore, SiON300n is used as an interlayer insulating film.
Contact holes were formed on the source/drain regions, and conductor portions to become source/drain electrodes were formed thereon.

In this way, 100 TFs are placed on the same board.
As a result of forming the T and measuring the conductivity of the source/drain regions, it was found that the substrate which was heat-treated for activation at 300° C. had an insufficient conductivity of about 0.5 Ω −1 cm −1 . 4
The conductivity of the substrate heat-treated at 00° C. was still insufficient at about 4 Ω −1 cm −1, and the Al wiring was damaged by the heat, causing so-called hillocks.

[0054] A substrate heat-treated at 550°C has a resistance of about 40Ω-
Although the electrical conductivity was quite good at 1 cm -1 , the damage to the Al was even more severe, and some parts were disconnected. In addition, at this temperature, the glass substrate shrinks and deforms significantly due to heat treatment.
The shrinkage is about 4 μm for 100 mm, and it is considered impossible to use a larger glass substrate.

[0055]

Effects of the Invention The present invention uses an amorphous semiconductor layer as a semiconductor material for a gate electrode, and irradiates it with laser light to polycrystallize and activate the gate electrode, polycrystallize the channel region, and transform the source and drain regions. Since polycrystalization and activation are performed simultaneously, the conductivity of the source/drain region can be greatly improved compared to the case of activation by conventional heat treatment.

For example, in the case of an n-type implanted with P ions, the conductivity is 7Ω-1cm with conventional heat treatment (500°C for 1 hour).
-1, whereas the method using laser light irradiation of the present invention was able to improve it by more than one order of magnitude to about 80 Ω-1 cm-1. As a result, the on-state current of the transistor increases and the off-state current remains unchanged, so that the driving ability of the TFT increases, the number of active matrix scanning lines can be increased, and a finer display can be manufactured.

In addition, since no heat treatment is performed, it is possible to use glass substrates with good productivity and low heat resistance, and it is possible to use large-area substrates, making it possible to realize large-area displays or It has become possible to manufacture multiple products and reduce costs. Furthermore, since no heat treatment is performed, Al, which has a low melting point and low resistance, can be used as the wiring material, and the problem of increased wiring resistance in large-area displays can be solved.

Furthermore, since the manufacturing method of the present invention simultaneously polycrystallizes the channel portion, the number of steps can be reduced by the amount of heat treatment required for activating the source/drain regions compared to the conventional method. Is recognized.

[Brief explanation of the drawing]

FIGS. 1(a), (b) and (c) are cross-sectional views showing a first stage, a next stage, and a final stage, respectively, of the manufacturing method of the present invention.

FIGS. 2(a) and 2(b) are cross-sectional views showing a first stage and a next stage, respectively, of a conventional TFT manufacturing method.

FIG. 3 is a characteristic diagram showing impurity ion distribution in a silicon thin film before and after laser beam irradiation.

[Explanation of symbols]

2 Passivation film 3 Amorphous semiconductor layer 4 Gate insulating film 5　Conductor part that becomes the gate electrode

Claims (3)

[Claims] 1. A method for manufacturing a thin film transistor in which a non-single-crystal semiconductor formed on an insulating substrate is beam-annealed with laser light to polycrystallize it, which further comprises forming a gate insulating film on the non-single-crystal semiconductor; A non-single crystal semiconductor is formed on the gate insulating film as the semiconductor of the gate electrode, impurity ions are implanted into the semiconductor of the gate electrode and the non-single crystal semiconductor on the insulating substrate in the source/drain regions, and then laser light is irradiated. , polycrystallization or crystallinity improvement of the non-single-crystal semiconductor on the insulating substrate in the channel region without bringing the non-single-crystal semiconductor into a complete melting state; Polycrystalization and activation of a non-single crystal semiconductor on an insulating substrate, or
A method for manufacturing a polycrystalline semiconductor thin film transistor characterized by improving crystallinity and activating it at the same time. 2. Claim 1, characterized in that the scanning speed of the laser beam is set to a beam spot diameter x 5000 seconds or more to polycrystallize a non-single crystal semiconductor on an insulating substrate without bringing it into a complete molten state. A method for manufacturing a polycrystalline semiconductor thin film transistor. 3. An active matrix substrate manufactured using the method for manufacturing a polycrystalline semiconductor thin film transistor according to claim 1 or 2.