JPH06275522A - Manufacturing method of semiconductor substrate - Google Patents

Abstract

PURPOSE:To obtain a hardly warped dielectric separating substrate even if the single crystalline silicon substrate is heat-treated at low temperature by a method wherein a silicon germanium alloy containing germanium in specific concentration is melted down and crushed to be coated and set on the silicon substrate. CONSTITUTION:Firstly, a single crystal silicon substrate 51 is oxidized to form the first oxide film 52 on the surface of the substrate 51. Next, aperture parts are partly formed in the first oxide film 52 and the substrate 51 is anisotropically etched away to form V-type trenches 53. Next, after removing the first oxide film 52, the single crystalline silicon substrate 51 is oxidized again to form the second oxide film 54 on the substrate surface including the V-type trenches 53. Next, a silicon germanium alloy layer 55 is formed by melting down and crushing the germanium alloy to be coated and set on the second oxide film 54 on the substrate 51. Through these procedures, the warping of the silicon substrate 51 can be suppressed by specifying the germanium concentration in the silicon germanium alloy to be 4.5-5.0at.% thereby cancelling the thermal stress with the volume expansion stress.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated device, and more particularly to a method for manufacturing a semiconductor substrate used for manufacturing a high breakdown voltage semiconductor element.

[0002]

2. Description of the Related Art In a conventional semiconductor integrated device, many semiconductor elements such as transistors are formed on a common substrate. At this time, semiconductor elements are formed so as not to affect each other electrically. A semiconductor substrate having a structure in which the spaces are electrically insulated and separated is required.

Many methods of manufacturing the semiconductor substrate have been proposed in the past. Some of these manufacturing methods require the step of forming a thick polycrystalline silicon layer.

As a semiconductor substrate formed by the manufacturing method having the step of forming the thick polycrystalline silicon layer, for example, a dielectric isolation substrate as shown in FIG. 6 or an SOI (Silicon On) as shown in FIG. Insulator) board,
These are support layers 12 and 2 which mechanically support the single crystal silicon islands 11 and the single crystal silicon layers 21 which are active regions.
When a polycrystalline silicon layer is used as 2, insulating film 13,
23, it is necessary to form this thick polycrystalline silicon layer.

In addition, the IOP as shown in FIG.
(Isolation by Oxide and Polysilicon) It is necessary to form this thick polycrystalline silicon layer also when burying the polycrystalline silicon 32 in the groove 31 for electrical insulation separation through the insulating film 33 as in a substrate or the like. Become.

A conventional method for manufacturing a semiconductor substrate of this type will be described below with reference to FIGS. 4A to 4C, taking the dielectric isolation substrate shown in FIG. 6 as an example.

First, as shown in FIG. 4A, a single crystal silicon substrate 41 is anisotropically etched to form a V-shaped groove 42, and an impurity of the same conductivity type as that of the polycrystalline silicon substrate is diffused over the entire surface. , The buried layer 46 is formed.

Next, as shown in FIG. 4B, the single crystal silicon substrate 41 is oxidized to form an oxide film 43 for electrical insulation separation on the surface of the substrate including the V-shaped groove 42, and then oxidized. Polycrystalline silicon 44, which will be a support layer, is deposited on the film 43 to a desired thickness. This deposition method is performed by heating to about 1440 ° C., which corresponds to the melting point of silicon, and thereby melting the melted silicon into a spray shape so that the substrate temperature is 13
The melted silicon is deposited on the silicon substrate 41 kept at about 75 ° C. and solidified to deposit the polycrystalline silicon 44 on the silicon substrate 41.

After that, the surface of the polycrystalline silicon 44 is ground to a flat processing reference surface 45, and then the back surface of the single crystal silicon substrate 41 is ground and polished until the tip of the V-shaped groove 42 is exposed. A dielectric isolation substrate having the single crystal silicon island 47 shown in FIG. 4C is obtained.

[0010]

However, in the above-mentioned conventional manufacturing method, in the step of depositing the thick polycrystalline silicon to be the support layer, it is caused by the temperature difference between the deposited molten silicon and the single crystal silicon substrate. Warpage occurs in the single crystal silicon substrate due to thermal stress.

This warpage of the single crystal silicon substrate causes variations in the thickness of the single crystal silicon substrate and variations in the thickness of the single crystal silicon islands in the subsequent grinding and polishing step, and therefore it is desirable that the warpage is small.

Literature: ISSP (ISPSD
(Proceedings of 1990International Symposium on Po
wer Semicondutor Devices IC's, April 4-6,1990, pp.17
4-179) shows the relationship between the temperature of the single crystal silicon substrate and the warp of this substrate as shown in FIG.
From this relationship, it is found that when the temperature of the single crystal silicon substrate is lowered, the warp of the substrate increases. The warp of the single crystal silicon substrate is 2 in order to avoid a problem in the subsequent process.
In order to suppress the warp of the single crystal silicon substrate to 200 μm or less, which is desired to be suppressed to 00 μm or less, it can be seen from FIG. 5 that the temperature of the single crystal silicon substrate needs to be 1350 ° C. or higher.

The warp of the above single crystal silicon substrate is 200
The temperature of the single crystal silicon substrate should be 13
If the temperature is set to 50 ° C. or higher, the amount of re-diffusion of the buried layer becomes large, and the single crystal silicon island must be made large in order to secure a necessary active region in the single crystal silicon island.

Therefore, as a result of such an increase in the semiconductor element area, there is a problem that the chip size as a whole increases.

In order to eliminate the above-mentioned problem that a high temperature treatment is required to obtain a dielectric isolation substrate having a small warp, the present invention does not require a single crystal silicon substrate to be processed at a low temperature. An object of the present invention is to provide an excellent method for manufacturing a semiconductor substrate, which can obtain a dielectric isolation substrate with less warpage of a silicon substrate.

[0016]

In order to achieve the above object, the method of manufacturing a semiconductor substrate according to the present invention has a method of
5.0 at. % -Melting silicon-germanium alloy containing germanium concentration, crushing this molten silicon-germanium alloy, depositing the crushed molten silicon-germanium alloy on the silicon substrate, molten silicon-germanium alloy I tried to solidify.

[0017]

In the method of manufacturing a semiconductor substrate of the present invention described above,
Since the thermal stress caused by the temperature difference between the molten silicon-germanium alloy and the silicon substrate and the stress due to the body expansion during the solidification of the molten silicon-germanium alloy cancel each other, the warpage of the silicon substrate can be suppressed.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below by taking a dielectric isolation substrate as an example, with reference to FIGS.

First, as shown in FIG. 1A, the single crystal silicon substrate 51 is oxidized to form a first oxide film 52 having a film thickness of about 1 μm on the surface thereof.

Next, as shown in FIG. 1B, the first oxide film 52 is partially opened by photolithography etching, and the remaining first oxide film 52 is used as a protective mask to form a single crystal silicon substrate. By anisotropically etching 51,
A V-shaped groove 53 having a depth of about 50 μm is formed. Next, as shown in FIG. 1C, after removing the first oxide film 52, the single crystal silicon substrate 51 is oxidized again, and an insulating separation film having a thickness of about 2 μm is formed on the substrate surface including the V-shaped groove 53. A second oxide film 54 for forming is formed.

Next, the single crystal silicon substrate 51 is placed on a stage 61 of a spraying apparatus schematically shown in FIG.
And heat it to about 1200 ℃,
After that, the silicon-germanium alloy 64 is heated to about 1400 ° C. by a heater 65 and melted in the quartz tube 63 of the spray device, and the Ar (argon) gas ejection port 66 is used.
By spraying Ar gas, the powder is pulverized to form a spray, and is deposited and solidified on the second oxide film 54 on the rotating single-crystal silicon substrate 51, to obtain a film thickness of 500 to 500.
A silicon-germanium alloy layer 55 having a thickness of about 600 μm is formed.

Experimental results are shown in FIG. 3 as a relationship between the germanium concentration of the silicon-germanium alloy 64 and the warpage of the dielectric isolation substrate.

From the results of this experiment, when the temperature of the single crystal silicon substrate is 1200 ° C., the germanium concentration is 4.5.
~ 5.0 at. It has been found that the warpage of the silicon substrate is reduced by setting the ratio to%.

This is because the thermal stress caused by the temperature difference between the molten silicon-germanium alloy and the silicon substrate and the stress due to the body expansion during the solidification of the molten silicon-germanium alloy cancel each other, so that the warpage of the silicon substrate is suppressed. It is considered that such dependence of germanium concentration occurs.

Here, for example, the germanium concentration is 4.3 at. % Silicon-germanium alloy is used so that the warp amount of the substrate is about 100 μm.

After the above steps, as shown in FIG.
The surface of the silicon-germanium alloy layer 55 is ground to a flat processing reference surface 56, and the back surface side of the single crystal silicon substrate 51 is removed by grinding and polishing until the tip of the V-shaped groove 53 is exposed. 57 is a second oxide film 54 for insulation separation and silicon which is a support layer.
Through the germanium alloy layer 55, dielectric isolation substrates electrically isolated from each other are obtained.

Although the dielectric isolation substrate is taken up in the above embodiment, the V-shaped groove 53 shown in FIG. 1B is not formed and the rear surface side of the single crystal silicon substrate 51 shown in FIG. In the case where an SOI substrate is obtained by removing the single crystal silicon layer of several μm by grinding and polishing, a V-shaped groove 53 or a U-shaped groove is formed in the single crystal silicon substrate 51 as shown in FIG. 1B. After the formation, the second oxide film 54 is formed, the alloy layer 55 of the silicon base material shown in FIG. 1C is formed to a thickness enough to fill the groove, and the alloy layer 55 of the silicon base material is formed into a single crystal. By removing the second oxide film 54 formed on the surface of the silicon substrate 51 until it is exposed, the present invention can be applied to the case where the groove is filled with the alloy layer 55 of the silicon base material.

In the above embodiment, silicon-germanium having a predetermined concentration was prepared in advance. However, silicon and germanium were separately prepared and melted and mixed in the quartz tube 63 to obtain a silicon-germanium having a predetermined concentration. The present invention can be applied to the case.

[0029]

As described above, according to the method of manufacturing a semiconductor substrate of the present invention, 4.5 to 5.0 at. A silicon-germanium alloy containing germanium in a concentration of 10%, the molten silicon-germanium alloy is crushed, and the crushed molten silicon-germanium alloy is deposited on a silicon substrate to form a molten silicon-germanium alloy. Since it is made to solidify, when the molten silicon-germanium alloy is deposited on the silicon substrate, the substrate temperature is set to about 1200 ° C. where the re-diffusion amount of the buried layer is small, that is, even if the temperature of the silicon substrate is processed at a low temperature. The warp of the silicon substrate can be reduced.

Therefore, in the semiconductor integrated device using the semiconductor substrate manufactured by the method of the present invention, the re-diffusion amount of the buried layer is small and the chip area can be expected to be reduced.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a manufacturing process of a semiconductor substrate of the present invention.

FIG. 2 is a view for explaining a spray device used in the present invention.

FIG. 3 is a graph showing the dependence of substrate warpage on germanium concentration.

FIG. 4 is a diagram for explaining a manufacturing process of a conventional dielectric isolation substrate.

FIG. 5 is a graph showing the dependence of substrate warpage on single crystal silicon substrate temperature.

FIG. 6 is a cross-sectional view of a dielectric isolation substrate.

FIG. 7 is a cross-sectional view of an SOI substrate.

FIG. 8 is a sectional view of an IOP substrate.

[Explanation of symbols]

 51 ... Single crystal silicon substrate 52 ... First oxide film 53 ... V-shaped groove 54 ... Second oxide film 55 ... Silicon-germanium alloy layer 56 ... Processing reference plane 57・ ・ ・ Single crystal silicon island 58 ・ ・ ・ Embedded layer

Claims (1)

[Claims] 1. 4.5 to 5.0 at. % Crushing a molten silicon-germanium alloy containing germanium in a concentration of, and, after the above step, depositing the crushed molten silicon-germanium alloy on a silicon substrate, and after the step, the molten silicon -A step of solidifying a germanium alloy, and a method of manufacturing a semiconductor substrate.