JPH06273479A - Method and device for evaluating reliability of wiring - Google Patents

Method and device for evaluating reliability of wiring

Info

Publication number
JPH06273479A
JPH06273479A JP5058390A JP5839093A JPH06273479A JP H06273479 A JPH06273479 A JP H06273479A JP 5058390 A JP5058390 A JP 5058390A JP 5839093 A JP5839093 A JP 5839093A JP H06273479 A JPH06273479 A JP H06273479A
Authority
JP
Japan
Prior art keywords
current
sample
wiring
life
energization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5058390A
Other languages
Japanese (ja)
Inventor
Shinichi Fukada
晋一 深田
Kazue Kudo
一恵 工藤
Tetsuo Minemura
哲郎 峯村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5058390A priority Critical patent/JPH06273479A/en
Publication of JPH06273479A publication Critical patent/JPH06273479A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To evaluate conduction life without depending on wiring length by completing the measurement, of a sample wiring length at a point when the shortest conduction life is obtained out of the conduction life of a plurality of samples. CONSTITUTION:A sample 21 and Si substrate 21 are placed inside a constant- temperature bath 30. A constant current is applied from current terminals 23 and 24 through a power supply 31. At the same time, the voltage among voltage terminals 25-29 which are spaced equally is measured 32 and then the resistance between the voltage terminals is calculated according to the relationship between current and voltage. The distance between the voltage terminals is changed from 100 to 100mum for evaluation. The point when wiring resistance increases by 20 % in reference to the point where the resistance becomes stable and reaches a constant value is set as the conduction life of the sample. As the wiring length is reduced, the distribution of the conduction life is increased but the conduction life cannot be reduced without any limitation and a shortest value Lt0 exists. Namely, the conduction life is longer than Lt0 regardless of the wiring length. By estimating the wiring life with Lt0, a highly reliable evaluation can be obtained. Also, it is sufficient if a life which is approximately 20% of the entire part is made known and evaluation can be made quickly.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、配線特に半導体装置配
線の信頼性評価法及びその評価法により信頼性を保障さ
れた薄膜配線に関するものであり、特に積層構造を有し
ULSIに好適な薄膜配線の通電寿命評価法,評価装置
及びその評価法により信頼性を保障された配線に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reliability evaluation method for wiring, particularly semiconductor device wiring, and a thin film wiring whose reliability is ensured by the evaluation method. In particular, a thin film suitable for ULSI having a laminated structure. The present invention relates to an energization life evaluation method for wiring, an evaluation apparatus, and wiring whose reliability is guaranteed by the evaluation method.

【0002】[0002]

【従来の技術】従来、半導体装置配線の通電寿命評価法
としてはテークウオク“エフェクトオブ メタルライン
ジオメトリ オン エレクトロミグレーション ライ
フタイム イン アルミニウム カッパ サブミクロン
インターコネクイョンズ”アイイーイーイー(T. Kwo
k, “EFFECT OF METAL LINE GEOMETRY ON ELECTROMIGRA
TION LIFETIME IN Al-Cu SUBMICRON INTERCONNECTION
S”, IEEE IRPS, p.185(1988). Fig.2)に示されるよう
な4端子の試料を用い、実使用条件以上の高密度の一定
電流を印加し、配線層中の原子のエレクトロマイグレー
ションを加速する加速寿命試験が用いられてきた。この
評価法では、試料が断線に到るまでの時間を試料の通電
寿命とするが、現在使用されているAl合金/高融点金
属積層構造の配線においてはジエーシーオンドルセック
エトアル“エフェクティブ カイネスティック バリ
エーションズ ウィズ ストレス デュアレーション
フォー マルチレーヤード メタリゼーション アイイ
ーイーイー(J.C. Ondrusek et al., "EFFECTIVE KINET
IC VARIATIONS WITH STRESS DURATIONFOR MULTILAYERED
METALLIZATIONS", IEEE IRPS, p.179(1988).)に記載さ
れているようにAl合金よりなる配線層が断線しても残
された高融点金属層により導通が保たれ、試料抵抗は幾
分上昇するものの断線には到らない。そこでこの場合、
通電寿命は試料抵抗が通電開始時に比べ一定比率以上に
上昇するまでの時間で測定されている。こうして複数試
料の通電寿命を求め、全試料のうち一定比率以上が通電
寿命に到るまでの時間を使用した配線の通電寿命として
きた。また、印加する電流としては直流以外にジェーエ
ス シュエレ アンド エッチ エー シャフト“カレ
ントデンシティ デイペンデンス オブ エレクトロミ
グレーション”(J. S. Suehle and H.A. Schafft, "CU
RRENT DENSITY DEPENDENCE OF ELECTROMIGRATION t50 E
NHANCEMENT DUE TO PULSED OPERATION", IEEE IRPS, p.
106(1990).)に記載のようにパルス電流も使用されてい
る。
2. Description of the Related Art In the past, as a method for evaluating the energization life of a semiconductor device wiring, a take-wow "effect of metal line geometry on electromigration lifetime in aluminum kappa submicron interconnections" I.E.
k, “EFFECT OF METAL LINE GEOMETRY ON ELECTROMIGRA
TION LIFETIME IN Al-Cu SUBMICRON INTERCONNECTION
S ”, IEEE IRPS, p. 185 (1988). Fig. 2), using a 4-terminal sample, applying a high-density constant current above the actual operating conditions, electro Accelerated life tests have been used to accelerate migration.In this evaluation method, the time until the sample breaks is defined as the electrical life of the sample, but the Al alloy / refractory metal laminated structure currently used is used. In terms of wiring, JAC Ondolsec Etoal “Effective Kinetic Variations with Stress Duration”
Four Multi-Layered Metallization (JC Ondrusek et al., "EFFECTIVE KINET
IC VARIATIONS WITH STRESS DURATIONFOR MULTILAYERED
METALLIZATIONS ", IEEE IRPS, p.179 (1988).), Even if the wiring layer made of an Al alloy is broken, the remaining high melting point metal layer maintains conduction, and the sample resistance is somewhat Although it rises, it does not reach the disconnection.
The energization life is measured by the time until the sample resistance rises above a certain ratio compared to when the energization starts. In this way, the energization life of a plurality of samples was obtained, and the time until the energization life of a certain ratio or more of all samples reached the energization life was used as the energization life of the wiring. In addition to direct current, the current to be applied is not limited to DC current, and JS Suehle and HA Schafft, "CU
RRENT DENSITY DEPENDENCE OF ELECTROMIGRATION t 50 E
NHANCEMENT DUE TO PULSED OPERATION ", IEEE IRPS, p.
106 (1990).), Pulsed current is also used.

【0003】[0003]

【発明が解決しようとする課題】上記従来技術では配線
の一部に損傷が発生しても、それが配線全体のごく一部
でありそれによる抵抗上昇が小さいうちは配線は正常に
機能するという仮定に立っている。しかし、たとえば半
導体集積回路素子では個々の素子間をつなぐ配線の長さ
は様々である。数mmもある寿命評価用配線試料では配線
全体の抵抗に比べ無視できる小さな抵抗上昇しか生まな
い損傷でも短い配線に発生した場合には相対的に大きな
抵抗増加となり半導体集積回路素子は動作不良となって
しまう。そのため、従来技術によっては、損傷の発生が
そのまま断線に結び付かない積層配線の信頼性を正確に
評価することはできていない。
In the above prior art, even if a part of the wiring is damaged, it is a small part of the entire wiring and the wiring functions normally while the resistance increase is small. Stand on the assumption. However, for example, in a semiconductor integrated circuit device, the length of the wiring connecting the individual devices varies. A life evaluation wiring sample with a length of several millimeters produces a small resistance increase that is negligible compared to the resistance of the entire wiring.If damage occurs in a short wiring, a relatively large resistance increase and the semiconductor integrated circuit device malfunctions. Will end up. Therefore, according to the related art, it is not possible to accurately evaluate the reliability of the laminated wiring in which the occurrence of damage does not directly lead to the disconnection.

【0004】本発明の目的は、積層構造の配線において
も配線長に依存せず通電寿命を評価する方法あるいは配
線長に依存して変わる通電寿命を比較する方法と、その
評価法により通電寿命を保証された高信頼性配線を提供
することにある。
The object of the present invention is also to evaluate the energization life in a laminated structure wiring without depending on the wiring length or to compare the energization life depending on the wiring length, and to evaluate the energization life by the evaluation method. To provide guaranteed high reliability wiring.

【0005】また、小さな損傷を検出するためには、配
線長を小さくして配線寿命を評価することが必要だが、
この場合、試料数が同じでも評価する配線の総延長が短
くなってしまうため、信頼性の高い評価のためには測定
試料数を増やすことが必要である。本発明は、配線長の
小さい多数の試料の配線寿命を効率的に収集できる通電
寿命評価装置を提供することも目的の一つである。
In order to detect a small damage, it is necessary to shorten the wiring length and evaluate the wiring life.
In this case, even if the number of samples is the same, the total length of the wiring to be evaluated becomes short. Therefore, it is necessary to increase the number of samples to be measured for highly reliable evaluation. Another object of the present invention is to provide an energization life evaluation device capable of efficiently collecting the wire life of a large number of samples having a short wire length.

【0006】[0006]

【課題を解決するための手段】上記目的のうち、配線長
に依存せず通電寿命を評価することは、二つの異なる方
法で達せられる。その一つは、通電試験を異なる電流
A,B(A<B,電流Aでの一回の通電時間Ta>電流
Bでの一回の通電時間Tb)をA,Bの順に少なくとも
一度試料に印加しておこない、試料の寿命Lsを通電に
より試料抵抗が試験開始時に比べ一定比率以上に上昇す
るまでの電流Aを通電した延べ時間とするものである。
この場合、特に電流Aの通電に先立ち電流C(A<C、
電流Aでの通電時間Ta>電流Cでの通電時間Tc)を
通電し、この最初の電流Cの通電時に断線する試料を初
期欠陥品として結果から除くことにより試験結果に対す
る信頼性はさらに高いものとなる。また、この電流Bに
は一定周期を有するパルス電流を用いることもできる。
この方法の変形として、電流A,Bの印加は一回のみと
し試料抵抗の測定を電流Bの通電後に行い、この試料抵
抗が試験開始時に比べ一定比率以上上昇した場合にその
試料の寿命Lsを電流Aでの通電時間Ta以下、試料抵
抗の上昇が一定比率未満の場合にその試料の寿命Lsを
電流Aでの通電時間Taより大きいとする方法もある。
これらの方法で複数の試料の寿命を求め、寿命に至る試
料が一定比率以上発生するまでの時間,試料を構成する
配線の寿命Lとするものである。
Among the above objects, the evaluation of the energization life without depending on the wiring length can be achieved by two different methods. One of them is to apply different currents A and B (A <B, one energization time Ta at current A> one energization time Tb at current B) to the sample at least once in the order of A and B. The voltage is applied and the service life Ls of the sample is defined as the total time during which the current A is applied until the sample resistance increases by a certain ratio or more as a result of energization.
In this case, the current C (A <C,
The reliability of the test result is further enhanced by energizing the energizing time Ta at the current A> the energizing time Tc at the current C), and excluding the sample that is disconnected at the first energization of the current C from the result as an initial defective product. Becomes Further, a pulse current having a constant cycle can be used as the current B.
As a modification of this method, the application of the currents A and B is performed only once, and the sample resistance is measured after the application of the current B. When the sample resistance increases by a certain ratio or more compared to the time when the test is started, the life Ls of the sample is determined. There is also a method in which the life Ls of the sample is set to be longer than the energization time Ta at the current A when the increase in the sample resistance is less than a certain ratio at the energization time Ta at the current A or less.
The lifespans of a plurality of samples are obtained by these methods, and the time until the lifespan of the samples is generated at a certain ratio or more is defined as the lifespan L of the wirings forming the samples.

【0007】もう一つの方法は、一定電流を印加しなが
ら試料抵抗の経時変化を測定し、通電により試料抵抗が
一定比率以上に上昇するまでの時間Lsを試料の寿命と
する通電寿命試験において、試料配線の長さmの等しい
複数の試料の通電寿命Lsのうち最短のものLt(m)
を、mを短くする方向にLt(m)がmに依存せず一定
値Lt0 をとるまで変化させて測定し、Lt0 をこの配
線の配線長に依存しない寿命L0 として配線の通電寿命
を評価するものである。
Another method is to measure the change over time in the sample resistance while applying a constant current, and in an energization life test in which the sample life is the time Ls until the sample resistance rises above a certain ratio by energization, The shortest of the energization lives Ls of a plurality of samples having the same sample wiring length m, Lt (m)
Is measured by changing Lt (m) in the direction of shortening m until it takes a constant value Lt 0 which does not depend on m, and Lt 0 is a life L 0 that does not depend on the wire length of this wire. Is to evaluate.

【0008】また、通電により試料抵抗が一定比率以上
に上昇するまでの時間Lsを試料の寿命とする通電寿命
試験において、試料の長さに依存して通電寿命分布が異
なる配線に対し、評価する配線の総延長を一定とした際
に通電寿命に達する試料数nが、試料の配線長mがm1
<m≦m2の範囲で一定値n0をとり、このn0がn(m)
(但しm>m2)より大きい場合にこの配線の配線長m1
<m<m2で評価した配線の単位長さ当りの不良発生率
をnMAX(m1,m2)と定義することにより、通電寿命が
配線長に依存して変わる場合でも異なる材料もしくは構
造を有する配線の間で通電寿命を比較することが可能と
なる。
In addition, in an energization life test in which the life of the sample is the time Ls until the sample resistance rises above a certain ratio by energization, the wiring having different energization life distribution depending on the length of the sample is evaluated. The number n of samples reaching the energization life when the total length of the wiring is constant, and the wiring length m of the sample is m 1
A constant value n 0 is taken within the range of <m ≦ m 2 , and this n 0 is n (m)
If it is larger than (m> m 2 ), the wiring length of this wiring is m 1
By defining the defect occurrence rate per unit length of the wiring evaluated by <m <m 2 as n MAX (m 1 , m 2 ), different materials or structures can be used even when the energization life changes depending on the wiring length. It becomes possible to compare the energization life between the wirings having the.

【0009】さらに、配線試料の両電流印加端子間に複
数の電圧測定端子を設け、各端子間を一つの試料として
扱いその端子間抵抗の経時変化を測定するとともに、各
端子間に試料と並列に開閉スイッチ付短絡路を設け個別
に試料として扱う各端子間で抵抗が増大し通電寿命に達
したものから短絡路スイッチを閉じ電流を短絡路に通す
通電寿命評価装置を使用することにより、配線長の小さ
い多数の試料の配線寿命を効率的に収集できる。
Further, a plurality of voltage measuring terminals are provided between both current applying terminals of the wiring sample, each terminal is treated as one sample, and a change with time of the resistance between the terminals is measured, and the terminals are connected in parallel with the sample. A short circuit with an open / close switch is installed on each of the terminals, and the resistance increases between each terminal treated as a sample. It is possible to efficiently collect the wiring life of many small samples.

【0010】[0010]

【作用】上記の配線長に依存せず通電寿命を評価する方
法のうち前者では、電流Aの印加が従来の通電試験に相
当し電流Aより高密度の電流Bの印加により配線中に発
生する損傷を顕在化させるものである。電流Aの印加に
より配線中に損傷が発生していなければ電流Bを短時間
印加しても配線にはそれ程影響はない。それに対し通電
中に配線中に半断線等の損傷が発生した場合には、損傷
の成長速度が印加する電流密度が大きくなるに従い急激
に大きくなるため、電流Bの印加時に損傷部の成長が加
速され急激に抵抗が上昇する。依って、従来の通電寿命
評価法では見出すことのできなかった長い配線中の小さ
な損傷でも検出可能となり、積層構造の配線でも配線長
に影響されない通電寿命評価をすることができる。一
方、後者の方法では、従来より短い試料配線を使用し試
料数を増やし寿命評価することを想定している。通常、
通電中の配線中に半断線等の損傷が発生すると損傷部の
抵抗が正常部に比べて大きいため配線抵抗は増加する
が、配線長が大きい場合には配線の全抵抗に比べ増加分
の割合が小さいため検出できない。そこで試料配線の長
さmを短くし、損傷発生に対する感度を高くして測定す
る。この方法では異なるmに対して測定が必要なため試
料総数が多くなる一方、全ての試料が寿命に到るまで測
定するのではなく、複数の試料の通電寿命Lsのうち最
短のものLt(m)を求めた時点で試料配線の長さmの
試料に対する測定が終了するため、測定を短時間で済ま
すことが可能である。mを短くしてもLt(m)がそれ
以上短くならなければ、このLt(m)を通電により損
傷が発生するまでの時間と考えることができる。この方
法によれば、積層構造の配線においても短時間で効率的
に配線長に依存しない通電寿命評価が可能である。
In the former method of evaluating the energization life without depending on the wiring length, in the former method, the application of the current A corresponds to the conventional energization test and occurs in the wiring due to the application of the current B having a higher density than the current A. It is what makes the damage manifest. If no damage is generated in the wiring due to the application of the current A, even if the current B is applied for a short time, the wiring is not so affected. On the other hand, when damage such as half-breakage occurs in the wiring during energization, the growth rate of damage increases rapidly as the applied current density increases, so that the growth of the damaged portion accelerates when the current B is applied. The resistance increases sharply. Therefore, even a small damage in a long wiring, which cannot be found by the conventional energization life evaluation method, can be detected, and it is possible to evaluate the energization life not affected by the wiring length even in the wiring of the laminated structure. On the other hand, in the latter method, it is assumed that the sample wiring is used and the number of samples is increased to evaluate the life. Normal,
If damage such as half-breakage occurs in the wiring while it is energized, the resistance of the damaged part is larger than that of the normal part, so the wiring resistance increases, but when the wiring length is large, the ratio of the increase to the total resistance of the wiring Cannot be detected because is small. Therefore, the length m of the sample wiring is shortened and the sensitivity to damage occurrence is increased to perform the measurement. Since this method requires measurement for different m, the total number of samples increases, but the measurement is not performed until all the samples reach the end of their lives, but the shortest one Lt (m Since the measurement for the sample having the length m of the sample wiring is completed at the time when) is obtained, the measurement can be completed in a short time. If Lt (m) does not become shorter even if m is shortened, this Lt (m) can be considered as the time until damage occurs due to energization. According to this method, it is possible to efficiently evaluate the energization life not depending on the wiring length in a short time even in the wiring of the laminated structure.

【0011】また、評価に用いる配線が短い程、小さな
抵抗上昇しか生まない損傷でも相対的に大きな抵抗増加
となり検出されるため、たとえ一定試料数当りの不良発
生率は減少しても一定長さ当りの不良発生数は配線が短
くなる程多くなる傾向を有する。そのため、評価する配
線の総延長を一定とし、通電寿命に達する試料数nが、
試料の配線長mがm1<m≦m2の範囲で一定値n0をと
り、このn0がn(m)(但しm>m2)より大きい場合
にnMAX(m1,m2)=n0をこの配線の配線長m1<m
<m2で評価した配線の単位長さ当りの不良発生率と定
義することにより、異なる材料もしくは構造を有する配
線の間で配線長に依存して変わる通電寿命を比較するこ
とができる。
Further, the shorter the wiring used for evaluation is, the larger the increase in resistance is detected even if the damage causes only a small increase in resistance. Therefore, even if the defect occurrence rate per fixed number of samples is decreased, the length is fixed. The number of defective occurrences per hit tends to increase as the wiring becomes shorter. Therefore, the total number of samples to be evaluated is n
The sample wiring length m takes a constant value n 0 in the range of m 1 <m ≦ m 2 , and when this n 0 is larger than n (m) (m> m 2 ), n MAX (m 1 , m 2 ) = N 0 is the wiring length of this wiring m 1 <m
By defining the defect occurrence rate per unit length of the wiring evaluated by <m 2 , it is possible to compare the energization life that varies depending on the wiring length between the wirings having different materials or structures.

【0012】また、通電寿命評価装置を使用することに
より、一つの長い配線試料を細分化し複数の短い配線試
料として扱うことができ、多数の試料の配線寿命を効率
的に収集することができる。また、配線試料に通電を継
続すると発生する損傷のために配線抵抗が増大し極端な
場合には断線に至り電源に対し過負荷となるが、各端子
間に並列に設けられた短絡路スイッチを閉じ短絡路を電
流経路とすることにより見かけ上試料抵抗を小さくで
き、電源が過負荷となることを防止できる。特に、短絡
路スイッチの開閉をコンピュータにより制御することに
より本方法での配線寿命評価を自動化でき測定の効率化
に特に有効である。
Further, by using the energization life evaluation device, one long wiring sample can be subdivided and treated as a plurality of short wiring samples, and the wiring lives of many samples can be efficiently collected. Also, when the wiring sample is continuously energized, the wiring resistance increases due to damage, which leads to disconnection in extreme cases and overload of the power supply.However, a short-circuit switch installed in parallel between each terminal By using the closed short circuit as the current path, the sample resistance can be apparently reduced, and the power supply can be prevented from being overloaded. In particular, by controlling the opening and closing of the short-circuit switch by a computer, the wiring life evaluation in this method can be automated, which is particularly effective in improving the efficiency of measurement.

【0013】[0013]

【実施例】【Example】

(実施例1)以下、本発明の実施例を図により説明す
る。図1は本発明に使用した配線試料及び評価装置の構
成を示す概略図である。Si基板1上に形成された配線
試料2の両端には電流印加用端子3,4及び電圧測定用
端子5,6が設けられている。通電寿命評価試験時は、
試料2はSi基板1もろとも恒温槽7中に設置し、電流
印加用端子3,4よりプログラマブル電源8から電流を
印加し試験を実施する。同時に電圧測定用端子5,6間
の電圧を直流電圧計9で測定し、印加電流と電圧の関係
より試料抵抗を算出する。
(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram showing the configuration of a wiring sample and an evaluation device used in the present invention. Current application terminals 3, 4 and voltage measurement terminals 5, 6 are provided at both ends of the wiring sample 2 formed on the Si substrate 1. During the energization life evaluation test,
The sample 2 is installed in the thermostat 7 together with the Si substrate 1, and a test is performed by applying a current from the programmable power source 8 from the current applying terminals 3 and 4. At the same time, the voltage between the voltage measuring terminals 5 and 6 is measured by the DC voltmeter 9, and the sample resistance is calculated from the relationship between the applied current and the voltage.

【0014】図2は配線試料2の図1中直線A−Bでの
断面図である。以下、配線試料の作製フローを示す図3
に従い配線試料2の作製法を説明する。Si基板1を熱
酸化し、表面に熱酸化SiO2膜10を5000nmを
形成する(図3(a))。その基板上にDC−マグネト
ロンスパッタ法で10%Ti−W合金膜11を200n
m、Al−1%Si−1%Cu膜12を500nmを真
空を破らず連続的に膜形成する(図3(b))。ホトリ
ソグラフィー技術とドライエッチング法によりこの積層
膜を試料形状にパターニングする(図3(c))。形成
される配線の幅は500nmである。こうして形成され
た配線パターン13の上に常圧CVD法によりリンケイ
酸ガラス膜14の1000nmを形成し、パッシベーシ
ョン膜とする。ホトリソグラフィー技術とドライエッチ
ング法により電流印加用端子(3,4)及び電圧測定用端
子(5,6)のパッド部を開口する(図3(d))。さら
に450℃H2 雰囲気中で30分アニールし、配線試料
を作製する。この段階で評価試験に使用することが可能
となるが、通常はこうして形成された試料をダイシング
し、セラミックパッケージに搭載ワイヤボンディングし
た状態で試験する。図4は従来の直流連続印加による通
電寿命評価を配線試料に対し実施した際の抵抗変化を示
す図である。この通電寿命評価試験をAl合金単層配線
に対し実施した場合(A)には通電寿命は断線によって
判明するが、積層配線試料では配線抵抗が徐々に増加す
るのみである(B)。そこで本実施例では、Si半導体
素子の動作に影響を及ぼさない配線抵抗の変動を最大2
0%とし、通電開始後抵抗値が安定し一定値を取った時
点を基準に配線抵抗が20%上昇した時点を配線寿命と
した。図5,図6は試料の配線長が通電寿命評価結果に
及ぼす影響を示す図である。試料がAl合金単層配線の
場合(図5)には配線長が大きくなるに従い通電寿命は
全体に短くなり、その分布も小さくなる傾向にある。一
方、試料が積層配線の場合(図6)には配線長が大きく
なるに従いやはり通電寿命の分布は小さくなるものの、
これは配線長が小さい場合に比べ短寿命の試料,長寿命
の試料とも少なくなるためである。配線の通電寿命は試
料の一定比率以上が通電寿命に到るまでの時間で決めら
れ、本実施例ではこの比率を1%とする。この時、積層
配線では(図6)配線長が大きくなるに従い配線の通電
寿命も長くなる傾向にある。実際の半導体集積回路素子
では多様な長さの配線が使用されており、信頼性はその
中で最も寿命の短い配線に対しなされるべきであり、図
6のような場合にむやみに長い配線を用い寿命評価して
も配線の信頼性を保証することにつながらない。
FIG. 2 is a sectional view of the wiring sample 2 taken along the line AB in FIG. Below, FIG. 3 showing the flow of manufacturing the wiring sample
A method of manufacturing the wiring sample 2 will be described below. The Si substrate 1 is thermally oxidized to form a thermally oxidized SiO 2 film 10 of 5000 nm on the surface (FIG. 3A). A 200% 10% Ti-W alloy film 11 is formed on the substrate by DC-magnetron sputtering.
m, Al-1% Si-1% Cu film 12 is continuously formed at 500 nm without breaking the vacuum (FIG. 3B). This laminated film is patterned into a sample shape by the photolithography technique and the dry etching method (FIG. 3C). The width of the formed wiring is 500 nm. A 1000 nm thick phosphosilicate glass film 14 is formed on the wiring pattern 13 thus formed by an atmospheric pressure CVD method to form a passivation film. Pads of the current application terminals (3, 4) and the voltage measurement terminals (5, 6) are opened by photolithography and dry etching (FIG. 3 (d)). Further, it is annealed in a H 2 atmosphere at 450 ° C. for 30 minutes to prepare a wiring sample. Although it can be used for an evaluation test at this stage, normally, the sample thus formed is diced and mounted on a ceramic package for wire bonding and then tested. FIG. 4 is a diagram showing a change in resistance when a current-carrying life evaluation by a conventional continuous DC application is performed on a wiring sample. When this energization life evaluation test is performed on the Al alloy single layer wiring (A), the energization life is found by the disconnection, but in the laminated wiring sample, the wiring resistance only gradually increases (B). Therefore, in the present embodiment, the fluctuation of the wiring resistance that does not affect the operation of the Si semiconductor element is 2 at maximum.
It was set to 0%, and the time at which the wiring resistance increased by 20% based on the time when the resistance value became stable after the start of energization and took a constant value was taken as the wiring life. 5 and 6 are views showing the influence of the wiring length of the sample on the energization life evaluation result. When the sample is an Al alloy single layer wiring (FIG. 5), the energization life tends to be shortened overall and the distribution thereof tends to become smaller as the wiring length increases. On the other hand, in the case where the sample is a laminated wiring (FIG. 6), the distribution of energization life also decreases as the wiring length increases,
This is because both short-lived samples and long-lived samples are smaller than when the wiring length is small. The energization life of the wiring is determined by the time until the energization life reaches a certain ratio or more of the sample, and in this embodiment, this ratio is set to 1%. At this time, in the laminated wiring (FIG. 6), the longer the wiring length is, the longer the energization life of the wiring tends to be. Wirings of various lengths are used in actual semiconductor integrated circuit devices, and reliability should be made to the wiring with the shortest life among them, and in the case of FIG. Even if the life is evaluated, the reliability of the wiring cannot be guaranteed.

【0015】それに対し本実施例は、電流印加の方法を
従来技術と異ならせることにより問題点の解決を図るも
のである。図7は本発明により試料に電流印加する場合
の印加電流の時間変化を従来技術と比較し示した図であ
る。従来は図7(a)のように一定電流A(10mA)
を印加するものであった。それに対し本実施例では、図
7(b)に示す通りAと同一の電流を2時間印加後Aよ
り大きな電流B(20mA)を1分間印加し、以後これ
を繰り返す。本発明の別な実施法として、図7(c)で
は図7(b)に示す電流系列に加え最初に電流C(15
mA)を2分間印加するものである。さらに本発明は、
図7(d)に示すように図7(b)の電流Bに代えてパ
ルス電流D(ピーク電流60mA オン時間1μsec 周
期100μsec)を1分間印加することでも実施できる。
On the other hand, the present embodiment intends to solve the problem by making the method of applying the current different from that of the prior art. FIG. 7 is a diagram showing a change in applied current with time when a current is applied to a sample according to the present invention in comparison with a conventional technique. Conventionally, a constant current A (10 mA) as shown in FIG.
Was applied. On the other hand, in this embodiment, as shown in FIG. 7B, the same current as A is applied for 2 hours, and then a current B (20 mA) larger than A is applied for 1 minute, and this is repeated thereafter. As another embodiment of the present invention, in FIG. 7C, in addition to the current series shown in FIG.
mA) is applied for 2 minutes. Further, the present invention is
As shown in FIG. 7D, instead of the current B in FIG. 7B, a pulse current D (peak current 60 mA, on-time 1 μsec, cycle 100 μsec) may be applied for 1 minute.

【0016】以下、本実施例の方法で試料配線の通電寿
命を評価した結果を説明する。図8は通電寿命試験を上
記積層配線試料に対し図7(b)の電流系列を印加し実
施した際の抵抗変化を示す図である。通電により配線抵
抗が漸増し寿命に到ることは従来と変わらないが
(A)、配線抵抗が上昇し始めてから寿命に到るまでの
時間が従来(B)に比べ短くなっている。図9は試料の
配線長が図7(b)に示す電流系列による積層配線通電
寿命評価結果に及ぼす影響を示す図である。配線長が大
きくなるに従い通電寿命の分布は小さくなる傾向にある
が、配線寿命を決める短寿命側の分布はあまり大きな影
響は受けない。そのため、従来の積層配線評価の場合
(図6)と異なり長い配線試料を使用して評価試料の総
延長を大きくし通電寿命評価の信頼性を高めることが可
能である。
The results of evaluating the energization life of the sample wiring by the method of this embodiment will be described below. FIG. 8 is a diagram showing a resistance change when the energization life test is performed by applying the current series of FIG. 7B to the above laminated wiring sample. Although the wiring resistance gradually increases due to energization and reaches the end of its life (A), the time from when the wiring resistance starts to rise to the end of its life is shorter than that of the prior art (B). FIG. 9 is a view showing the influence of the wiring length of the sample on the evaluation result of the laminated wiring energization life by the current series shown in FIG. 7B. The distribution of energization life tends to decrease as the wiring length increases, but the distribution on the short life side, which determines the wiring life, is not significantly affected. Therefore, unlike the case of the conventional laminated wiring evaluation (FIG. 6), it is possible to increase the total extension of the evaluation sample by using a long wiring sample and improve the reliability of the energization life evaluation.

【0017】ここで、本実施例の要点を説明する。本実
施例では、試料に短時間大電流印加することが重要であ
る。大電流印加であっても1分間程度の短い時間であれ
ば配線に新たに損傷を発生させることは殆どない。しか
し一方で、半断線等の損傷部の成長速度は印加電流密度
に大きく影響され、電流密度の4〜6乗で加速される。
そのため、配線内に損傷がある場合には大電流印加によ
り損傷の成長が加速され、たとえ印加時間が短くとも損
傷の成長により配線抵抗は急激に増加する。従来の一定
電流印加ではたとえ通電により損傷が発生しても損傷の
成長速度が小さいため、通電寿命に到るまでにはさらに
長時間電流を印加しこの損傷部による抵抗増加分を大き
くするもしくは多数の損傷を発生させる必要がある。そ
れに対し本発明では、通電により一つでも損傷が発生す
ると引き続く短時間の大電流印加により損傷は急速に成
長し、配線抵抗を増加させ試料を通電寿命に到らすこと
ができる。そのため、試料の配線長に影響されず配線の
寿命評価が可能となるのである。
Here, the main points of this embodiment will be described. In this embodiment, it is important to apply a large current to the sample for a short time. Even if a large current is applied, the wiring is hardly newly damaged for a short time of about 1 minute. On the other hand, on the other hand, the growth rate of a damaged portion such as a half-break is greatly affected by the applied current density and is accelerated by the 4th to 6th power of the current density.
Therefore, when there is damage in the wiring, the growth of the damage is accelerated by applying a large current, and the wiring resistance rapidly increases due to the growth of the damage even if the application time is short. With the conventional constant current application, even if damage occurs due to energization, the growth rate of damage is small.Therefore, until the life of energization is reached, the current is applied for a longer time to increase the resistance increase due to this damaged part or Need to cause damage. On the other hand, in the present invention, when even one damage occurs due to the energization, the damage rapidly grows by the subsequent application of a large current for a short time, the wiring resistance is increased, and the sample can reach the energization life. Therefore, the life of the wiring can be evaluated without being affected by the wiring length of the sample.

【0018】損傷部の成長を加速させる短時間印加の電
流(図7(b)での電流B)としては、試験電流(図7
(b)での電流A)の1.5 倍以上好ましくは2倍以上
の電流を使用し一回の印加時間は試験電流の一回の印加
時間の1/10以下の時間とすることが好ましい。ま
た、この損傷加速用電流の印加回数は少なくとも10回
程度必要であり好ましくは一回の試験電流印加時間を数
十分〜数時間の間で変えて事前試験を実施し、通電寿命
が損傷加速用電流の印加回数に影響されない範囲を選択
して本試験を実施する。また、図7(c)での電流Cの
印加によれば通電前にすでに損傷を有していた試料はこ
の時点で抵抗上昇するため試験電流の印加前に除くこと
ができ、評価試験結果の信頼性をさらに高いものとする
ことができる。損傷加速用電流としては、図7(d)で
の電流Dのように直流電流の代わりにパルス電流を用い
ることも可能である。パルス電流を使用するメリットに
はパルスピーク電流ならば直流電流では不可能な大電流
印加が可能な点にある。損傷部の成長は電流密度の4〜
6乗で加速されるため、損傷加速用電流は大電流の方が
有利である。しかし、ジュール発熱の影響が大きいため
直流では電流密度として1×107A/cm2程度が上限で
ある。それに対し、パルス電流印加によればパルス周期
及びパルスオン時間を選択することでジュール発熱を抑
えながらピーク電流密度1×108A/cm2程度までの印
加が可能である。図10は各種の損傷加速用電流を使用
し通電寿命試験を実施した際の試料の抵抗変化を示す図
である。損傷加速にパルス電流(周期100μsec)を用
いても直流を用いた場合と殆ど変わらない結果が得られ
ることがわかる。またパルス電流を用いる場合時間平均
した電流密度が同じでも、パルスオン時間を短くしピー
ク電流密度を高くした方が、抵抗上昇が始まってから寿
命に到るまでの時間が短くなっており損傷の成長がより
加速されていることを示している。
As the short-time applied current (current B in FIG. 7B) for accelerating the growth of the damaged portion, the test current (FIG. 7) is used.
It is preferable to use a current which is 1.5 times or more, preferably 2 times or more as large as the current A) in (b), and the application time for one application is 1/10 or less of the application time for one application of the test current. . In addition, the number of times this damage acceleration current is applied is at least about 10 times, and it is preferable to perform a preliminary test by changing the test current application time once from several tens of minutes to several hours, and the energization life is to accelerate damage. Perform this test by selecting a range that is not affected by the number of times the application current is applied. Further, according to the application of the current C in FIG. 7 (c), the sample that had already been damaged before energization can be removed before the application of the test current because the resistance increases at this time, The reliability can be further enhanced. As the damage accelerating current, it is possible to use a pulse current instead of the direct current as the current D in FIG. 7D. The merit of using the pulse current is that it is possible to apply a large current that is impossible with a DC current if the pulse peak current is used. The growth of the damaged part is 4 to the current density.
Since it is accelerated by the sixth power, a large damage acceleration current is more advantageous. However, since the influence of Joule heat generation is large, the maximum current density for direct current is about 1 × 10 7 A / cm 2 . On the other hand, according to the pulse current application, it is possible to apply the peak current density up to about 1 × 10 8 A / cm 2 while suppressing the Joule heat generation by selecting the pulse period and the pulse on time. FIG. 10 is a diagram showing the resistance change of the sample when conducting the energization life test using various damage acceleration currents. It can be seen that even if the pulse current (cycle 100 μsec) is used for the damage acceleration, the result is almost the same as that when the direct current is used. When a pulse current is used, even if the time-averaged current density is the same, it is better to shorten the pulse-on time and increase the peak current density to shorten the time from the start of resistance increase to the end of life, and damage growth. Is being accelerated.

【0019】(実施例2)以下、本発明の別の実施例を
図により説明する。本実施例で使用する配線試料及び評
価装置の構成は実施例1と同一であり、概略図1,配線
の断面図2,試料の作製フローを示す図3は実施例1と
共通である。
(Embodiment 2) Another embodiment of the present invention will be described below with reference to the drawings. The structure of the wiring sample and the evaluation apparatus used in this example is the same as that of the first example, and the schematic diagram 1, the cross-sectional view of the wiring 2, and FIG. 3 showing the sample preparation flow are common to the first example.

【0020】図11は本発明により試料に電流印加する
場合の印加電流の時間変化を示す図である。試験電流A
として10mAの電流を一定時間(図11ではTa時
間)印加後、Aより大きな損傷加速電流B(20mA)
を一定時間(図11ではTb時間:本実施例では10分
間)印加する。その後試料抵抗を測定し抵抗上昇の大き
さにより寿命に到っているか否か判定する。本実施例で
は通電開始後抵抗値が安定し一定値を取った時点を基準
に試料抵抗が20%増加した時点を通電寿命とした。本
実施例によれば、一度損傷加速電流Bを印加した試料は
その時点で評価を終了するため損傷加速電流Bによる新
たな損傷の発生に配慮する必要がない。ただし、事前検
討として試験電流印加前の試料に電流BをTb時間(本
実施例では10分間)印加しても寿命に到らないことを
確認しておく必要がある。これは、試験電流印加前の損
傷のない試料では損傷加速電流BをTb時間印加しても
寿命に到らないことを確認するものである。試験電流A
をTa時間印加後に損傷加速電流Bを印加しても、Ta
が十分小さい間は通電による損傷の発生がないため殆ん
どの試料は寿命に到らない。しかし、Taが大きくなる
と試験電流Aの印加中に損傷を受けるようになり損傷加
速電流B印加により抵抗が上昇する試料が現われる。こ
こで、本実施例では試料全体の1%が寿命に到るまでの
時間を配線寿命とする。本発明では一つのTaに対し多
数の試料を評価する必要があるため、あまり多数のTa
に対し評価試験を実施することは困難である。他方、全
試料が寿命に達するまで試験する必要がないため短時間
で評価可能である。
FIG. 11 is a diagram showing the change over time in the applied current when the current is applied to the sample according to the present invention. Test current A
As a result, after applying a current of 10 mA for a certain period of time (Ta time in FIG. 11), a damage acceleration current B larger than A (20 mA)
Is applied for a certain time (Tb time in FIG. 11: 10 minutes in this embodiment). After that, the resistance of the sample is measured and it is judged whether or not it has reached the end of its life depending on the magnitude of the resistance increase. In the present example, the time point when the sample resistance increased by 20% was defined as the current-carrying life, based on the time point when the resistance value became stable and reached a constant value after the start of current application. According to the present embodiment, it is not necessary to consider generation of new damage due to the damage acceleration current B because the evaluation of the sample to which the damage acceleration current B has been applied once ends at that point. However, as a preliminary examination, it is necessary to confirm that the life is not reached even if the current B is applied to the sample before the test current is applied for Tb time (10 minutes in this embodiment). This is for confirming that the sample having no damage before application of the test current does not reach the end of its life even if the damage acceleration current B is applied for Tb time. Test current A
Even if the damage acceleration current B is applied after applying Ta for
As long as is sufficiently small, no damage occurs due to energization, so most of the samples do not reach the end of their lives. However, when Ta becomes large, a sample appears to be damaged during the application of the test current A, and the resistance increases due to the application of the damage acceleration current B. Here, in this embodiment, the time until 1% of the entire sample reaches the life is defined as the wiring life. In the present invention, since it is necessary to evaluate many samples for one Ta, too many Tas are evaluated.
However, it is difficult to carry out an evaluation test. On the other hand, it is possible to evaluate in a short time because it is not necessary to test all samples until they reach the end of their lives.

【0021】表1に図11に示した電流印加により配線
寿命を評価した結果を示す。
Table 1 shows the results of evaluating the wiring life by applying the current shown in FIG.

【0022】[0022]

【表1】 [Table 1]

【0023】試験電流通電時間Taを3段階に変え、各
Taに対し400個の試料を評価し寿命に達している試
料の比率を示した。Taが100時間では0.5% の試
料しか寿命に到っていないが、Taが200時間では4
%の試料が寿命に到っており、配線寿命が100時間よ
り長く200時間未満であることがわかる。
The test current energizing time Ta was changed to three levels, and 400 samples were evaluated for each Ta, and the ratio of the samples that reached the end of their life was shown. When Ta is 100 hours, only 0.5% of the sample reaches the end of its service life, but when Ta is 200 hours, the life is 4%.
%, The sample has reached the end of its service life, and it can be seen that the wiring service life is longer than 100 hours and shorter than 200 hours.

【0024】(実施例3)以下、本発明のさらに別の実
施例を図により説明する。図12は本実施例に使用した
配線試料及び評価装置の構成を示す概略図である。Si
基板21上に形成された配線試料22の両端には電流印
加用端子23,24及び電圧測定用端子25〜29が設
けられている。通電寿命評価試験時は試料22はSi基
板21もろとも恒温槽30中に設置し、電流印加用端子
23,24よりプログラマブル電源31から一定電流を
印加し試験を実施する。同時に等間隔に設けられた各電
圧測定用端子25〜29間の電圧を直流電圧計32で順
次測定し、印加電流と電圧の関係より各電圧測定端子間
の抵抗を算出する。電圧測定端子間距離は100〜10
00μmで変化させ評価した。
(Embodiment 3) Another embodiment of the present invention will be described below with reference to the drawings. FIG. 12 is a schematic diagram showing the configuration of the wiring sample and the evaluation device used in this example. Si
Current application terminals 23 and 24 and voltage measurement terminals 25 to 29 are provided at both ends of the wiring sample 22 formed on the substrate 21. During the energization life evaluation test, the sample 22 including the Si substrate 21 is placed in the constant temperature bath 30, and a constant current is applied from the programmable power supply 31 from the current application terminals 23 and 24 to perform the test. At the same time, the voltage between the voltage measuring terminals 25 to 29 provided at equal intervals is sequentially measured by the DC voltmeter 32, and the resistance between the voltage measuring terminals is calculated from the relationship between the applied current and the voltage. Distance between voltage measuring terminals is 100 to 10
It was evaluated by changing the thickness at 00 μm.

【0025】配線試料22の断面構造及び配線試料の作
製手順は実施例1と同一であり、配線の断面図2,試料
の作製フローを示す図3は実施例1と共通である。図1
3は試料の配線長が通電寿命評価結果に及ぼす影響を示
す図である。通電開始後抵抗値が安定し一定値を取った
時点を基準に配線抵抗が20%上昇した時点を試料の通
電寿命とした。本実施例では試料の配線長を従来に比べ
短くしており、従来法では2000μm程度で一個の配
線試料であったものについて等間隔に電圧測定端子を設
け各電圧測定端子間を一個の試料として扱っている。そ
のため、従来法に比べ一台のプログラマブル電源で多数
の試料数を評価していることになる。
The sectional structure of the wiring sample 22 and the procedure for manufacturing the wiring sample are the same as those in the first embodiment, and the sectional view of the wiring 2 and FIG. 3 showing the sample manufacturing flow are the same as those in the first embodiment. Figure 1
FIG. 3 is a diagram showing the influence of the wiring length of the sample on the current-carrying life evaluation result. After the start of energization, the time when the wiring resistance increased by 20% was defined as the energization life of the sample, based on the time when the resistance value became stable and took a constant value. In this embodiment, the wiring length of the sample is shorter than that of the conventional method, and voltage measuring terminals are provided at equal intervals for one wiring sample of about 2000 μm in the conventional method, and one sample is provided between the voltage measuring terminals. Handling. Therefore, compared to the conventional method, one programmable power supply is used to evaluate a large number of samples.

【0026】図13より配線長を短くしていくと通電寿
命の分布は大きくなるが、通電寿命は限度なく短くはな
らず最短値Lt0 が存在する。すなわち、通電寿命は配
線長にかかわらずLt0より長い。このLt0で配線寿命
を見積もることにより、信頼性の高い寿命評価が可能で
ある。また、本実施例では通電寿命の短い試料に着目し
ており寿命−累積不良率曲線を外挿して配線寿命を決め
る従来法と異なり必ずしも全試料の通電寿命を知る必要
はない。全体の20%程度の寿命が判明すれば十分であ
る。そのため従来の方法に比べ短時間で評価することが
できる。
As shown in FIG. 13, when the wiring length is shortened, the distribution of energization life becomes wider, but the energization life is not shortened without limit and the shortest value Lt 0 exists. That is, the energization life is longer than Lt 0 regardless of the wiring length. Estimating the wiring life with this Lt 0 enables highly reliable life evaluation. Further, in the present embodiment, attention is paid to a sample having a short energization life, and it is not always necessary to know the energization life of all the samples, unlike the conventional method of extrapolating the life-cumulative failure rate curve to determine the wiring life. It is sufficient if the life of about 20% of the whole is known. Therefore, the evaluation can be performed in a shorter time than the conventional method.

【0027】(実施例4)以下、本発明のさらに別の実
施例を図により説明する。図14,図15は実施例1に
おいて異なる条件でAl−1%Si−1%Cu膜12を
形成した二種の試料に対し、通電寿命試験を実施した結
果を示す図である。試料AではAl合金膜形成時の基板
温度50℃、試料Bでは300℃である。この二種の試
料に対し従来の定電流印加による通電寿命試験結果(図
14)では、配線寿命は試料Aで69時間試料Bで58
時間であり基板温度50℃でAl合金膜を形成した試料
Aの方が長寿命である。それに対し、実施例1の図7の
(b)に示す電流を印加して通電寿命試験を実施した本
実施例の場合(図15(B))には配線寿命はそれぞれ
33時間及び53時間となり、従来法での評価結果とは
両者の大小関係が逆転している。そこでこの二種の配線
を用いてSi半導体集積回路素子を作製し、環境温度8
0℃で連続動作させ素子の信頼性評価試験を実施した。
表2に配線の導通不良による動作不良を生じた素子数を
示す。
(Embodiment 4) Another embodiment of the present invention will be described below with reference to the drawings. 14 and 15 are diagrams showing the results of conducting an energization life test on two types of samples in which the Al-1% Si-1% Cu film 12 was formed under different conditions in Example 1. The sample A has a substrate temperature of 50 ° C. when the Al alloy film is formed, and the sample B has a substrate temperature of 300 ° C. According to the result of the current-carrying life test by applying a constant current to the two samples (Fig. 14), the wiring life is 69 hours for the sample A and 58 for the sample B.
Sample A having an Al alloy film formed at a substrate temperature of 50 ° C. has a longer life. On the other hand, in the case of the present example in which the current shown in FIG. 7B of Example 1 was applied and the energization life test was performed (FIG. 15B), the wiring life was 33 hours and 53 hours, respectively. , The magnitude relationship between the two is reversed from the evaluation result of the conventional method. Therefore, a Si semiconductor integrated circuit element is manufactured using these two kinds of wiring, and the ambient temperature is set to 8
The device was continuously operated at 0 ° C. and a reliability evaluation test of the device was performed.
Table 2 shows the number of elements that have malfunctioned due to poor wiring continuity.

【0028】[0028]

【表2】 [Table 2]

【0029】基板温度300℃で作製した配線を使用し
た素子の方が不良発生数が少なく、信頼性の高いことが
わかる。すなわち、従来の配線寿命評価法では配線の寿
命を正しく評価していることにはならず、その配線寿命
によって配線の信頼性を保証できない。それに対し本実
施例による配線寿命評価法は半導体集積回路素子の信頼
性評価試験結果を反映しており、本実施例により決定し
た配線寿命が長い程信頼性の高い配線といえる。また、
使用した配線の本実施例に従って求められる寿命が長い
程高信頼性の半導体集積回路素子である。
It can be seen that the device using the wiring manufactured at the substrate temperature of 300 ° C. has a smaller number of defects and higher reliability. That is, the conventional wiring life evaluation method does not correctly evaluate the life of the wiring, and the reliability of the wiring cannot be guaranteed due to the life of the wiring. On the other hand, the wiring life evaluation method according to this embodiment reflects the reliability evaluation test result of the semiconductor integrated circuit element, and it can be said that the longer the wiring life determined according to this embodiment is, the more reliable the wiring is. Also,
The longer the life of the wiring used according to the present embodiment is, the more reliable the semiconductor integrated circuit device is.

【0030】(実施例5)以下、本発明の実施例を図に
より説明する。図16は本発明の評価装置の構成を示す
概略図である。配線試料101の両端に電流印加用端子
102,103が接続され、電源104より電流が流さ
れる。複数の電圧測定用端子106の中からスキャナ1
08により電圧計105で電圧測定を実施する端子が選
択される。ここで、電源104,電圧計105,短絡ス
イッチ107及びスキャナ108は制御コンピュータ1
09で制御されており、試料に一定電流を継続して印加
した際の各端子間電圧が等時間間隔で自動測定される。
測定の結果抵抗が一定以上増加している端子間は短絡ス
イッチ107を閉じ低抵抗の短絡路に電流を通す。ここ
では試料に定電流印加して試験を実施したが、一定電流
一定周期のパルス電流印加等、コンピュータ109で制
御可能な各種の通電パターンで電流印加して試験を実施
することが可能である。また、一定温度での試験が必要
な場合は配線試料101を電流印加用端子102,10
3及び電圧測定用端子106ごと恒温槽中に保持し試験
を実施する。
(Embodiment 5) An embodiment of the present invention will be described below with reference to the drawings. FIG. 16 is a schematic diagram showing the configuration of the evaluation device of the present invention. Current applying terminals 102 and 103 are connected to both ends of the wiring sample 101, and a current is supplied from a power source 104. The scanner 1 out of the plurality of voltage measuring terminals 106
08, the voltmeter 105 selects a terminal for performing voltage measurement. Here, the power supply 104, the voltmeter 105, the short-circuit switch 107, and the scanner 108 are the control computer 1
The voltage between the terminals when a constant current is continuously applied to the sample is automatically measured at equal time intervals.
The short-circuit switch 107 is closed between terminals whose resistance increases by a certain amount or more as a result of measurement, and a current is passed through a low-resistance short-circuit path. Here, the test was performed by applying a constant current to the sample, but the test can be performed by applying a current with various energizing patterns that can be controlled by the computer 109, such as applying a pulse current with a constant current and a constant period. When a test at a constant temperature is required, the wiring sample 101 is connected to the current applying terminals 102 and 10.
3 and the voltage measurement terminal 106 are held in a constant temperature bath and a test is performed.

【0031】本実施例で使用する配線試料の断面構造は
実施例1と同一であり、配線の断面図2,試料の作製フ
ローを示す図3は実施例1と共通である。
The sectional structure of the wiring sample used in this example is the same as that of the example 1, and the sectional view 2 of the wiring and FIG. 3 showing the sample preparation flow are common to the example 1.

【0032】図17は直流定電流連続印加による通電寿
命評価を実施した際の抵抗変化を示す図である。試料は
配線幅2.0μm 配線の全長2000μmであり、環境
温度150℃で試験した。本実施例では配線に200μ
mおきに電圧測定端子を設け、全長2000μmの配線
を直列に並んだ200μmの配線10個として扱った。
通電により試料は損傷を受け抵抗が徐々に増加する。従
来法では2000μmの配線を1試料として扱っている
ため、配線中の1ヶ所の損傷で抵抗が大幅に増加した場
合でも寿命に至ったと判定されさらに通電を継続すれ
ば、最終的に電源に対する負荷の上限を越えてしまいそ
れ以上試験を継続することができない。一本の配線を細
分化し配線長の短い多数の試料として扱った場合でも配
線抵抗の増加が主にその中の1試料に起因する場合に
は、電源に対する負荷の上限を越えるまで配線全体の抵
抗が増加しても実際に寿命に達している試料は1ないし
2個程度に留まり多数の試料の寿命を効率的に測定する
という目的を達することはできない。それに対し本実施
例では、細分化してできた試料のなかで抵抗増加が一定
値以上となったものは並列して設置された短絡スイッチ
を閉じ低抵抗の短絡路を電流経路とすることにより、配
線全体の見かけ上の抵抗を小さくし電源に対する負荷を
小さく保ち、全試料が寿命に達するまで試験を継続する
ことができる。図17では、200μmの配線の抵抗値
が通電当初の1.5 倍以上となった時点で短絡スイッチ
が閉じられている。そのため通電当初からの配線全体の
抵抗増加は10%以下に留まり、電源に対する負荷を気
にすることなく試験を継続できる。図18は直流連続印
加による通電寿命評価時の抵抗変化の別なパターンを示
した図である。通電による配線抵抗の増加には図17に
示したように抵抗が漸増するパターン以外に、図18の
ように通電中に急激に損傷が進み抵抗の増加過程を検出
できない場合がある。この場合には配線抵抗は一時的に
電源負荷の上限を越え、一定電流印加ができなくなる。
本実施例では制御コンピュータが電源からの制御エラー
信号を検知すると一時的に通電を停止し10個の直列に
並んだ試料の抵抗を順次測定する。配線抵抗の顕著に大
きな試料については短絡スイッチを閉じ低抵抗の短絡路
を電流経路とし試料全体の抵抗を下げる。その後通電試
験を再開し、一定電流印加を回復する。本実施例では電
源の制御エラー発生時の配線抵抗測定で通電当初の2倍
以上の抵抗となった試料の短絡スイッチを閉じている。
短絡スイッチを閉じる場合には図17に示す配線抵抗の
漸増時と図18に示す急激な抵抗増加時の二つのケース
があるが、本実施例のように後者の急激な抵抗増加時の
判定条件をより緩く即ち、より大きな抵抗増加まで短絡
スイッチが閉じられないように設定することが望まし
い。これはできるだけ各試料に対する測定を継続させる
ための条件である。逆に急激な抵抗増加時の判定条件の
方が厳しい場合には、試料抵抗が設定値まで増加しない
うちに電源の制御エラー発生時の配線抵抗測定により短
絡スイッチが閉じられ測定が中断されてしまうという事
態が発生する可能性がある。
FIG. 17 is a diagram showing the resistance change when the energization life is evaluated by continuously applying a DC constant current. The sample had a wiring width of 2.0 μm and a total wiring length of 2000 μm, and was tested at an ambient temperature of 150 ° C. In this embodiment, the wiring is 200 μ
A voltage measuring terminal was provided every m, and a wiring having a total length of 2000 μm was treated as 10 200 μm wirings arranged in series.
The sample is damaged by energization and the resistance gradually increases. In the conventional method, the wiring of 2000 μm is treated as one sample, so even if the resistance is greatly increased by one damage in the wiring, it is judged that the life has reached the end, and if the current is further continued, the load on the power supply will be finally reached. The upper limit of is exceeded and the test cannot be continued any more. Even if one wire is subdivided and treated as many samples with a short wire length, if the increase in the wire resistance is mainly due to one of the samples, the resistance of the whole wire is exceeded until the upper limit of the load on the power supply is exceeded. However, even if the number of samples increases, the number of samples that have actually reached the service life is limited to one or two, and the purpose of efficiently measuring the service life of many samples cannot be achieved. On the other hand, in the present embodiment, among the samples formed by subdivision, those in which the increase in resistance became a certain value or more were closed by closing the short-circuit switches installed in parallel to make the low-resistance short-circuit path the current path, It is possible to reduce the apparent resistance of the entire wiring and keep the load on the power supply small, and to continue the test until the life of all samples is reached. In FIG. 17, the short-circuit switch is closed when the resistance value of the wiring of 200 μm becomes 1.5 times or more of that at the time of energization. Therefore, the resistance increase of the entire wiring from the beginning of energization is 10% or less, and the test can be continued without worrying about the load on the power supply. FIG. 18 is a diagram showing another pattern of resistance change at the time of energization life evaluation by continuous DC application. In addition to the pattern in which the resistance gradually increases as shown in FIG. 17, the wiring resistance may increase rapidly due to the energization, and as shown in FIG. In this case, the wiring resistance temporarily exceeds the upper limit of the power supply load, and it becomes impossible to apply a constant current.
In this embodiment, when the control computer detects a control error signal from the power source, the energization is temporarily stopped and the resistance of the 10 samples arranged in series is sequentially measured. For samples with remarkably large wiring resistance, close the short-circuit switch and use the low-resistance short circuit as the current path to reduce the resistance of the entire sample. After that, the energization test is restarted and the constant current application is restored. In the present embodiment, the short-circuit switch of the sample, which has a resistance that is more than twice the resistance at the beginning of energization in the wiring resistance measurement when a power supply control error occurs, is closed.
When closing the short-circuiting switch, there are two cases, that is, when the wiring resistance is gradually increased as shown in FIG. 17 and when the resistance is rapidly increased as shown in FIG. It is desirable to set ∑ to be more lenient, that is, the short-circuit switch will not be closed until a greater resistance increase. This is a condition for continuing the measurement for each sample as much as possible. On the other hand, if the judgment condition for a sudden resistance increase is more severe, the short-circuit switch will be closed and the measurement will be interrupted by the wiring resistance measurement when a power supply control error occurs before the sample resistance increases to the set value. The situation may occur.

【0033】図19は本実施例により配線試料を細分化
し通電による損傷発生で配線全体の抵抗が増加した後も
通電を継続し試験した結果を、配線全体に損傷が発生し
ていく状況がわかるように模式的に示した図である。図
19では全長3200μmの配線を32等分して試験を
実施し、(a)→(b)→(c)→(d)の順に通電時
間が10,20,30,40時間と長くなっている。3
2等分された各部分の通電当初の配線抵抗は10から1
1Ωの間であり試料抵抗が通電当初より10%以上増加
した時点を試料の通電寿命とした。配線抵抗が通電当初
の2倍以上になった時点で短絡スイッチが閉じるよう設
定した。
FIG. 19 shows the situation in which damage is caused to the entire wiring as a result of conducting the test by subdividing the wiring sample according to the present embodiment and continuing the energization even after the resistance of the entire wiring is increased due to the damage caused by the energization. It is the figure which showed typically. In FIG. 19, the test was performed by dividing the wiring having a total length of 3200 μm into 32 equal parts, and the energization time was increased to 10, 20, 30, 40 hours in the order of (a) → (b) → (c) → (d). There is. Three
The wiring resistance at the beginning of energization of each of the two parts is 10 to 1
When the resistance of the sample was within 1 Ω and the resistance of the sample increased by 10% or more from the beginning of the energization, the energization life of the sample was defined. The short-circuit switch was set to close when the wiring resistance was more than double that at the time of energization.

【0034】表3は図19の結果をまとめたものであ
る。
Table 3 is a summary of the results shown in FIG.

【0035】[0035]

【表3】 [Table 3]

【0036】32等分された全部分の抵抗を測定してい
ることから、配線を16等分,8等分、などに分割した
場合の寿命も知ることができる。本実施例で評価した配
線では8等分以上に細分化された試料、すなわち400
μm以下の配線長の試料では(a)から(d)の各測定
で寿命に達した試料数が同じであり、(d)以外ではさ
らに4等分された試料でも寿命に達した試料数は同じで
あった。この試料数を通電により発生した不良数と考
え、不良発生率を(a)で1個/3200μm(100
μm,800μm)、(d)で4個/3200μm(100
μm,400μm)と見積もり、異なる材料もしくは構造
を有する配線の間での通電寿命比較に利用することがで
きる。
Since the resistance of all parts divided into 32 equal parts is measured, it is possible to know the life when the wiring is divided into 16 equal parts, 8 equal parts and so on. In the wiring evaluated in this example, a sample subdivided into eight equal parts or more, that is, 400
The samples with a wiring length of μm or less have the same number of samples that have reached the end of life in each measurement from (a) to (d). It was the same. This number of samples is considered as the number of defects generated by energization, and the defect occurrence rate is (a): 1/3200 μm (100
μm, 800 μm), 4 pieces in (d) / 3200 μm (100
.mu.m, 400 .mu.m) and can be used for comparison of energization life between wirings having different materials or structures.

【0037】(実施例6)以下、本発明の他の実施例を
図により説明する。図20は本発明の評価装置の構成を
示す概略図である。配線試料121の両端に電流印加用
端子122,123が接続され、電源124より電流が
流される。複数の電圧測定用端子126の中からスキャ
ナ129により電圧計125で電圧測定を実施する端子
が選択される。ここで、電源124,電圧計125,短
絡スイッ127及びスキャナ129は制御コンピュータ
130で制御されており、試料に一定電流を継続して印
加した際の各端子間電圧が等時間間隔で自動測定され
る。測定の結果抵抗が一定以上増加している端子間は短
絡スイッチ127を閉じ低抵抗の短絡路に電流を通す。
(Embodiment 6) Another embodiment of the present invention will be described below with reference to the drawings. FIG. 20 is a schematic diagram showing the configuration of the evaluation device of the present invention. The current application terminals 122 and 123 are connected to both ends of the wiring sample 121, and a current is supplied from the power supply 124. From the plurality of voltage measuring terminals 126, the terminal for performing voltage measurement with the voltmeter 125 is selected by the scanner 129. Here, the power supply 124, the voltmeter 125, the short-circuit switch 127, and the scanner 129 are controlled by the control computer 130, and the voltage between terminals when a constant current is continuously applied to the sample is automatically measured at equal time intervals. It The short-circuit switch 127 is closed between terminals whose resistance increases by a certain amount or more as a result of measurement, and a current is passed through a low-resistance short-circuit path.

【0038】128は任意の値に設定可能な短絡抵抗で
ある。短絡抵抗128を設けることにより、短絡スイッ
チ127が閉じられた時の試料全体の抵抗変動を小さく
し、電源124に対する負担を小さくする。また、印加
電流が直流でなく高周波もしくは矩形波の場合には試料
のインピーダンスにより印加電流波形が変形するため、
試験中の配線のインピーダンス変化をできるだけ小さく
することが望ましい。そのため任意の抵抗値に設定可能
な短絡抵抗128もしくは短絡インピーダンスを設け、
短絡スイッチ127が閉じられた際の印加電流波形の変
化をできるだけ小さくすることが信頼性の高い試験をす
る上で有効である。
Reference numeral 128 is a short circuit resistance which can be set to an arbitrary value. By providing the short-circuit resistor 128, the resistance fluctuation of the entire sample when the short-circuit switch 127 is closed is reduced, and the load on the power supply 124 is reduced. Also, when the applied current is not direct current but high frequency or rectangular wave, the applied current waveform is deformed by the impedance of the sample,
It is desirable to minimize the impedance change of the wiring during the test. Therefore, a short-circuit resistor 128 or short-circuit impedance that can be set to an arbitrary resistance value is provided,
It is effective in conducting a highly reliable test to minimize the change in the applied current waveform when the short-circuit switch 127 is closed.

【0039】[0039]

【発明の効果】従来の通電寿命評価法では、求める寿命
が試料の配線長に依存し長い配線試料により評価するこ
とが評価結果に対する信頼性を高めることにつながらな
い。さらに場合によっては、評価結果が実素子での信頼
性評価結果に反する場合も生じてしまう。それに対し本
発明によれば、配線長に影響されない配線寿命を効率的
に求めることができる。そのため、多様な長さの配線が
使用されている半導体集積回路素子の信頼性も本発明に
従い求められた通電寿命により保証することができる。
本発明の評価法で通電寿命の長い配線を選択することに
より高信頼性配線を提供することが可能であり、その配
線を使用することにより高信頼性の半導体集積回路素子
の提供も可能となる。
In the conventional energization life evaluation method, the required life depends on the wiring length of the sample, and evaluation with a long wiring sample does not lead to improvement in reliability of the evaluation result. Further, in some cases, the evaluation result may be contrary to the reliability evaluation result of the actual device. On the other hand, according to the present invention, it is possible to efficiently obtain the wiring life which is not affected by the wiring length. Therefore, the reliability of the semiconductor integrated circuit device in which wirings of various lengths are used can be guaranteed by the energization life required according to the present invention.
It is possible to provide a highly reliable wiring by selecting a wiring having a long energization life by the evaluation method of the present invention, and it is also possible to provide a highly reliable semiconductor integrated circuit element by using the wiring. .

【図面の簡単な説明】[Brief description of drawings]

【図1】配線試料及び評価装置の構成を示す説明図。FIG. 1 is an explanatory diagram showing a configuration of a wiring sample and an evaluation device.

【図2】配線試料の断面図。FIG. 2 is a cross-sectional view of a wiring sample.

【図3】配線試料の作製フローを示す工程図。FIG. 3 is a process diagram showing a flow of manufacturing a wiring sample.

【図4】直流通電試験時の配線抵抗の経時変化の特性
図。
FIG. 4 is a characteristic diagram of changes over time in wiring resistance during a DC energization test.

【図5】単層配線での通電寿命−累積不良率の関係を示
す特性図。
FIG. 5 is a characteristic diagram showing a relationship between energization life and cumulative defective rate in a single-layer wiring.

【図6】積層配線での通電寿命−累積不良率の関係を示
す特性図。
FIG. 6 is a characteristic diagram showing a relationship between energization life and cumulative defective rate in laminated wiring.

【図7】試験電流印加パターンを示す図タイミングチャ
ート。
FIG. 7 is a timing chart showing a test current application pattern.

【図8】本発明による配線抵抗の経時変化の説明図。FIG. 8 is an explanatory diagram of changes in wiring resistance with time according to the present invention.

【図9】本発明による積層配線での通電寿命−累積不良
率の関係の特性図。
FIG. 9 is a characteristic diagram showing a relationship between energization life and cumulative defective rate in the laminated wiring according to the present invention.

【図10】各種損傷加速用電流使用時の配線抵抗の経時
変化の特性図。
FIG. 10 is a characteristic diagram of changes in wiring resistance over time when various damage acceleration currents are used.

【図11】試験電流印加パターンを示す説明図。FIG. 11 is an explanatory diagram showing a test current application pattern.

【図12】配線試料及び評価装置の構成を示す説明図。FIG. 12 is an explanatory diagram showing a configuration of a wiring sample and an evaluation device.

【図13】試料の配線長が通電寿命−累積不良率曲線に
及ぼす影響を示す特性図。
FIG. 13 is a characteristic diagram showing the influence of the wiring length of the sample on the energization life-cumulative failure rate curve.

【図14】基板温度50℃で形成したAl合金積層配線
の通電寿命−累積不良率曲線図。
FIG. 14 is a current-life-cumulative fraction defective curve diagram of an Al alloy laminated wiring formed at a substrate temperature of 50 ° C.

【図15】基板温度300℃で形成したAl合金積層配
線の通電寿命−累積不良率曲線図。
FIG. 15 is a current-life-cumulative fraction defective curve diagram of an Al alloy laminated wiring formed at a substrate temperature of 300 ° C.

【図16】本発明による評価装置及び配線試料の構成を
示す説明図。
FIG. 16 is an explanatory diagram showing configurations of an evaluation device and a wiring sample according to the present invention.

【図17】本実施例による直流通電試験時の配線抵抗の
経時変化の一例を示す特性図。
FIG. 17 is a characteristic diagram showing an example of a change over time in wiring resistance during a DC energization test according to the present embodiment.

【図18】本実施例による直流通電試験時の配線抵抗の
経時変化の他の例を示す特性図。
FIG. 18 is a characteristic diagram showing another example of changes over time in wiring resistance during a direct current test according to the present embodiment.

【図19】通電による損傷の発生状況を示す説明図。FIG. 19 is an explanatory diagram showing a situation of damage occurrence due to energization.

【図20】本発明による別な評価装置及び配線試料の構
成を示す説明図。
FIG. 20 is an explanatory diagram showing the configuration of another evaluation device and a wiring sample according to the present invention.

【符号の説明】[Explanation of symbols]

1…Si基板、2…配線試料、3,4…電流印加用端
子、5,6…電圧測定用端子、7…恒温槽、8…プログ
ラマブル電源、9…直流電圧計、10…熱酸化SiO
膜、11…10%Ti−W合金膜。
1 ... Si substrate, 2 ... Wiring sample, 3, 4 ... Current application terminal, 5, 6 ... Voltage measurement terminal, 7 ... Constant temperature chamber, 8 ... Programmable power supply, 9 ... DC voltmeter, 10 ... Thermal oxidation SiO 2
Film, 11 ... 10% Ti-W alloy film.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/3205 // H05K 10/00 7128−4E ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location H01L 21/3205 // H05K 10/00 7128-4E

Claims (16)

【特許請求の範囲】[Claims] 【請求項1】電流印加用端子及び試料抵抗測定用端子を
試料両端に有し前記電流印加用端子間を通電部とする試
料と試料に電流印加する電源端子間電圧を測定する電圧
計により、異なる電流A,BをA,Bの順に少なくとも
一度試料に印加しながら試料抵抗の経時変化を測定し、
通電により試料抵抗が一定比率以上に上昇するまでの時
間を求めそのうち電流Aを通電した延べ時間Lsを試料
の寿命とし、複数の試料の中で寿命に至る試料が一定比
率以上発生するまでの時間を試料を構成する配線の寿命
Lとすることを特徴とする配線の通電寿命評価法。
1. A voltmeter for measuring a voltage between a power supply terminal for applying a current to the sample and a sample having a current applying terminal and a sample resistance measuring terminal at both ends of the sample as a current-carrying portion between the current applying terminals, While applying different currents A and B to the sample at least once in the order of A and B, the change with time of the sample resistance is measured,
The time until the sample resistance rises above a certain ratio by energization is determined, and the total time Ls during which the current A is passed is taken as the life of the sample, and the time until a life of a plurality of samples reaches a certain ratio or more. Is the life L of the wiring that constitutes the sample.
【請求項2】電流印加用端子及び試料抵抗測定用端子を
試料両端に有し前記電流印加用端子間を通電部とする試
料と試料に電流印加する電源端子間電圧を測定する電圧
計により、異なる電流A,BをA,Bの順に試料に印加
し、電流Bの通電後の試料抵抗を測定し、この試料抵抗
が試験開始時に比べ一定比率以上上昇した場合にその試
料の寿命Lsを電流Aでの通電時間Ta以下、試料抵抗
の上昇が一定比率未満の場合にその試料の寿命Lsを電
流Aでの通電時間Taより大きいとし複数の試料の中で
寿命に至る試料が一定比率以上発生するまでの時間を試
料を構成する配線の寿命Lとすることを特徴とする配線
の通電寿命評価法。
2. A voltmeter for measuring a voltage between a power source terminal for applying a current to the sample and a sample having a current applying terminal and a sample resistance measuring terminal at both ends of the sample as a current-carrying portion between the current applying terminals, Different currents A and B are applied to the sample in the order of A and B, and the sample resistance after the current B is applied is measured. When the increase of the sample resistance is less than a certain ratio for the energization time Ta at A or less, the life Ls of the sample is assumed to be larger than the energization time Ta at the current A, and a plurality of samples reach the end of their life at a certain ratio or more. A method for evaluating an energization life of a wiring, characterized in that a time until it is set is a life L of a wiring constituting a sample.
【請求項3】電流印加用端子及び試料抵抗測定用端子を
試料両端に有し前記電流印加用端子間を通電部とする試
料と試料に電流印加する電源端子間電圧を測定する電圧
計により、一定電流を印加しながら試料抵抗の経時変化
を測定し、通電により試料抵抗が一定比率以上に上昇す
るまでの時間Lsを試料の寿命とする配線の通電寿命試
験において、同一の組成及び断面構造を持ちながら試料
の長さに依存して通電寿命が異なり少なくとも一部の長
さ領域で試料が長くなるのに伴い通電寿命が長くなる傾
向を有する配線に対し、試料の長さmの等しい複数の試
料の通電寿命Lsのうち最短のものLt(m)を、mを
短くする方向にLt(m)がmに依存せず一定値Lt0
をとるまで変化させて測定し、Lt0をこの配線の配線
長に依存しない寿命L0 とすることを特徴とする配線の
通電寿命評価法。
3. A voltmeter for measuring a voltage between a power supply terminal for applying a current to the sample and a sample having a current applying terminal and a sample resistance measuring terminal at both ends of the sample as a current-carrying portion between the current applying terminals, In the energization life test of the wiring, the same composition and cross-sectional structure were measured in the energization life test in which the sample life was measured by measuring the change over time in the sample resistance while applying a constant current and increasing the sample resistance to a certain ratio or more by energization. While the wiring has a different energization life depending on the length of the sample and has a tendency that the energization life becomes longer as the sample becomes longer in at least a part of the length region, a plurality of wires having the same sample length m are provided. the Lt (m) the shortest among the current life Ls of samples, a constant value Lt 0 direction Lt (m) does not depend on m to shorten the m
And Lt 0 is defined as a life L 0 that does not depend on the wire length of the wire.
【請求項4】電流印加用端子及び試料抵抗測定用端子を
試料両端に有し前記電流印加用端子間を通電部とする試
料と試料に電流印加する電源試料抵抗を測定する抵抗計
により、電流印加による試料抵抗の経時変化を測定し、
通電により試料抵抗が一定比率以上に上昇するまでの時
間Lsを試料の寿命としそれ以上の抵抗値の試料を不良
と判定する配線の通電寿命試験において、同一の組成及
び断面構造を持ちながら配線試料の長さに依存して通電
寿命分布が異なる配線に対し、評価する配線の総延長を
一定とした際に通電寿命に達する試料数nが、試料の配
線長mがm1<m≦m2 の範囲で一定値n0をとり、この
0がn(m)(但しm>m2)より大きい場合にこの配
線の配線長m1<m<m2で評価した配線の単位長さ当り
の不良発生率をnMAX(m1,m2)と定義することを特
徴とする配線の通電寿命評価法。
4. The current is measured by a sample having a current applying terminal and a sample resistance measuring terminal at both ends of the sample and a power source for applying a current to the sample and a sample having a current-carrying portion as a current-carrying part. Measure the change over time in the sample resistance due to application,
In the current-carrying life test of the wiring, the time Ls until the resistance of the sample rises to a certain ratio or more due to energization is determined as the life of the sample, and a sample having a resistance value higher than that is judged to be defective. The number n of samples that reach the energization life when the total extension of the wiring to be evaluated is constant for wirings having different energization life distributions depending on the length of the wiring, and the wiring length m of the sample is m 1 <m ≦ m 2 takes a constant value n 0 in the range, the n 0 is n (m) (where m> m 2) wiring length m 1 of the wiring is larger than <m <per unit length of the wiring was evaluated in m 2 The method for evaluating the energization life of wiring is characterized in that the defect occurrence rate is defined as n MAX (m 1 , m 2 ).
【請求項5】請求項1において、電流Aが直流、電流B
が一定周期を有するパルス電流であり、電流Bのピーク
値Bp>直流A,電流Aでの通電時間Ta>電流Bでの
通電時間Tb(パルス電流通電時間とパルスオフ時間の
和)とする配線の通電寿命評価法。
5. The electric current A according to claim 1, wherein the electric current A is direct current, and the electric current B.
Is a pulse current having a constant period, and the peak value Bp of the current B> DC A, the energization time Ta at the current A> the energization time Tb at the current B (sum of pulse current energization time and pulse off time) Electrical life evaluation method.
【請求項6】請求項1において、通電試験を電流Aの通
電に先立つ電流C(A<C,電流Aでの通電時間Ta>
電流Cでの通電時間Tc)の通電より開始し、この最初
の電流Cの通電時に断線する試料を初期欠陥品として試
験結果から除く配線の通電寿命評価法。
6. The method according to claim 1, wherein the energization test is conducted with a current C (A <C, energization time Ta at the current A> prior to energization with the current A).
A method for evaluating the energization life of a wiring, which starts from energization for an energization time Tc) at a current C, and excludes a sample that breaks when the first current C is energized as an initial defect product from the test results.
【請求項7】試料に電流印加するための一対の端子,そ
の両端子間に通電するための電源,端子間電圧測定のた
めの電圧計、及び制御コンピュータよりなる評価装置に
おいて、試料の両電流印加端子間の複数の位置で電圧測
定を実施するための電圧測定端子,特定の電圧測定端子
に電圧計を接続するためのスキャナ、及び各電圧測定端
子間の開閉スイッチ付短絡路を有することを特徴とする
配線の信頼性評価装置。
7. An evaluation device comprising a pair of terminals for applying a current to the sample, a power supply for energizing between the terminals, a voltmeter for measuring the voltage between the terminals, and a control computer. It shall have a voltage measurement terminal for performing voltage measurement at multiple positions between the application terminals, a scanner for connecting a voltmeter to a specific voltage measurement terminal, and a short circuit with an open / close switch between each voltage measurement terminal. Characteristic wiring reliability evaluation device.
【請求項8】請求項1において、電圧測定端子の選択及
び各短絡路の開閉を制御コンピュータが実施する配線の
信頼性評価装置。
8. The wiring reliability evaluation device according to claim 1, wherein the control computer performs selection of the voltage measurement terminal and opening / closing of each short circuit.
【請求項9】請求項1において、試料に印加する電流が
短絡スイッチの開閉に係らず一定電流である配線の信頼
性評価装置。
9. The wiring reliability evaluation device according to claim 1, wherein the current applied to the sample is a constant current regardless of whether the short-circuit switch is opened or closed.
【請求項10】請求項1において、端子間の測定電圧が
予め設定した一定範囲よりはずれた場合に短絡路スイッ
チが閉じ、短絡路に電流を通す配線の信頼性評価装置。
10. The reliability evaluation device for wiring according to claim 1, wherein the short-circuit switch is closed when the measured voltage between the terminals is out of a predetermined range, and a current is passed through the short-circuit.
【請求項11】請求項1において、試料抵抗値の経時変
化により電源がコンピュータの制御をはずれた場合に試
料の各端子間の抵抗値を測定し測定値が予め設定した一
定範囲よりはずれている端子間の短絡路スイッチを閉じ
短絡路に電流を通すことにより電源に対する負荷抵抗値
を調節しコンピュータによる電源制御機能を回復する配
線の信頼性評価装置。
11. The method according to claim 1, wherein the resistance value between each terminal of the sample is measured when the power supply is out of control of the computer due to a change in the resistance value of the sample over time, and the measured value deviates from a preset constant range. A wiring reliability evaluation device that restores the power control function by the computer by adjusting the load resistance value to the power supply by closing the short-circuit switch between terminals and passing a current through the short-circuit.
【請求項12】請求項1において、短絡路の抵抗値を各
端子間ごとに任意の値に設定可能である配線の信頼性評
価装置。
12. The wiring reliability evaluation device according to claim 1, wherein the resistance value of the short circuit can be set to an arbitrary value for each terminal.
【請求項13】請求項1,2または3において、通電寿
命評価法による寿命Lもしくは通電寿命評価法による寿
命L0 を通電寿命とし、この通電寿命が別に定められた
環境温度及び電流密度において予め定められた時間Lspe
c 以上である高信頼性配線。
13. The life L according to the current-carrying life evaluation method or the life L 0 according to the current-carrying life evaluation method is defined as the current-carrying life, and the current-carrying life is determined in advance at an environmental temperature and a current density that are separately determined. Specified time Lspe
Highly reliable wiring that is at least c.
【請求項14】請求項13に記載の配線を使用する高信
頼性Si集積回路素子。
14. A highly reliable Si integrated circuit device using the wiring according to claim 13.
【請求項15】請求項1,2または3において、少なく
とも一層のAl合金層を含む集積回路素子用積層配線が
通電寿命評価法による寿命Lもしくは通電寿命評価法に
よる寿命L0 をこの配線の通電寿命とし、配線の通電寿
命が別に定められた環境温度及び電流密度において予め
定められた時間Lspec 以上である高信頼性Al積層配
線。
15. A laminated wiring for an integrated circuit device, comprising at least one Al alloy layer, according to claim 1, 2 or 3, having a life L determined by the energization life evaluation method or a life L 0 determined by the energization life evaluation method. High-reliability laminated aluminum wiring whose life is equal to or longer than the predetermined time Lspec at a separately set environmental temperature and current density.
【請求項16】請求項15において、少なくとも一層の
Al合金層を含む積層配線を使用するSi集積回路素子
がAl積層配線である高信頼性Si集積回路素子。
16. The highly reliable Si integrated circuit element according to claim 15, wherein the Si integrated circuit element using the laminated wiring including at least one Al alloy layer is an Al laminated wiring.
JP5058390A 1993-03-18 1993-03-18 Method and device for evaluating reliability of wiring Pending JPH06273479A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5058390A JPH06273479A (en) 1993-03-18 1993-03-18 Method and device for evaluating reliability of wiring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5058390A JPH06273479A (en) 1993-03-18 1993-03-18 Method and device for evaluating reliability of wiring

Publications (1)

Publication Number Publication Date
JPH06273479A true JPH06273479A (en) 1994-09-30

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP5058390A Pending JPH06273479A (en) 1993-03-18 1993-03-18 Method and device for evaluating reliability of wiring

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JP (1) JPH06273479A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08184646A (en) * 1994-12-28 1996-07-16 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit
CN112084662A (en) * 2020-09-11 2020-12-15 西安高压电器研究院有限责任公司 Method and device for detecting electrical service life of circuit breaker

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08184646A (en) * 1994-12-28 1996-07-16 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit
CN112084662A (en) * 2020-09-11 2020-12-15 西安高压电器研究院有限责任公司 Method and device for detecting electrical service life of circuit breaker

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