JPH0627261A - Digital controller - Google Patents

Abstract

PURPOSE:To simplify a digital controller using a programmable timer and, at the same time, to solve the problem of increasing number of interruptions, etc., resulting from the operations of the timer. CONSTITUTION:The first memory area M1 in a memory 5 is used as a free running counter by advancing the content of the area M1 in steps whenever an interruption request is made so as to actuate a program for controlling equipment to be controlled. Then, by storing the value of the area M1 at a prescribed point of time while the value is continuously counted in the second memory area M2 and comparing the stored value with the continuously changing value of the area M1, the time elapsed from the point of time at which the value of the area M1 is stored in the area M2 can be measured. In addition, when the measured value is compared with a prescribed value, whether or not the time elapsed has reached a prescribed set value can be detected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital controller using a microcomputer, and more particularly to a function of measuring elapsed time (so-called programmable timer).

[0002]

2. Description of the Related Art In a digital control device using a microcomputer, for example, a control device for an internal combustion engine, control contents (fuel injection amount, etc.) are frequently switched according to the elapsed time from a certain time. Therefore, a means for measuring the elapsed time is required, but in the past, for example, a timer (time measuring means) as shown in FIG. 3 has been used.
In FIG. 3, 1 is a central processing unit (hereinafter referred to as CPU) of a microcomputer, 2 is a latch capable of addressing an appropriate bit, 3 is a counter capable of addressing the same bit, and 4 is a data bus. Usually latch 2
The counter 3 is reset by performing a write operation to the counter 3 and preset to a predetermined value. From that point, the counter 3 sequentially subtracts the number of clock pulses from the preset content every time the clock pulse S ₁ is input, When 0, that is, when the number of clock pulses reaches a preset predetermined value, a signal is generated.
This signal is used to set an appropriate interrupt flag and interrupt the CPU 1.

[0003]

However, in the conventional timer as described above, the number of latches and counters corresponding to the number of timer operations and operation modes is required, so that the apparatus is complicated and expensive, and the measurement is difficult. Since the time is input to the CPU by the interrupt operation, when many timer operations are used, there is a problem that the number of interrupts increases and the interrupt processing time increases, which affects other arithmetic processing.

The present invention has been made in order to solve the problems of the prior art as described above, and provides a digital controller which simplifies the device and solves the problems such as the increase in the number of interrupts due to the timer operation. The purpose is to

[0005]

In order to achieve the above object, the present invention is constructed as described in the claims. That is, in the present invention, the contents of the first memory area of the storage device are incremented each time an interrupt for activating a controlled device control program occurs.
The contents of the first memory area at a predetermined time are stored in the second memory area, and the contents of the first memory area and the contents of the second memory area are stored in the second memory area according to the difference between the contents. It is configured to measure the number of executions of the program started by the interrupt from the point of time.

[0006]

As described above, in the present invention, the contents of the first memory area are sequentially stepped up each time there is an interrupt request,
This memory area is used as a free running counter. Then, the value of the first memory area that is being continuously counted at a predetermined time point is stored in the second memory area, and the stored value and the value of the first memory area that is continuously changing are stored. By comparing, it is possible to measure the elapsed time from the time of storing in the second memory area. Further, by comparing the above measured value with a predetermined value, it is possible to detect whether or not the elapsed time has reached a predetermined set value.

[0007]

FIG. 1 is a block diagram of an embodiment of the present invention. In FIG. 1, 5 is a memory, and M _{1 to} M _n are memory areas used for timer operations. Reference numeral 6 is a clock pulse generator. Clock pulse generator 6
Is a clock pulse S every predetermined time (eg, every 10 ms)
₂ is output, and an interrupt request is generated to the CPU 1 by this clock pulse S ₂ . It should be noted that this interrupt request is an interrupt for starting a calculation and is generated in a normal calculation process. The CPU 1 executes an arithmetic routine in response to the above interrupt request, and causes the time counting operation to be performed within this arithmetic routine. First, the contents of a predetermined memory area (for example, M ₁ ) in the memory 5 are sequentially stepped up each time there is an interrupt request, and this memory area M ₁ is used as a free running counter. Next, the value at a predetermined time point in the memory area M ₁ that is continuously counted is stored in another memory area (for example, M ₂ ), and the memory area M ₁ that continuously changes from the stored value. By comparing with the value of, the elapsed time from the time of storing in the memory area M ₂ can be measured. Further, by comparing the above measured value with a predetermined value, it is possible to detect whether or not the elapsed time has reached a predetermined set value. According to the above configuration, all the clocking operation is performed inside the microcomputer, so that it is sufficient to prepare the number of memory areas M _{1 to} M _n by the required number of timer functions, and the configuration is greatly simplified. You can do it.

FIG. 2 shows an example of the actual contents of calculation. FIG. 2 is a flowchart in the case of calculating the fuel injection amount of the internal combustion engine, in the case where the fuel amount is increased for a predetermined time (for example, 3 seconds) at the time of starting the engine. That is, in this case, it is necessary to measure whether or not 3 seconds have elapsed from the start of starting. In the case of this embodiment, a specific memory area, for example, the memory area M ₁ is free-running counter (when it reaches a predetermined value, it returns to 0,
It is used as a counter which automatically starts counting again, and continuously counts the number of interrupt requests. Figure 2
First, at P ₁ , the basic fuel injection amount PW ₁ is calculated. Next, in P _2, a starter switch for actuating the starter motor, it is determined whether ON or OFF, and if not set to OFF namely in startup, flag for detecting the start flag (the start beginning to go to P ₃ ) Is set to 0, and immediately goes to END. On the other hand, when P ₂ is ON, it goes to P ₄ and determines whether the start flag is 1 or 0. When the start flag is 0 in P ₄ , that is, at the start of starting (immediately after the starter switch is turned on), the program goes to P ₅ and the content of the memory area M ₁ used as the free running counter is changed to another memory area. After storing it in M ₂ and setting the start flag to 1, go to P ₆ . Therefore, the content of the memory area M ₂ is the value of M ₁ at the start of starting. On the other hand, if the start flag is 1 at P ₄ , that is, if the engine is being started, the program immediately goes to P ₆ . P ₆ is a routine for determining the elapsed time, and it is determined whether the difference between the memory areas M ₁ and M ₂ , that is, the count value of the free running counter from the start of starting is 3 seconds or more or less. For example, clock pulse S
If the period of ₂ is 10 ms, it corresponds to 3 seconds when the difference between the memory areas M ₁ and M ₂ is 300. In the case of YES in P ₆ , that is, in the case where 3 seconds or more has elapsed from the start of starting, immediately go to END without increasing the fuel amount. P
_{If 6} is NO, that is, if it is less than 3 seconds, a predetermined fuel amount increase (PW ₂ = PW ₁ × K) is performed at P ₇ , and then END
Go to As described above, the content of a certain memory area M ₁ is used as a free-running counter to increment the content at regular time intervals, and the value of the continuously counting memory area M _{1 at} a predetermined time is used as another memory area M ₂ is stored in, by comparing the value of the memory area M ₁ is changing continuously as the value obtained by the storage, it is possible to measure the elapsed time from the time when stored in the memory area M _2. When the free running counter returns to 0 during counting, a carry signal is output and the count value up to that point is added.

[0009]

As described above, according to the present invention, since the elapsed time is measured only by the calculation in the microcomputer, the calculation does not increase the extra interrupt request as in the conventional case. The processing time can be shortened. Moreover, since an additional device such as a latch or a counter is not required, there is an effect that the configuration is simple and the cost is low.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is an embodiment of a flowchart showing a calculation process of the present invention.

FIG. 3 is a block diagram of an example of a conventional device.

[Explanation of symbols]

1 ... central processing unit of a microcomputer (CPU) 2 ... addressable latch 3 ... addressable counter 4 ... data bus 5 ... memory 6 ... clock pulse generator S _1, S ₂ ... clock pulse M ₁ ~M _n ... Memory area used for timer operation

Claims (1)

[Claims] 1. A digital control device comprising at least a central processing unit and a storage device, wherein an interrupt is generated to said central processing unit at a predetermined timing, and a controlled device is controlled by a program activated by the interrupt. , The content of the first memory area of the storage device is incremented each time an interrupt for activating the controlled device control program is generated, and the content of the first memory area at a predetermined time is changed to the second content. Store in memory area, first
The number of executions of the program activated by the interrupt from the time when the program is stored in the second memory area is measured based on the difference between the content of the memory area and the content of the second memory area. Control device.