JPH06265650A - Timepiece - Google Patents

Timepiece

Info

Publication number
JPH06265650A
JPH06265650A JP5215893A JP5215893A JPH06265650A JP H06265650 A JPH06265650 A JP H06265650A JP 5215893 A JP5215893 A JP 5215893A JP 5215893 A JP5215893 A JP 5215893A JP H06265650 A JPH06265650 A JP H06265650A
Authority
JP
Japan
Prior art keywords
time
reception
signal
controller
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5215893A
Other languages
Japanese (ja)
Other versions
JP3288788B2 (en
Inventor
Kunio Yamada
邦夫 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seikosha KK
Original Assignee
Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seikosha KK filed Critical Seikosha KK
Priority to JP5215893A priority Critical patent/JP3288788B2/en
Publication of JPH06265650A publication Critical patent/JPH06265650A/en
Application granted granted Critical
Publication of JP3288788B2 publication Critical patent/JP3288788B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To provide a time piece which effectively receives a time signal and corrects a time by controlling a reception time of receiving means for receiving a time signal of a predetermined time in response to a lapse time from the previous time of correcting a time of a time display unit. CONSTITUTION:At the time of delivering from a factory, a timepiece in a controller 7 is corrected to start counting, and an integrating counter 6 starts counting. A battery 9 is turned ON, a display time of a time display unit 4 is brought into coincidence with a counted time of the timepiece in the controller 7, and then the controller 7 so sets a reception starting time and a reception finishing time to a next receiving predetermined time signal in response to the counted value of the counter 6 and an accuracy of a crystal oscillator in the controller 7 as to be proportional to a read counted value, stores in a RAM in the controller 7, and operates a receiver 3 when it becomes a set time.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、時報信号を受信して時
刻修正を行う時計に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timepiece that receives a time signal and adjusts the time.

【0002】[0002]

【従来の技術】従来のラジオ放送による時報信号を受信
して時刻修正を行う時計、例えば1ケ月に1回月末の2
3:00に時報信号を受信して時刻修正を行う時計で
は、時報信号の受信時間範囲は、内部時計の計時時刻が
23:00になる±30秒の範囲となるように固定され
ていた。
2. Description of the Related Art A conventional clock that receives a time signal from a radio broadcast to adjust the time, for example, once a month at the end of the month.
In the timepiece that receives the hourly signal at 3:00 and corrects the time, the reception time range of the hourly signal is fixed so that the time measured by the internal clock becomes 23:00 ± 30 seconds.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記の
ものでは、時報信号の受信時間範囲が固定されているの
で、例えば時計の精度が悪くノイズ等により時報信号を
連続して受信できない場合には、内部時計の誤差が累積
し、計時時刻が実際の時刻と30秒以上ずれてしまい、
受信時間内に時報信号を受信できなくなるという問題点
を有している。
However, in the above-mentioned one, since the reception time range of the time signal is fixed, for example, when the time signal is inaccurate and the time signal cannot be received continuously due to noise or the like, The error of the internal clock accumulates, and the measured time deviates from the actual time by 30 seconds or more.
There is a problem that the time signal cannot be received within the reception time.

【0004】本発明の目的は、確実に時報信号を受信し
て調時を行うことである。
An object of the present invention is to reliably receive a time signal and perform timing.

【0005】[0005]

【課題を解決するための手段】本発明は、所望時刻の時
報信号を受信する受信手段と、上記時報信号の入力によ
り調時され、時刻を表示する時刻表示部と、上記時刻表
示部の前回の調時からの経過時間を計時する計時手段
と、上記計時手段の値に応じて上記受信手段の受信時間
を制御する制御手段とを設けることにより、上記目的を
達成している。
The present invention provides a receiving means for receiving a time signal of a desired time, a time display section for displaying the time adjusted by the input of the time signal, and a previous time display section of the time display section. The above object is achieved by providing a clocking means for clocking an elapsed time from the timing of and a control means for controlling the receiving time of the receiving means according to the value of the clocking means.

【0006】[0006]

【実施例】以下、本発明を図面に示す一実施例に基づい
て具体的に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below based on an embodiment shown in the drawings.

【0007】図1において、1は受信手段で、アンテナ
2と受信回路3とからなり、例えばNHK第1放送の時
報信号を受信し出力する。なお、毎月5日のAM2:0
0の時報信号を受信するよう設定してある。4は時刻表
示部で、現在時刻を指針5で表示するとともに、受信回
路3が出力する時報信号により、2:00に調時され
る。6は計時手段を構成する積算カウンタで、時刻表示
部4の前回の調時からの経過時間を計時する。7は制御
手段を構成する制御回路で、CPU,ROM,RAM,
水晶発振器および分周器等からなり、カレンダ情報を持
つ内部時計を有し、各種の動作を制御する。8,9は電
池で、電池8は本時計の製造工程で取り付けられ、積算
カウンタ6,制御回路7に電源を供給する。電池9はユ
ーザーにより時計の使用時に投入されるものであり、受
信回路3,時刻表示部4,積算カウンタ6,制御回路7
に電源を供給する。10は電圧検出回路で、電池9の投
入を検出する。11,12はダイオードである。
In FIG. 1, reference numeral 1 is a receiving means, which is composed of an antenna 2 and a receiving circuit 3, and receives and outputs a time signal signal of NHK first broadcast, for example. In addition, AM 2: 0 on the 5th of every month
It is set to receive a time signal of 0. A time display unit 4 displays the current time with the hands 5, and is timed at 2:00 by the time signal output from the receiving circuit 3. Reference numeral 6 denotes an integrating counter which constitutes a time measuring means, and measures the elapsed time from the previous time adjustment of the time display section 4. Reference numeral 7 is a control circuit which constitutes a control means, and includes a CPU, a ROM, a RAM,
It consists of a crystal oscillator and frequency divider, has an internal clock with calendar information, and controls various operations. Reference numerals 8 and 9 denote batteries. The battery 8 is attached in the manufacturing process of the timepiece, and supplies power to the integration counter 6 and the control circuit 7. The battery 9 is inserted by the user when the watch is used, and includes a receiving circuit 3, a time display unit 4, an integrating counter 6, and a control circuit 7.
Supply power to. Reference numeral 10 is a voltage detection circuit that detects the charging of the battery 9. Reference numerals 11 and 12 are diodes.

【0008】次に、図2を参照して電池9投入時の動作
を説明する。
Next, the operation when the battery 9 is inserted will be described with reference to FIG.

【0009】工場出荷時において、生産ラインにある時
刻設定回路(図示せず。)から出力される時刻調時信号
が、電池8が投入されている本時計の端子Aに入力する
ことにより、制御回路7の内部時計が調時され、この内
部時計が現在時刻の計時を開始するとともに、積算カウ
ンタ6を“0”にリセットして、カウントを開始させ
る。このとき、制御回路7は時刻表示部4に駆動信号を
出力しないので、時刻表示部4は現在時刻の表示を行わ
ない。
At the time of factory shipment, control is performed by inputting a time timing signal output from a time setting circuit (not shown) in the production line to the terminal A of the timepiece in which the battery 8 is inserted. The internal clock of the circuit 7 is clocked, the internal clock starts counting the current time, and the integration counter 6 is reset to "0" to start counting. At this time, since the control circuit 7 does not output the drive signal to the time display unit 4, the time display unit 4 does not display the current time.

【0010】このように工場出荷時に内部電池8を投入
し、内部時計を現在時刻に合せ込んでおくため、ユーザ
ーが本時計を購入したときに、煩しい時刻合せ操作が不
要になる。
As described above, since the internal battery 8 is turned on at the time of factory shipment and the internal clock is set to the current time, a troublesome time setting operation is not necessary when the user purchases this clock.

【0011】ユーザーが本時計を購入して、電池9を投
入すると(ステップ2a)、電圧検出回路10は制御回
路7に対して検出出力を発生する。
When the user purchases this watch and inserts the battery 9 (step 2a), the voltage detection circuit 10 generates a detection output to the control circuit 7.

【0012】制御回路7は、電圧検出回路10からの検
出出力の入力により、指針5の早送り駆動信号を出力
し、時刻表示部4の表示時刻を制御回路7の内部時計の
計時時刻と一致させる(ステップ2b)。なお、時刻表
示部4の表示時刻と制御回路7の内部時計の計時時刻と
が一致した後は、通常の運針を行う。
The control circuit 7 outputs a fast-forward drive signal for the hands 5 in response to the detection output from the voltage detection circuit 10 to make the display time of the time display section 4 coincide with the time measured by the internal clock of the control circuit 7. (Step 2b). After the display time of the time display unit 4 and the clocked time of the internal clock of the control circuit 7 match, normal hand movement is performed.

【0013】時刻の一致が検出された後、制御回路7は
積算カウンタ6のカウント値(工場出荷時に時刻合せを
行ってからの経過時間)を読み出し(ステップ2c)、
読み出したカウント値と制御回路7内の水晶発振器の精
度に応じて、読み出したカウント値に比例するように、
次に受信する予定の時報信号に対する受信開始時刻およ
び受信終了時刻とを設定し、設定した受信開始時刻と受
信終了時刻とを制御回路7内のRAMに記憶する(ステ
ップ2d)。
After the time coincidence is detected, the control circuit 7 reads the count value of the integration counter 6 (elapsed time after the time adjustment at the time of factory shipment) (step 2c),
Depending on the read count value and the accuracy of the crystal oscillator in the control circuit 7, in proportion to the read count value,
The reception start time and reception end time for the next time signal to be received are set, and the set reception start time and reception end time are stored in the RAM in the control circuit 7 (step 2d).

【0014】なお、受信開始時刻と受信終了時刻との設
定例としては、例えば制御回路7内の水晶発振器による
内部時計の精度が月差±20秒程度の場合、積算カウン
タ6のカウント値をx(日)とすると、受信開始時刻お
よび受信終了時刻は“AM2:00−20秒×x/3
0”,“AM2:00+20秒×x/30”となり、積
算カウンタ6のカウント値が1ケ月(x=30日)だと
受信開始時刻および受信終了時刻は、“AM2:00−
20秒”と“AM2:00+20秒”となる。以下、積
算カウンタ6のカウント値が2ケ月,3ケ月…となるに
従って、受信開始時刻および受信終了時刻は“AM2:
00±40秒”,“AM2:00±60秒”,…とな
る。
As an example of setting the reception start time and the reception end time, for example, when the accuracy of the internal clock by the crystal oscillator in the control circuit 7 is about ± 20 seconds per month, the count value of the integrating counter 6 is x. If it is (Sunday), the reception start time and reception end time are “AM 2: 00-20 seconds × x / 3”.
0 ”,“ AM 2: 00 + 20 seconds × x / 30 ”, and if the count value of the integration counter 6 is one month (x = 30 days), the reception start time and the reception end time are“ AM 2: 00-
20 seconds ”and“ AM 2: 00 + 20 seconds. ”As the count value of the integrating counter 6 becomes 2 months, 3 months ..., the reception start time and reception end time are“ AM2:
00 ± 40 seconds ”,“ AM2: 00 ± 60 seconds ”, ...

【0015】そして、制御回路7の内部時計により5日
が計時され、その計時時刻が制御回路7のRAMに記憶
してある受信開始時刻になると(ステップ2e)、制御
回路7は受信回路3を動作させる(ステップ2f)。
When the internal clock of the control circuit 7 measures 5 days and the measured time reaches the reception start time stored in the RAM of the control circuit 7 (step 2e), the control circuit 7 causes the reception circuit 3 to operate. It is operated (step 2f).

【0016】受信回路3がAM2:00の時報信号を受
信すると(ステップ2g)、制御回路7の内部時計をA
M2:00に修正して(ステップ2h)、積算カウンタ
6をクリヤし(ステップ2i)、時刻表示部4の表示時
刻を2:00に修正する(ステップ2j)。
When the receiving circuit 3 receives the time signal of 2:00 AM (step 2g), the internal clock of the control circuit 7 is set to A.
The time is corrected to M2: 00 (step 2h), the integration counter 6 is cleared (step 2i), and the display time of the time display unit 4 is corrected to 2:00 (step 2j).

【0017】時刻表示部4の表示時刻の修正が終了する
と、受信回路3の動作を停止し(ステップ2k)、動作
を終了する。
When the correction of the display time of the time display section 4 is completed, the operation of the receiving circuit 3 is stopped (step 2k) and the operation is completed.

【0018】また、受信終了時刻までに受信回路3が時
報信号を受信しない場合(ステップ2g,2m)、上記
と同様に受信回路3の動作を停止する。この場合、積算
カウンタ6のカウントはリセットされずに続行する。
If the receiving circuit 3 does not receive the time signal by the reception end time (steps 2g, 2m), the operation of the receiving circuit 3 is stopped as described above. In this case, the count of the integration counter 6 is not reset and continues.

【0019】次に、図3を参照して通常運針時の動作を
説明する。
Next, the operation during normal hand movement will be described with reference to FIG.

【0020】制御回路7の内部時計が5日のAM2:0
0の1時間前、すなわちAM1:00になると(ステッ
プ3a)、制御回路7は積算カウンタ6のカウント値を
読み出し(ステップ3b)、上記と同様に読み出したカ
ウント値と制御回路7内の水晶発振器の精度に応じて、
次に受信する予定の時報信号に対する受信開始時刻およ
び受信終了時刻とを設定し、設定した受信開始時刻と受
信終了時刻とを制御回路7内のRAMに記憶する(ステ
ップ3c)。そして、制御回路7の内部時計の計時時刻
が制御回路7のRAMに記憶してある受信開始時刻にな
ると(ステップ3d)、制御回路7は受信回路3を動作
させる(ステップ3e)。
The internal clock of the control circuit 7 is AM 2: 0 on the 5th.
One hour before 0, that is, when it becomes AM 1:00 (step 3a), the control circuit 7 reads the count value of the integration counter 6 (step 3b), and the count value read in the same manner as above and the crystal oscillator in the control circuit 7 are read. Depending on the accuracy of
The reception start time and reception end time for the next time signal signal to be received are set, and the set reception start time and reception end time are stored in the RAM in the control circuit 7 (step 3c). When the time measured by the internal clock of the control circuit 7 reaches the reception start time stored in the RAM of the control circuit 7 (step 3d), the control circuit 7 operates the reception circuit 3 (step 3e).

【0021】以下、上記と同様の動作を行う。Thereafter, the same operation as described above is performed.

【0022】このように、制御回路7内の水晶発振器の
精度と積算カウンタ6のカウント値に比例して、時報信
号を受信するための受信時間を変更するので、確実に時
報信号を受信することができ、時計の調時を正確に行う
ことができる。
As described above, the reception time for receiving the time signal is changed in proportion to the accuracy of the crystal oscillator in the control circuit 7 and the count value of the integrating counter 6, so that the time signal can be reliably received. The clock can be timed accurately.

【0023】例えば、時報信号を受信できなかった場
合、積算カウンタ6のカウント値が大きくなり受信時間
が長くなるので、累積される誤差の分をカバーすること
ができ、確実に時報信号を受信することができる。
For example, when the time signal is not received, the count value of the integration counter 6 becomes large and the reception time becomes long, so that the accumulated error can be covered and the time signal is surely received. be able to.

【0024】なお、上記では積算カウンタ6のカウント
値が1ケ月を経過するごとに、受信開始時刻と受信終了
時刻とを20秒ずつ広げていったが、制御回路7内の水
晶発振器の精度に応じて、適宜変更可能である。例え
ば、制御回路7内の水晶発振器の精度が月差±30秒程
度の場合、積算カウンタ6が1ケ月をカウントしていた
場合、受信開始時刻を“AM2:00−30秒”、受信
終了時刻を“AM2:00+30秒”とし、以下、積算
カウンタ6のカウント値が2ケ月,3ケ月…となるに従
って、受信開始時刻および受信終了時刻は“AM2:0
0±60秒”,“AM2:00±90秒”,…というよ
うに設定することが望ましい。
In the above description, the reception start time and the reception end time are extended by 20 seconds each time the count value of the integration counter 6 passes one month. However, the accuracy of the crystal oscillator in the control circuit 7 is increased. It can be changed as appropriate. For example, when the precision of the crystal oscillator in the control circuit 7 is about ± 30 seconds per month, when the integration counter 6 is counting one month, the reception start time is “AM 2: 00-30 seconds” and the reception end time is Is set to “AM2: 00 + 30 seconds”, and thereafter, as the count value of the integration counter 6 becomes 2 months, 3 months ..., the reception start time and the reception end time are “AM2: 0”.
It is desirable to set such as 0 ± 60 seconds, AM2: 00 ± 90 seconds, ....

【0025】また、上記では毎月5日のAM2:00の
時報信号を受信するようしたが、上記に限らず、受信予
定時刻、受信間隔等は適宜変更可能である。
Further, in the above, the hourly signal of 2:00 am on the 5th of every month is received, but not limited to the above, the scheduled reception time, the reception interval, etc. can be changed as appropriate.

【0026】また、上記では受信する予定の時報信号が
発生する1時間前に積算カウンタのカウント値を読み出
したが、これも上記に限らず、適宜変更可能である。
Further, in the above, the count value of the integration counter is read out one hour before the time signal signal to be received is generated, but this is not limited to the above, and can be changed as appropriate.

【0027】[0027]

【発明の効果】本発明によれば、時刻表示部の前回の調
時からの経過時間に応じて、所望時刻の時報信号を受信
する受信手段の受信時間を制御するので、時報信号を確
実に受信でき、調時を確実に行える。よって、正確な時
刻表示を行える。
According to the present invention, the reception time of the receiving means for receiving the time signal of the desired time is controlled according to the time elapsed from the last time adjustment of the time display section, so that the time signal is surely transmitted. Can be received and can be timed reliably. Therefore, accurate time display can be performed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示したブロック回路図。FIG. 1 is a block circuit diagram showing an embodiment of the present invention.

【図2】図1の動作説明のためのフローチャート。FIG. 2 is a flowchart for explaining the operation of FIG.

【図3】図1の動作説明のためのフローチャート。FIG. 3 is a flowchart for explaining the operation of FIG.

【符号の説明】[Explanation of symbols]

1 受信手段 4 時刻表示部 6 計時手段 7 制御手段 1 Receiving means 4 Time display section 6 Clocking means 7 Control means

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 所望時刻の時報信号を受信する受信手段
と、 上記時報信号の入力により調時され、時刻を表示する時
刻表示部と、 上記時刻表示部の前回の調時からの経過時間を計時する
計時手段と、 上記計時手段の値に応じて上記受信手段の受信時間を制
御する制御手段とを具備したことを特徴とする時計。
1. A receiving means for receiving a time signal of a desired time, a time display section for displaying the time, which is timed by the input of the time signal, and a time elapsed from the last time of the time display section. A timepiece comprising: a clocking means for clocking; and a control means for controlling the reception time of the receiving means according to the value of the clocking means.
JP5215893A 1993-03-12 1993-03-12 clock Expired - Fee Related JP3288788B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5215893A JP3288788B2 (en) 1993-03-12 1993-03-12 clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5215893A JP3288788B2 (en) 1993-03-12 1993-03-12 clock

Publications (2)

Publication Number Publication Date
JPH06265650A true JPH06265650A (en) 1994-09-22
JP3288788B2 JP3288788B2 (en) 2002-06-04

Family

ID=12907047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5215893A Expired - Fee Related JP3288788B2 (en) 1993-03-12 1993-03-12 clock

Country Status (1)

Country Link
JP (1) JP3288788B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005257487A (en) * 2004-03-11 2005-09-22 Seiko Clock Inc Clocking device, clocking system, and clocking method
US7555651B2 (en) 2003-05-28 2009-06-30 Fujitsu Limited Time management apparatus and time management method
US8953999B2 (en) 2011-08-30 2015-02-10 Seiko Epson Corporation Satellite signal receiving device and electronic device
US9448538B2 (en) 2011-04-21 2016-09-20 Seiko Epson Corporation Electronic timepiece and time adjustment method
JP2019164025A (en) * 2018-03-20 2019-09-26 シチズン時計株式会社 Radio-controlled watch
CN116886080A (en) * 2023-09-08 2023-10-13 宝捷时计电子(深圳)有限公司 Control device for timing device and control method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7555651B2 (en) 2003-05-28 2009-06-30 Fujitsu Limited Time management apparatus and time management method
JP2005257487A (en) * 2004-03-11 2005-09-22 Seiko Clock Inc Clocking device, clocking system, and clocking method
US9448538B2 (en) 2011-04-21 2016-09-20 Seiko Epson Corporation Electronic timepiece and time adjustment method
US8953999B2 (en) 2011-08-30 2015-02-10 Seiko Epson Corporation Satellite signal receiving device and electronic device
US9154181B2 (en) 2011-08-30 2015-10-06 Seiko Epson Corporation Satellite signal receiving device and electronic device
JP2019164025A (en) * 2018-03-20 2019-09-26 シチズン時計株式会社 Radio-controlled watch
CN116886080A (en) * 2023-09-08 2023-10-13 宝捷时计电子(深圳)有限公司 Control device for timing device and control method thereof
CN116886080B (en) * 2023-09-08 2023-12-29 宝捷时计电子(深圳)有限公司 Control device for timing device and control method thereof

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