JPH06262809A - Printer control device - Google Patents

Abstract

PURPOSE:To make a busy signal as short as possible by storing receiving data in a memory buffer from a receiving buffer by a receiving data holding means when it is detected that the receiving buffer is in a full state by a receiving data holding quantity detection means. CONSTITUTION:When no data is taken in (S 50), the number-of-residual bite obtaining processing of a receiving buffer is performed. The number of residual bites of the receiving buffer is obtained by reading the blank register of a parallel IF register and the read content becomes the number of residual bites of the receiving buffer. It is checked whether the read number of residual bites is 0 (S 51) and, when the residual bites are not 0, the previous processing is again performed and, when the residual bites are 0, it is checked whether a memory buffer is in a full state (S 53). This check is performed by comparing a memory buffer end address with a memory buffer pointer. Since storing can not be performed when the memory buffer is in the full state, the previous processing is again performed and, when the memory buffer is not in the full state, receiving data is read (S 54) and the memory buffer pointer is advanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printer and a printer control system which have a reception buffer for storing reception data and can inform the host of the status of the reception buffer as a busy signal.

[0002]

2. Description of the Related Art Conventionally, a printer having a reception buffer for storing print data sent from a host is generally known. In such a printer, the data transferred from the host can be stored in the reception buffer, and the stored data can be sequentially processed to expand the print data and control the printing. In general, a printer is capable of independently performing the receiving process and the printing operation in the receiving buffer. In recent years, as the performance of the host has been improved, the data transfer speed from the host to the printer has been increased. The printer also has a large amount of receive buffers, and hardware circuits are used to control the receive buffers to speed up the process of receiving data from the host. However, since the printer involves an actual printing operation as compared with the host, it cannot be expected to achieve the higher speed than the host. As a result, a large amount of data from the host is stored in the reception buffer, and the reception buffer becomes full for a longer time. Further, it is general to inform the host of the printer status as a busy signal, and the host can also know the full status of the reception buffer of the printer as a busy signal. If the printer is busy, the printer's receive buffer may be full and the host will know that it cannot transfer data to the printer. As for the busy signal, when the data in the receiving buffer is processed and the receiving buffer becomes vacant, the busy signal of the printer due to the receiving buffer being full is canceled and the host can transfer the next data. However, the data stored in the receive buffer is consumed by the expansion of print data and the control of printing, but the process that is not related to the data in the receive buffer, that is, the process that is executed independently, such as Since the data in the reception buffer is not consumed for paper, paper feeding, etc., the processing of the reception data is interrupted until these processings are completed. During this time, the receive buffer is full and the printer signals a busy signal to the host. In addition, as the host speed increases, the printer tends to be busy for a longer period of time even in normal cases.

[0003]

However, in the above-mentioned conventional example, since the busy signal is not only set when the receive buffer is full, the host increases the time during which the printer is busy. It is determined that some error has occurred, or if the printer correctly receives the data without concluding that it is an error, the subsequent processing is continued. If it is judged as an error, although the printing is not completed to the end, the host may finish the data transfer, or the printer may not correctly receive the data but the host may send the next data, The data on the way is lost. As a result, a correct print result may not be obtained, or an incorrect print result may occur.

[0004]

According to the present invention, the state of the receiving buffer can be regularly monitored, and if the receiving buffer is full, the received data is saved in the saving buffer. As a result, it is possible to shorten the time of the busy signal generated due to the reception buffer being full. Also, because the busy signal can be canceled periodically, data can be transferred from the host to the printer, which could not be sent until now, and printing has been interrupted due to a long busy signal. It is possible to eliminate the loss of print data and print data and obtain correct print results.

[0005]

【Example】

(Embodiment 1) Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings. The country designation in the present invention is
Designating a desired group from a plurality of groups specified by certain conditions related to document processing, such as language and region. In addition, the group may include a plurality of countries such as the United Kingdom and the United States by designating the United Kingdom, or may specify the country of Japan and one of the countries, but it corresponds to almost all the languages used. Is.

FIG. 1 is a perspective view showing a personal computer (hereinafter abbreviated as a personal computer) as an information processing apparatus as an embodiment of the present invention. PC 1 is the device body 10
1, a keyboard 102, an upper cover 104 including a display unit 103, a printer 2, and the like.
The upper cover 104 is rotatably attached to the apparatus main body 101 via hinges 104a provided at both ends of its rear edge. As a result, when using this device,
The upper cover 104 can be opened to a position where the display 103 can be easily seen by the rotation thereof, and can be closed when not in use to function as a cover. As the display element of the display section 103, a liquid crystal display element is used because the display section can be made thin.

[Schematic Block Diagram of Host-Printer] FIG. 2 shows a schematic block diagram of a host computer and a printer.

First, in the host computer, it is the central processing unit (CPU) that controls the main control, and it is the BIOS ROM that directs the basic control.
(Basic Input Output System
m ROM). From floppy disk (FDD) or hard disk (HDD) to floppy disk controller (FDC) or hard disk controller (H
The application program is read via the DC) and the program is executed using the system memory (RAM). At this time, the screen display method is LC
Characters and the like are displayed on the liquid crystal (LCD) using the D controller (LCDC), and key input from the keyboard (KB) is performed via the keyboard controller (KBC). Here, the numerical processor (FP
U) supports arithmetic processing for the CPU. The real-time clock (RTC) indicates the elapsed time at the present time, and the operation is performed by the dedicated battery even when the power of the entire system is turned off. The DMA controller (DMAC) transfers data at high speed between the memories, between the memories, between the memories and I / O, and between the I / O and I / O, so that the data is transferred without intervention of the CPU. Interrupt controller (IRQ
C) accepts an interrupt from each I / O and performs processing according to the priority order. The timer (TIMER) has a free-running timer of several channels and manages various times. In addition, there are a serial interface (SIO), an expansion port (PORT), and an LED that communicates the operating status to the user, which are connected to the outside.

In addition to the above-mentioned controls of a general personal computer, it is necessary for a notebook personal computer (personal computer) to support at least two power sources of an AC adapter / battery. It requires electric power and has the following configuration. On-off of EL inverter circuit / power supply to FDD / power supply to HDD / printer-off / time control of power supply to devices other than RAM and VRAM, CLOCK control of CPU, suspend / resume. A host power management unit (host PM unit) that controls the power supply control procedure at the time, and a RAM by an instruction signal from the host PM unit
And a refresh controller for switching and refreshing the VRAM between suspend and cpu-clock operations, and a charge controller capable of driving the host side while charging the secondary battery.

The printer is connected to the host computer by a general-purpose parallel interface.
Data is sent and received at the register level of the / O port,
The image of connection is the same as when communicating with an external printer.

[Block Diagram of Printer] FIG. 3 is a block diagram showing the configuration of the control system of the printer section, and the main configuration is as follows.

Here, the CPU-P is a microprocessor type CPU that performs the main control of the printer unit, and is accessible from the host side via the PST / IO register of the printer control & status port unit.
Printer status information and emulation setting information are exchanged with the O-register, and based on this status setting, the host side P
A device / register / on the CPU-P according to a program or data pre-microcoded and stored in a ROM-P, which will be described later, according to a printer command or data obtained via the IO / IO register. Use memory. The ROM-P is a program corresponding to the recording control procedure (for example, FIGS. 14 to 21) and the print control procedure executed by the CPU-P that executes the processing of FIGS. 14 to 21, a character generator (CG), and other tables. And a ROM (Read Only Memory) for storing fixed data such as default values. TIMER1-P is a TIMER for obtaining the drive phase time of the paper feed motor (FM) / heater and the like and other time timings, and RTC-P is an RTC (real time clock) for knowing the elapsed time of the recovery operation. In addition, the composite control unit includes IF transfer control / power saving control /
RAM access control / printer control & status control / printer port control etc.
The AM access control / printer control & status control / power saving control etc. do not depend on the control of the CPU-P.
-Independent control is possible even during P clock stop and fault. The above configuration is connected to the BUS of the CPU-P. RAM-P is a RAM having a work area used as a register, a line buffer for storing print data for one line, a dot expansion buffer re-developed into dots, an INPUT buffer from a parallel IF, and an emulation information recording area. (Random access memory), RAM between combined control unit and RAM
RAM of composite control unit connected by bus
The control unit allows the RAM-P to be accessed from a plurality of control units including the CPU-P described later. Each printer drive control signal is output from the composite control unit, and FM drive circuit / CM drive circuit / head driver /
The heater driver converts the drive level into FM / CM / BJ-Head / heater etc., and the printer FM (feed motor) / CM (carrier motor) / BJ-Hea
d Each part is driven. Combined control U as a power saving control signal
From NIT to Vcc1P-off / Vcc2P-off /
It has a power control signal of Vp-off, Printer-off / printer sensors / operation panel SW as an input signal, and an LED drive signal of the operation panel as an output signal. Of these, Vcc is generated only by the change of the Printer-off signal from active to inactive.
1-P power is supplied, UIT / CPU combined control
Power can be supplied only to -P / RAM-P. Also,
Vcc1P-off can turn off the power of Vcc1P at the changed OFF timing according to the printer-off signal according to the printer driving status, that is, the head is cap open and the power is turned off, which is fatal. It does not cause any obstacles.

FIG. 4 shows a block diagram of the composite control unit.

As a functional block, a parallel IF adapter mainly functioning as an IF adapter from the host side, and an inp of the RAM-P via the parallel IF adapter are used.
IF data fetching control unit for storing parallel data on ut-buffer, printer control & status port unit mainly for confirming and controlling the printer state directly from the host side, refresh control unit for generating RAM-P refresh timing , RAM
-BJ-head / CM control unit that reads out the 1-line dot development data on P and drives and prints the BJ head while also controlling the phase excitation of the carrier, and FM / heater / LE
Printer port control unit for driving D, etc., IF data acquisition control unit, refresh control unit, BJ-head / C
An M control unit and a RAM access control unit that has access rights according to priority for four access requests of the CPU-P, and a printer PM unit that performs power saving control. Although power saving control will be described later, the return from the low power consumption mode in which the supply clock is stopped in the CPU-P fault state to the normal processing state is brought about by various interrupts centrally managed by the PM control unit. , CPU-P return condition is output and then output as INT
-P resumes processing.

FIG. 5 shows a parallel IF adapter (PIO /
IO), showing the configuration of IFdata, IFsta
It consists of tus, IFcontrol, and IBblank registers, which can be read / written from the host computer side and printer logic bidirectionally.
It is an O register area.

IFdata is a data register for the host side to send a print control command and print dot data to the printer, and data is exchanged in units of 8 bits (1 byte).

IFstatus is a status register indicating a reception acceptance state of IFdata from the printer side to the host, and is a Busy / Ack signal when performing a handshake in 1-byte units, and E indicating a printer error.
It has a rror signal.

IFcontrol is a control register for transmitting IFdata from the host side to the printer and has a Data Strobe signal for handshake in 1-byte units.

IBblank is a register indicating the number of bytes in the empty area in the reception data buffer area.

FIG. 6 shows an IO register (PIF / IO) seen from the printer side in the IF data fetch control section.
IBstart IBend I
It consists of each register of Bpoint1.

FIG. 7 shows an IO register (PIB / IO) seen from the printer side in the IB data read control unit.
IBpoint2 IBstat
It consists of each register of usIBdata.

FIG. 8 shows the configuration of the IO register (PBJ / IO) seen from the printer side in the printer control section.

PBstart, PBend, PBpoi
nt, PBstatus, PB control information, CM phase excitation signal, FM phase excitation signal, heater drive signal, LED control signal register.

FIG. 9 is an address area of the print buffer (PB) managed by the printer controller and the receive buffer (IB) managed by the IF data fetch controller and IB data read controller on the RAM-P of FIG. Shows the arrangement.

The print buffer area sets a data area necessary for printing, and can be set by using the PBJ / IO register shown in FIG. 8, and the start address (PBs
By setting (start) and end address (PBend), the print data is sequentially read from the start address by the printer control unit within that range, and the print data is read from the RAM-P until the end address and controlled by the head driver. A signal is transmitted to perform printing, and the print data address pointer (PBpoint) at this time indicates the data address of the data currently being transmitted.

Similarly, the reception buffer area is used to set a data area necessary for reception, and the PIF / I shown in FIG. 6 is used.
It can be set using the O register. By setting the start address (IBstart) and the end address (IBend), the range from the start address to the end address is sequentially set by the IF data fetch control unit.
The data (IFdata) sent from the host side is R
Writing on the AM-P, and when the end address is passed, it returns to the start address again and the same write operation is performed. At this time, IBpoint1 indicates the data address which has been already received and is the last written data address. There is.

At the same time, the CPU-P on the printer side reads the IBdata register based on the PIB / IO information shown in FIG. 7, so that the received data fetched by the IB data read control unit from the start address can be read. The end address is read in sequence, and when the end address is passed, the read address is returned to the start address and the same read operation is performed. The CPU-P converts the read received data into print data and writes it in the print buffer area. To do.

IBpoint2 at this time indicates the address of the received data already read by the IB data read control unit, and the read operation is performed until the value of IBpoint1 is exceeded.

Data of the status register (IBstatus) indicates whether the read data is valid.
It is a Valid flag, and when this flag is "1", I
It indicates that Bdata is invalid and there is no remaining received data, and IBstatus is word-accessed to I.
By reading the data at the same time as Bdata, the Valid flag can be confirmed at the same time as the data reading.

IBblank is PIO / shown in FIG.
It is one of the IO registers, and is a register indicating the number of empty bytes in which the received data is not taken in the receiving buffer area set by IBstart and IBend.

That is, IBpointl to IBpo
Since the received data is stored in the area of int2, the value of IBblank is obtained by subtracting the area where the received data is stored from the set receiving buffer area.

FIG. 10 is a structural diagram showing a block for generating an IB access address and a block for calculating a value of an IB blank register. An IBWR counter for generating an IBWR address for writing received data in the IB,
IB for reading the data written in the IB
It is composed of an IBRD counter for generating an RD address, a comparator for comparing the IBWR address and the IBRD address to determine whether or not the received data still remains, and an IBBNK counter for calculating an area in which the received data is not captured.

The IBWR address is UP-counted by the DataStrobe signal of the IFcontrol register, the IBRD address is UP-counted by the read access of IBdata, and the IBWR address and the IBWR address are read.
The RD address is accessed by the RAM access control unit in the RAM-P by priority.

The output from the comparator is IBstat.
The DataValed flag in the us register becomes "1" only when the value of IBpoint2 exceeds the value of IBpointl. It is prohibited to read the IBdata and the read data is invalid.
-Inform P.

The IBBNK counts up by the DataStrobe signal, performs DOWN count by the IBdataRD signal, and sets the value obtained by subtracting the address of IBstart from the value of IBend when both addresses are equal, thereby setting the remaining IB area. It is a counter that counts the number of empty bytes by addition and subtraction.

Since the value of IBBNK is output to the IBblank register as it is, the host side can determine the data transfer amount by looking at the value of IBblank and transfer the print data at once in block units.

FIG. 11 is a perspective view for explaining the internal structure of the printer unit (FIG. 2) using the ink jet recording system. In FIG. 11, reference numeral 5001 is an ink tank, and 5012 is a recording head coupled thereto. The ink tank 5001 and the recording head 5012 form an integral replaceable cartridge. Reference numeral 5014 is a carriage for attaching the cartridge to the printer main body, and reference numeral 5003 is a guide for scanning the carriage in the sub-scanning direction.

Reference numeral 5000 denotes a platen roller for scanning the recording paper 3 in the main scanning direction. Reference numeral 5024 is a paper feed motor for rotating the platen roller. The carriage 5014 is provided with a flexible cable (not shown) for supplying a signal pulse current for driving and a current for head temperature control to the recording head 5012, and a print circuit provided with an electric circuit for controlling the printer. It is connected to a plate (not shown).

Further, the printer unit 2 having the above structure will be described in detail. The carriage 5014 that engages with the spiral groove 5004 of the lead screw 5005 that rotates via the driving force transmission gears 5011 and 5009 in conjunction with the forward / reverse rotation of the drive motor 5013 has a pin (not shown),
It is reciprocated in the directions of arrows a and b. Reference numeral 5002 denotes a paper pressing plate which holds the paper in the platen 5 in the carriage movement direction.
Press against 000. Reference numerals 5007 and 5008 denote home position detecting means for confirming the existence of the lever 5006 of the carriage 5014 in this area by a photocoupler and switching the rotation direction of the motor 5013. 501
6 is a cap member 50 for capping the front surface of the recording head.
Reference numeral 5015 is a member for supporting the inside of the cap, and 5015 is a suction means for sucking the inside of the cap.

5017 is a cleaning blade.
Reference numeral 019 denotes a member that allows the blade 5017 to move in the front-rear direction, and these members are supported by the main body support plate 5018. Needless to say, a well-known cleaning blade can be applied to this example instead of this form. Reference numeral 5021 is a lever for starting suction for suction recovery, and a cam 502 that engages with the carriage 5014.
It moves along with the movement of 0, and the driving force from the driving motor is movement-controlled by a known transmission means such as clutch switching.

That is, the drive motor 5013 is connected to the carriage 5
By rotating backward from the home position of 014,
The power transmission gear 5011 is switched to 5010 (not shown), and the driving force from the driving motor 5013 is applied to the cam 5020.
Is transmitted to the lever 5021 via the recording head 5012.
Capping, cleaning, and suction recovery can be performed.

FIG. 12 is a diagram showing details of the read / write memory represented by the RAM-P shown in FIG. 3 and including a buffer, a flag and the like. In the figure, a reception buffer is a buffer for receiving print commands and print data transferred from the main body to the printer, and holds data input to the input port of the printer. This is explained in FIG.
The print data area is a data area including flags and registers necessary for printing, and printing is performed using the value held in this area, for example, margin information.

FIG. 13 shows the detailed contents in the print data area shown in FIG. It includes a data fetching flag indicating that data is being fetched, a busy flag indicating a busy setting status other than the reception buffer full state, and a page flag indicating the end of a page. Also, registers such as the feed amount that holds the paper feed amount, the save buffer start address that points to the start address of the save buffer, the save buffer end address that points to the end address of the save buffer, and the save buffer pointer that points to the current address of the save buffer. Including.

The present embodiment will be described in detail below with reference to the flow chart.

FIG. 14 is a flow chart showing details of the printing process, and the printing process will be described. First, initialization is performed in step S1. For initialization, the data area required for printing is initialized, and as one of them, the save pointer shown in FIG. 20 is also initialized. Next, step S
Proceed to step 2 and check if there is received data.
Whether or not there is received data is checked by Data V of IB status of PIB / IO register shown in FIG.
It can be determined by the bit of "alid". When this bit is on, it means that there is no received data, and when it is off, it means that there is received data. As will be described later, when the reception buffer is full, the reception data is stored in the storage buffer from the oldest data. When the data is stored in the storage buffer, the data always exists in the reception buffer, and it is determined that the reception data exists. If there is received data, the process proceeds to step S3 and command analysis processing is performed. In the command analysis process, the received data is analyzed to determine whether it is a control code or a character code, and print data is created and printed according to each process. Details will be described with reference to FIG. Then, the process proceeds to step S4. If there is no received data, the process proceeds to step S4 and the command analysis process is skipped. A step S4 sets or cancels various statuses in status control processing. The status includes, for example, a status generated by a printer error state or a transition of a printer switch, and the IF status shown in FIG.
And so on according to these state changes. It also controls the I / O port indicating the status of the printer, LED, panel display, and the like. Next, the process proceeds to step S5 and feed processing is performed. The feed processing includes feeding and discharging paper. Details will be described with reference to FIG. Next, returning to step S2, the same processing is repeated. By this series of processing, it is possible to receive data from the host, process commands, and expand characters to perform printing operation.

FIG. 15 is a flow chart for explaining step S3 in FIG. 14 in detail, and shows a command analysis process. First, a data acquisition process is performed in step S10.
Data acquisition processing is performed by the data stored in the reception buffer,
Alternatively, a process of extracting the data stored in the storage buffer is performed. The data is fetched in 1-byte units. The data to be extracted is automatically determined by the data acquisition process, and the command analysis process does not need to detect the location of the data. Figure 1 shows the data acquisition process.
This will be described in detail in Section 7. Next, in step S11, it is checked whether or not the data taken out in step S10 is a control code. The control code is a code for controlling the printer, and means a generally known extended command including a carriage return or line feed and an extension (ESC). If it is a control code, the process proceeds to step S12, processing corresponding to various control codes is performed,
Will be the return. If it is not a control code, the process proceeds to step S13, and it is checked whether the data taken out in step S10 is a character code. The character code is a code that represents a character and corresponds to alphanumeric characters and kanji characters. If it is a character code, the process proceeds to step S14, the character code is processed, and the process returns. In the character code processing, character data corresponding to each character is expanded into printable data.

By a series of these processes, a command analysis process for expanding the data from the host into a command or character data and performing a printing operation can be performed.

FIG. 16 is a diagram showing details of the paper feed process, which corresponds to step S5 of FIG. First, in step S20, it is determined whether the feed amount is set. If not set, it returns. If the feed amount is set, the process proceeds to step S21,
It is determined whether the total feed amount exceeds the feed amount of the entire page. The feed amount is added as a total amount each time the feed is performed. If the total feed amount exceeds the feed amount of the entire page, step S2
Go to 2 and set the page flag. Next, the process proceeds to step S23, the paper discharge process is performed, and the process returns. If the total feed amount does not exceed the feed amount of the entire page in step S21, the process proceeds to step S24 to feed the paper and return.

By the above processing, the paper feed processing and the page flag setting can be executed.

FIG. 17 is a flow chart showing details of the data acquisition process, which corresponds to step S10 of FIG. First, in step S30, it is determined whether there is stored data. The save data is the receive data stored in the save buffer of FIG. 12, and is saved by the receive buffer control process of the timer interrupt process described in FIG. The storage will be described in detail with reference to FIG. Saved data is managed by the save buffer pointer shown in FIG. 13, and the data to be saved next is set at the position of the save buffer indicated by the save buffer pointer. Saving in the save buffer starts from the save buffer start address shown in FIG. 13 and can be done up to the save buffer end address. That is, the received data is saved from the save buffer start address to the save buffer pointer,
The data pointed to by the save buffer start address is the oldest data. The determination as to whether or not there is save data is performed by comparing the save buffer start address with the save buffer pointer. If the save buffer pointer is the same as the save buffer start address, there is no save data. As the initialization processing, the save buffer pointer is made the same as the save buffer start address, and there is no save data in the initial state.
If there is no saved data in step S30, step S30
In step 31, the received data is read. This is,
With the conventional processing, data is read from the reception buffer. The reception data can be read by the PIB / shown in FIG.
This is done by reading IBData of IO. Then return. If there is stored data in step S30, the process proceeds to step S32, and the data acquisition flag is set. The data fetching flag is a flag for prohibiting the setting of the saved data during the execution of the data acquisition process. While the flag is set, the received data is not saved in the save buffer. This is
Described in. Next, in step S33, the stored data is extracted. Since the stored data is retrieved in order from the oldest data, the data at the position indicated by the storage buffer start address of the storage buffer is retrieved. Next, in step S34, the save pointer is updated. Since one data has been retrieved from the save buffer,
The data from the save buffer start address + 1 to the save buffer pointer is moved to the save buffer start address and the save buffer pointer is moved back by one. Next, the process proceeds to step S35, and the data acquisition flag set in step S32 is reset. Then come back.

By the above processing, the data acquisition processing is executed and either the data reading from the reception buffer or the data extraction from the storage buffer is automatically performed, and the data from the host necessary for printing can be acquired. I can.

FIG. 18 is a flow chart showing the timer interrupt process. The Timer3-P of FIG. 4 notifies the CPU-P at a constant time interval, and the CP is used as the interrupt process.
It is executed in UP. First, in step S40, the reception buffer control process is performed and the process returns. The reception buffer control process will be described in detail with reference to FIG.

FIG. 19 is a flowchart showing the receiving buffer control processing, which corresponds to step S40 in FIG.
First, in step S50, it is checked whether or not data is being taken. This check is performed depending on whether or not the data fetching flag is set. If it is set, the process returns and nothing is done. This is because the reception buffer control process may be executed even during the data acquisition process shown in FIG. 17, so that the data storage process is not performed during the data acquisition process. This is because the timer interrupt process is executed, and therefore, if the save process is performed during data acquisition, the position of the save pointer may be misaligned. If the data is not being fetched, the process proceeds to step S51, and the reception buffer remaining byte number acquisition process is performed. To obtain the number of remaining bytes in the receive buffer, use PIO / I
This is performed by reading the register indicated by O IBblank, and the read content becomes the number of bytes remaining in the reception buffer. Next, in step S52, it is checked whether or not the number of remaining bytes read in step S51 is zero. If the number of remaining bytes is 0, it indicates that the receive buffer is full. If the number of remaining bytes is not 0, there is no need to save in the save buffer, and the process returns. If the number of remaining bytes is 0, the process proceeds to step S53 to check whether the save buffer is full. The determination as to whether the save buffer is full is made by comparing the save buffer end address with the save buffer pointer. If the save buffer pointer is the same as the save buffer end address, the save buffer is full. If the save buffer is full, no more saves can be done and the process returns. If the save buffer is not full, go to step S54,
Read the received data. This is similar to step S31 of FIG. Next, in step S55,
The data read in step S54 is saved in the save buffer. The save position is the position indicated by the save buffer pointer, and the latest data is in the save buffer. Then, the process proceeds to step S56, the save buffer pointer is advanced by one, and the process returns.

By the above processing, the data state of the receiving buffer can be confirmed at regular intervals, and if the receiving buffer is full, the data in the receiving buffer can be saved in the saving buffer.

FIG. 20 is a flow chart showing the initialization processing of the save pointer, which corresponds to one of the initializations in step S1 of FIG. In step S60, the save pointer is initialized. In FIG. 13, the save buffer start address is set to the start of the save buffer, the save buffer end address is set to the end of the save buffer, and the save buffer pointer is set to the same save buffer start address as the save buffer start address.

By the above processing, the save pointer can be initialized.

FIG. 21 is a flow chart showing a busy control process, showing a process for handling a busy signal for notifying the host of the state of the reception buffer. The busy signal is represented by Busy of IFstatus of PIO / IO in FIG. 5, and if this bit is on, it is not busy, and if it is off, it is busy. Busy is also called busy if the printer is in error or offline. By seeing this busy signal, the host can determine whether the printer is ready to receive data. The busy control process is called every time a read or write operation is performed on the reception buffer to control busy.

First, in step S70, it is checked whether the reception buffer is full. This process is performed in the same manner as steps S51 and S52 in FIG. If the reception buffer is full, the flow advances to step S71 to set busy. The busy set is the PIO / IO IFs of FIG.
This is done by turning off the Busy of the status.
If the receive buffer is not full, the process proceeds to step S72, and it is checked whether the busy flag is set. The busy flag is set under conditions other than the receive buffer full condition. If the busy flag is on, it returns. If the busy flag is not on, the process proceeds to step S73 and the busy is reset. Busy is reset by turning on Busy of IFstatus of PIO / IO in FIG. Then come back.

By the above processing, the busy signal can be controlled according to the data state of the reception buffer.

As described above, it is possible to periodically monitor the full state of the receiving buffer and store it in the save buffer if it is full. Also, it is possible to set or cancel busy depending on the state of the receiving buffer. Becomes Also, when the received data is taken out, it is possible to take out the data by either the receive buffer or the save buffer.

(Embodiment 2) In this embodiment, the circuit shown by the IF data fetching control section in FIG. 4 is used to receive data from the host and set the data in the receiving buffer. It is also possible to omit those and make those processing soft processing. In addition, FIG.
The remaining byte calculation circuit indicated by can also be processed by software. In this case, the required circuits can be reduced.

(Embodiment 3) In this embodiment, FIG.
Although the busy control process shown by is configured as a soft process, it is also possible to use a circuit. Also, FIG.
Although the control processing of the reception buffer shown by 8 and 19 is also configured as a soft processing, it is also possible to use a circuit. In this case, it is possible to perform processing at a higher speed than software processing.

Example 4 In this example, FIG.
Although the reception buffer control process shown in 8 and 19 is configured as the timer interrupt process, it may be performed within the repeating process of the print process of FIG. 14 (steps S2 to S5). In this case, the timer interrupt function can be omitted.

[0064]

As described above, since the print buffer sent from the host fills the printer's receive buffer, the busy signal notified to the host can be shortened as much as possible. This is effective in preventing host errors and data loss caused by long printer busy.

[Brief description of drawings]

FIG. 1 is a perspective view showing a personal computer embodying the present invention.

FIG. 2 is a schematic block diagram between a host and a printer.

FIG. 3 is a block diagram of a printer 1F section.

FIG. 4 is a block diagram of an inside of a combined control unit.

FIG. 5: PIO / IO register configuration diagram

FIG. 6 is a PIF / IO register configuration diagram.

FIG. 7 PIB / IO register configuration diagram

FIG. 8 PBJ / IO register configuration diagram

FIG. 9 is a diagram showing details of RAM in the printer.

FIG. 10 is a configuration diagram of an IB access address and IB blank calculation circuit.

FIG. 11 is a perspective view of a printer internal unit.

FIG. 12 is a diagram showing details of RAM in the printer.

FIG. 13 is a diagram showing details of a print data area.

FIG. 14 is a flowchart showing details of print processing.

FIG. 15 is a flowchart showing details of command analysis processing.

FIG. 16 is a flowchart showing details of paper feed processing.

FIG. 17 is a flowchart showing details of data acquisition processing.

FIG. 18 is a flowchart showing details of timer interrupt processing.

FIG. 19 is a flowchart showing details of a reception buffer control process.

FIG. 20 is a flowchart showing details of save pointer initialization processing.

FIG. 21 is a flowchart showing details of busy control processing.

Claims (2)

[Claims] 1. A received data holding amount detecting means for detecting a data holding amount of a receiving buffer, a received data storing means for taking out data from the receiving buffer and storing the data in a saving buffer, and a receiving buffer by the data holding amount detecting means. Is detected, the received data saving means saves the received data from the receive buffer in the save buffer. 2. The printer control method according to claim 1, wherein the received data storage means reduces the amount of data held in the reception buffer to control the busy signal of the printer according to the busy signal control means. .