JPH06252734A - Reference voltage generating circuit - Google Patents

Abstract

PURPOSE:To provide a reference voltage generating circuit able to generate a logic threshold level used to compensate an accuracy error due to manufacture dispersion in an LSI. CONSTITUTION:The generating circuit includes a characteristic output circuit 4 outputting a predetermined current in response to an output current characteristic of a transmission circuit 2 and a voltage generating circuit 5 receiving a current from the characteristic output circuit 4 and controlling a reference voltage to decide a logic threshold level of a reception circuit in response to a current. Or the generating circuit includes a characteristic output circuit 4 as a drive current source of a current changeover circuit of the transmission circuit 2 and a voltage generating circuit 5 formed by replacing only a resistance of a receiver of a current voltage conversion circuit of a reception circuit 3 with a required resistance, and an output of the characteristic output circuit 4 is inputted to the voltage generating circuit 5 and an output of the voltage generating circuit 5 is used for an output of a reference voltage generating circuit 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reference voltage generating circuit, and more particularly to a reference voltage generating circuit for determining a logical threshold value in a receiving circuit of a signal transmitting circuit for transmitting and receiving signals on a printed board or a hybrid IC board. .

[0002]

2. Description of the Related Art Conventionally, as a method of transmitting and receiving a digital signal between ICs on a printed circuit board or ICs on a hybrid circuit board, TTL (transistor-transistor logic) or EC is used.
There are circuits that operate in a voltage mode, such as an L (emitter coupled logic) interface, and circuits that operate in a current mode that transmits / receives depending on the presence / absence of a current or the magnitude.

To send and receive high speed digital signals, EC
It is known that the L interface is excellent, but its operating current is large and it is not suitable for low power consumption.

On the other hand, as a circuit which operates in the current mode, for example, there is a cascode connection type circuit as described in "Analog Integrated Circuit" (Modern Science Co., Ltd., issued February 1979, p.257). . In this circuit, the grounded-type transistor inserted in the path through which the current signal flows keeps the potential of the wiring connecting the transmitter and receiver at a potential lower than the voltage applied to the base by the voltage VBE between the base and the emitter, so that the potential is kept substantially constant. The charge / discharge current of the wiring capacity can be considerably suppressed. Therefore, it is possible to operate at high speed without increasing the current so much.

FIG. 7 shows a configuration example of a conventional reference voltage generating circuit. The configuration shown in the figure has a high-potential-side power supply terminal VCC, a low-potential-side power supply terminal VEE, a load resistance RC, and current sources I1 and I.
2, a reference voltage output terminal VR, and a transistor Q. In this circuit, the reference voltage is determined by the value of the current flowing through the current sources I1 and I2 and the value of the load resistance RC.
When the forward bias voltage between the base and the emitter of the transistor Q is V _BE , the potential VR of the output terminal is VR = VCC− (RC × I2) −V _BE .

[0006]

However, in the above-mentioned conventional cascode connection type circuit, since the transmission circuit and the reception circuit are generally composed of different ICs, the current value and the resistance value are random due to manufacturing variations. In some cases, the output amplitude of the receiving circuit also changes randomly depending on the combination of ICs.

Therefore, in order to obtain the required output even in the worst combination, it is necessary to set the current value and the resistance value as design values to a large value. Further, when the output amplitude increases and the output amplitude fluctuates to a large extent, there is a problem that the transistor is saturated and high-speed operation cannot be performed.

Further, the logical threshold value in the receiving circuit is set to IC.
If the reference voltage generation circuit incorporated inside determines the voltage, there is also a problem that the reference voltage fluctuates due to manufacturing variations. If the reference voltage that determines the logic threshold deviates from the design value, the duty ratio of the clock signal may change and the gate delay time may increase even if the output potential of the receiver circuit is as designed. Come on. As described above, when the conventional reference voltage generating circuit is used, the accuracy of the resistance value of an ordinary LSI is about 10%, and the threshold value fluctuations of the same degree cannot be avoided.

The present invention has been made in view of the above points,
An object of the present invention is to provide a reference voltage generation circuit that solves the above-mentioned conventional problems and can generate a logical threshold value that compensates for an accuracy error due to a manufacturing variation of an LSI.

[0010]

FIG. 1 is a block diagram showing the configuration of a reference voltage circuit according to the present invention.

According to the present invention, a transmission circuit 2 for converting a given digital signal into a current signal to be transmitted according to the presence or absence of a current or the magnitude of the current and transmitting the current signal, and inputting the current signal, converting it to an original digital signal and outputting it. In the reference voltage generation circuit 1 that determines the logical threshold value of the signal transmission circuit including the reception circuit 3, the characteristic output circuit 4 that outputs a predetermined current value according to the output current characteristic of the transmission circuit 2, and the characteristic output circuit 4 A voltage generating circuit 5 for controlling a reference voltage for inputting a current value from the input terminal and determining a logical threshold value of the receiving circuit according to the current value.

Further, according to the present invention, a transmitter circuit 2 having a collector of an emitter-coupled logic circuit type current switching circuit as an output.
And a reference voltage generation circuit 1 for determining a logical threshold value of a signal transmission circuit including a reception circuit including a current-voltage conversion circuit including a resistance or a grounded side current-voltage conversion circuit.
In the above, in the characteristic output circuit 4 having a configuration in which the drive current source of the current switching circuit of the transmission circuit 2 is directly connected to the output terminal, and in the configuration in which only the resistance value of the current-voltage conversion circuit of the reception circuit 3 is changed to a required value A generation circuit 5 and a characteristic output circuit 4
Is output to the voltage generating circuit 5, and the output of the voltage generating circuit 5 is used as the output of the reference voltage generating circuit 1.

Further, the present invention is a receiver circuit having a current-voltage conversion circuit composed of a transmission circuit 2 having a drain of a source-coupled FET logic circuit type current switching circuit as an output and a resistor or a grounded gate type current-voltage conversion circuit. In the reference voltage generation circuit 1 for determining the logical threshold value of the signal transmission circuit composed of 3, a characteristic output circuit 4 having a configuration in which the drive current source of the current switching circuit of the transmission circuit 2 is directly connected to the output terminal,
Further, a voltage generating circuit 5 having a configuration in which only the resistance value of the current-voltage converting circuit of the receiving circuit 3 is changed to a required value is provided, and the output of the characteristic output circuit 4 is input to the voltage generating circuit 5 so that the voltage generating circuit 5 outputs The output is the output of the reference voltage generating circuit 1.

[0014]

The present invention provides a voltage generating circuit for controlling a reference voltage which receives a current value from a characteristic output circuit which outputs electric characteristics of a transmitting circuit as a current value and which determines a logical threshold of a receiving circuit according to the current value. By providing the logic threshold value, it is possible to generate a logical threshold value that compensates for an accuracy error due to manufacturing variations of the LSI.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a reference voltage circuit according to an embodiment of the present invention. The reference voltage circuit shown in the figure includes a characteristic output circuit 4, a voltage generation circuit 5, and a characteristic output circuit 4.
Current output terminal 14, current input terminal 1 of voltage generation circuit 5
5, wiring 6 for connecting the characteristic output circuit 4 and the voltage generation circuit 5
A reference voltage generating circuit 1, a transmitting circuit 2, an input terminal for a digital signal to be input to the transmitting circuit 2,
A current signal output terminal 8 of the transmitter circuit 2, a receiver circuit 3, a current signal input terminal 9 of the receiver circuit 3, a digital signal output terminal 10 of the receiver circuit 3, a logical threshold value input terminal 11 of the receiver circuit 3,
It is composed of a voltage output terminal 13 of the reference voltage generating circuit 1, a logic threshold input terminal 11 of the receiving circuit 3, and a wiring 16 connecting the voltage output terminal 13 of the reference voltage generating circuit 1.

The transmitting circuit 2, the receiving circuit 3 and the wiring 1 of FIG.
2, 16 and input / output terminals 7, 8, 9, 1 of the transmission / reception circuit
0 and 11 are provided in the required number according to the digital signal to be transmitted.

The operation of the above reference voltage circuit will be described below.

The characteristic output circuit 4 outputs a certain constant current according to the current signal output having the electric characteristic of the transmission circuit 2. The voltage generation circuit 5 converts the current input from the characteristic output circuit 4 into a voltage value and generates the logical threshold voltage of the reception circuit 3.

If the characteristic output circuit 4 is placed inside the LSI on the transmitting circuit 2 side and the voltage generating circuit 5 is placed inside the LSI on the receiving circuit 3 side and the following design is made, the digital signal due to manufacturing variations will be generated. Deviation from the design value can be compensated by automatic adjustment of the logical threshold.

1. When the current signal output from the transmission circuit 2 changes due to manufacturing variations, the current output from the characteristic output circuit 4 also changes.

2. The voltage-generating circuit 5 and the current-voltage converting unit (not shown, which will be described in detail from FIG. 2) of the receiving circuit 3 have the same configuration.

3. The receiver circuit 3 should be provided with a differential amplifier circuit (not shown, which will be described later in detail in FIG. 2) using the output voltage from the reference voltage generator circuit 1 as a reference.

A specific circuit example of the embodiment of the present invention will be shown below. FIG. 2 shows a concrete circuit diagram of the first embodiment of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

The transmitting circuit 2 is composed of an ECL current switch consisting of a current source I2 and a differential pair of transistors Q21 and Q22, and the receiving circuit 3 is composed of a transistor Q3 and a resistor RC3 in front of an emitter follower consisting of a pull-down resistor REF3. In the transmitting and receiving circuit that is
The characteristic output circuit 4 of the reference voltage generation circuit 1 is composed of a current source I4, and the voltage generation circuit 5 is structured such that a resistor RC5 is provided in front of an emitter follower composed of a transistor Q5 and a pull-down resistor REF5.

When the input signal D of the transmission circuit 2 is at the HIGH level, the current of the current source I2 flows to the transistor Q21 side and hardly flows to the transistor Q22 side. On the other hand, when the input signal D is at the LOW level, on the contrary, the current of the current source I2 almost flows to the Q22 side and hardly flows to the Q21 side. Therefore, the current flowing through the resistor RC3 of the receiving circuit is almost zero when the input signal D is at the HIGH level, and the input signal D is at the L level.
At the OW level, the current value is substantially the same as the current value of the current source I2. Therefore, the base potential V _BBQ3 of the transistor Q3 of the receiving circuit 3 is high when the input signal D of the transmitting circuit is HIGH.
Level: V _{BBQ3 (High)} = VCC (1) When the input signal D is LOW level: V _{BBQ3 (Low)} = VCC- (RC3 × I2) (2), and the emitter follower output V _EEQ3 of the transmitter circuit 2 becomes When the forward bias voltage between the base and emitter of the transistor Q3 is V _BEQ3 , the input signal D of the transmission circuit 2 becomes HIGH.
When the level is: V _{EEQ3 (High)} = VCC-V _BEQ3 (3) When the input signal D is at the LOW level: V _{EEQ3 (Low)} = VCC- (RC3 × I2) -V _BEQ3 (4)

Further, if the current source I4 of the characteristic output circuit 4 has the same configuration as the current source I2 of the transmission circuit 2 and the pull-down resistance REF5 of the voltage generation circuit 5 is set to half the value of the resistance RC3 of the reception circuit 3, the voltage generation will occur. Since the potential V _BBQ5 of the base of the transistor Q5 of the circuit 5 becomes V _BBQ5 = VCC- (RC5 × I4) = VCC- (RC / 2 × I2) (5), the base emitter of the transistor Q5 of the voltage generating circuit 5 When the forward bias voltage V _BEQ5 is set, the output potential VR of the reference voltage generating circuit 1 becomes VR = V _BBQ5 −V _BEQ5 = VCC− (RC3 / 2 × I2) −V _BEQ5 (6). Here, since the transistor Q3 of the receiving circuit 3 and the voltage generating circuit Q5 can have the same value, the output potential VR is HIGH of the emitter follower output of the receiving circuit 2.
Since it is a value approximately in the middle between the level and the LOW level, this can be used as a logical threshold value.

When the current value of the current source I2 of the transmitter circuit 2 fluctuates due to manufacturing variations, the transistor Q of the receiver circuit 3 is changed.
The electric potential of the base of 3 deviates from the design value. Further, since the current source I4 of the characteristic output circuit 4 is the same as the current source I2 of the transmission circuit 2, the base potential of the transistor Q5 of the voltage generation circuit 5 deviates from the designed value like the reception circuit 3. If the current value of the current source I2 of the transmission circuit 2 is deviated by ΔI, the potential V of the base of the transistor Q3 of the reception circuit 3 is changed.
_BBQ3 is when the input signal D of the transmission circuit 2 is HIGH level: V _{BBQ3 (High)} = VCC (7) When the input signal D is LOW level: V _{BBQ3 (Low)} = VCC- (RC3 × (I2 + ΔI)) (8) and the potential V _EEQ3 of the emitter follower output of the receiving circuit 3 at this time is V _{EEQ3 (High)} = VCC-V _BEQ3 (9) when the input signal D of the transmitting circuit 2 is HIGH level. At the LOW level, V _EEQ3 = VCC- (RC3 × (I2 + ΔI))-V _BEQ3 (10). On the other hand, the base potential V _BBQ5 of the transistor Q5 of the voltage generating circuit 5 is V _BBQ3 = VCC− (RC5 × (I2 + ΔI)) = VCC− (RC3 / 2 × (I2 + ΔI)) (11), The output VR is VR = VCC- (RC5 × (I2 + ΔI))-V _BEQ5 = VCC- (RC3 / 2 · (I2 + ΔI) -V _BEQ5 ) (12). Therefore, the output potential VR of the reference voltage generating circuit 5 is always a value approximately in the middle between the HIGH level and the LOW level of the emitter follower output of the receiving circuit 3 regardless of the magnitude of the shifted current value ΔI of the current source I2, and the transmission is performed. It can be seen that manufacturing variations on the circuit 2 side can be compensated.

Further, considering manufacturing variations on the receiving circuit 3 side, the resistors RC3 and RC of the receiving circuit 3 are considered.
5 changes the output VR of the receiving circuit 3 and the voltage generating circuit 5
It is clear from the above equation that V is varied. However, if the resistance ratio “RC3 / RC5 = 2” does not change,
It is also apparent from the above equation that the output potential VR of the reference voltage generating circuit 5 is always at the value approximately in the middle between the HIGH level and the LOW level of the emitter follower output of the receiving circuit 3. Although it is difficult to improve the accuracy of the absolute value of the resistance, it is relatively easy to improve the accuracy of the resistance ratio in manufacturing, so the accuracy of the resistance value can be secured even if the absolute value of the resistance fluctuates due to manufacturing variations. By designing the LSI in this way, manufacturing variations on the receiving circuit 3 side can be compensated.

FIG. 3 shows a concrete circuit diagram of the second embodiment of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

The transmitting circuit 2 is composed of an ECL current switch composed of a current source I2 and a differential pair of transistors Q21 and Q22, and the receiving circuit 2 is provided in front of an emitter follower composed of a transistor Q31 and a pull-down resistor REF3.
In a transmission / reception circuit having a circuit including a transistor Q32 and a resistor RC3, the characteristic output circuit 4 of the reference voltage generating circuit 1 is constituted by a current source I4, and the voltage generating circuit 5 is constituted by a transistor Q51 and a resistor REF5. Transistor Q52 and resistor R in front of the emitter follower
It has a configuration in which a circuit including C5 is provided.

Transistor Q32 and resistor R of the receiving circuit 3
C3 forms a cascade connection with the transistor Q22 of the transmission circuit 2 via a wiring and grounded base, and the voltage generation circuit 5
The transistor Q52 and the resistor RC5 form a cascade connection with the current source I4 of the characteristic output circuit 4 via the wiring and the grounding of the base, but the current flowing through the resistors RC3 and RC5 is the same as in the example of FIG.

Therefore, the outputs of the receiving circuit 3 and the voltage generating circuit 5 are exactly the same as those in the example of FIG. 2, and even if the current value or the resistance value fluctuates due to manufacturing variations, a logical threshold VR is generated. I know what I can do.

FIG. 4 shows a concrete circuit diagram of the third embodiment of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

The transmitter circuit 2 is composed of a current source I2, an ECL current switch composed of differential pair transistors Q21 and Q22, and a resistor RC2, and the receiver circuit 3 is composed of a transistor Q2.
In the transmitter / receiver circuit in which the resistor RC3 is provided in front of the emitter follower including the resistor REF3, the characteristic output circuit 4 of the reference voltage generation circuit 1 is the current source I
4 and a resistor RC4, the voltage generation circuit 5 has a configuration in which resistors RC51 and RC52 are provided in front of an emitter follower including a transistor Q5 and a resistor REF5.

The current flowing through the resistor RC3 of the receiving circuit 3 is
When the input signal D is HIGH level, it is almost zero, and when the input signal D is LOW level, if the potential of the high potential side power supply terminal VCC of the transmission / reception circuit is the same,

[Equation 1] Becomes Therefore, the potential V _BBQ3 of the base of the transistor Q3 of the receiving circuit 3 is high when the input signal D of the transmitting circuit 2 is HIGH.
At level V _{BBQ3 (High)} = VCC (14) When input signal D is at LOW level

[Equation 2] Next, the emitter follower output V _EEQ3 of the transmission circuit 2 is the base emitter forward bias voltage of the transistors Q3 and V _BEQ3, input signal D of the transmission circuit 2 is HIGH
At the time of level: V _{EEQ3 (High)} = When VCC-V _BEQ3 input signal D is at the LOW level

[Equation 3] Becomes

Further, the current source I4 of the characteristic output circuit 4 has the same configuration as the current source I2 of the transmission circuit 2, the resistance RC4 of the characteristic output circuit 4 has the same value as the resistance RC2 of the transmission circuit 2, and the voltage generation circuit When the resistances RC51 and RC52 of 5 are set to half the value of the resistance RC3 of the receiving circuit 3, the potential V _BBQ5 of the base of the transistor Q5 becomes

[Equation 4] Therefore, _assuming that the base-emitter forward bias voltage of the transistor Q5 of the voltage generation circuit 5 is V _BBQ5 , the output potential VR of the reference voltage generation circuit 1 is

[Equation 5] Becomes Here, since the potentials V _BEQ3 and V _BEQ5 can be made to have substantially the same value by making the transistor Q3 of the receiving circuit 3 and the transistor Q5 of the voltage generating circuit 5 have the same characteristics, the output potential VR is the same as that of the receiving circuit. Since it is a value approximately in the middle between the HIGH level and the LOW level of the emitter follower output of No. 3, it can be used as a logical threshold value.

Further, from the above equation, it is clear that even if the current value of the current source I2 of the transmission circuit 2 fluctuates due to manufacturing variations, it is possible to generate the logical threshold value VR to compensate for it.

Regarding the variation in the resistance value, first, the variation in the resistance on the transmission circuit 2 side will be examined.

[Equation 6] Therefore, the resistance ratio

[Equation 7] It can be seen that the output potential VR of the voltage generation circuit 5 is always at a value approximately in the middle between the HIGH level and the LOW level of the emitter follower output of the reception circuit 3 if the load resistances RC2 and RC4 are not changed.

On the other hand, considering variations in the resistance value on the receiving circuit side, according to the above equation,

[Equation 8] Therefore, the resistance ratio

[Equation 9] Does not change, load resistances RC3, RC51 and RC
Even if 52 fluctuates, the output potential VR of the voltage generating circuit 5 remains LOW and HIGH level of the emitter follower output of the receiving circuit.
It can be seen that the value is approximately in the middle of the level.

As described above, even in the configuration example of FIG. 4, it is possible to generate the logical threshold value VR that compensates for variations in current value and resistance value due to manufacturing variations.

FIG. 5 is a concrete circuit diagram of the fourth embodiment of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

The transmitter circuit 2 is composed of a current source I2, an ECL current switch composed of differential pair transistors Q21 and Q22, and a resistor RC2, and the receiver circuit 3 is composed of a transistor Q2.
In a transmission / reception circuit having a configuration in which a circuit including a transistor Q32 and a resistor RC3 is provided in front of an emitter follower including a resistor 31 and a resistor REF3, the characteristic output circuit 4 of the reference voltage generating circuit 1 includes a current source I4 and a resistor RC4. The voltage generating circuit 5 is configured such that a circuit including a transistor Q52 and a resistor RC5 is provided in the preceding stage of an emitter follower including a transistor Q51 and a resistor REF5.

Transistor Q32 and resistor R of the receiving circuit 3
C3 forms a cascade connection with the transistor Q22 of the transmission circuit 2 via a wiring and grounded base, and the voltage generation circuit 5
Of the transistor Q52 and the resistor RC5 of the characteristic output circuit 4
The base connection is made in cascade connection with the current source I4 and the wiring. VBB is a reference voltage for cascade connection, and VRC is a load resistance current control power supply that controls the current flowing through the resistors RC2 and RC4.

When VRC ≧ VBB, the current flowing through the resistor RC3 of the receiving circuit 3 is almost zero when the input signal D is HIGH level, and the base-emitter forward bias of the transistor Q32 when the input signal D is LOW level. _Is V _BEQ32 ,

[Equation 10] Becomes Therefore, the potential V of the base of the transistor Q3
_BBQ3 is when the input signal D of the transmission circuit 2 is HIGH level: V _{BBQ31 (High)} = When the VCC input signal D is LOW level:

[Equation 11] And the emitter follower output V of the transmission circuit 2 becomes
_EEQ31 , when the base-emitter forward bias voltage of the transistor Q31 is V _BEQ31 , when the input signal D of the transmission circuit 2 is at a high level: V _{EEQ31 (High)} = VCC-V _{BEQ31 When the} input signal D is at a low level. :

[Equation 12] Becomes

Further, the current source I4 of the characteristic output circuit 4 has the same configuration as the current source I2 of the transmission circuit 2, the resistance RC4 of the characteristic output circuit 4 has the same value as the resistance RC2 of the transmission circuit 2, and the voltage generation circuit. 5 is a resistance RC5 of the receiving circuit 3
When the value is half of C3, the potential V _BBQ51 of the base of the transistor Q51 becomes

[Equation 13] Becomes However, V _BEQ52 is a forward bias voltage between the base and the emitter of the transistor Q52 of the voltage generating circuit 5. Further, _assuming that the forward bias voltage between the base and the emitter of the transistor Q51 is V _BEQ51 , the reference voltage generating circuit 1
The output potential VR of

[Equation 14] Becomes Here, the transistors Q31, Q of the receiving circuit 3
32 and transistors Q51 and Q52 of the voltage generation circuit 5
_Are transistors having the same characteristics, the base potential V _BEQ31 of the transistor Q31 and the transistor Q31
32 of the base potential V _BEQ32, and since the base potential V _BEQ52 transistor Q51 can substantially be the same value, the reference voltage generating circuit 1 of the output potential VR stands for HIGH level and LOW level of the emitter follower output of the receiver circuit Since it is a value in the middle, it can be used as a logical threshold.

Further, from the above equation, it is clear that even if the current value of the current source I2 of the transmission circuit 2 fluctuates due to manufacturing variations, the logical threshold value VR can be generated to compensate for it. Furthermore, regarding the variation in resistance value, the resistance ratio

[Equation 15] It will be understood that if the value does not change, a logical threshold value VR can be generated so as to compensate for the change in the resistance value due to manufacturing variations.

Although four specific circuit examples have been described above, the present invention is not limited to the above-described embodiments, and modifications can be made without departing from the spirit of the present invention.

For example, the following applications are also included.

1. All of the current sources described in the embodiments of the present invention can be replaced with resistors or specific impedances.

2. In the above embodiment, the circuit mainly using the NPN type bipolar transistor has been described, but it is easily understood that the same operation is performed even if the PNP type bipolar transistor is used. Moreover, even if the bipolar transistor is replaced with an FET, the same operation is performed.

Here, when the FET is used, the emitter switching logic circuit type current switching circuit of the transmission circuit 2 is
The same operation can be achieved by replacing the source-coupled FET logic circuit type current switching circuit with the grounded-ground type current-voltage conversion circuit and the emitter follower of the reception circuit and the voltage generation circuit replaced with the grounded-gate type current-voltage conversion circuit and the source follower. It will be possible. For example, if the embodiment of FIG. 3 is replaced with an FET, the structure shown in FIG. 6 is obtained.

FIG. 6 is a circuit diagram when an FET according to another embodiment of the present invention is used. In the figure, parts that are the same as the parts shown in FIG. 3 are given the same reference numerals, and descriptions thereof will be omitted. In the figure, the only difference from FIG. 3 is that all the transistors are replaced by FETs, and the circuit operation is exactly the same as in FIG.

Further, in the above-mentioned embodiment, only the case where the resistance ratio of the receiving circuit and the voltage generating circuit is 2 has been described, but the resistance ratio is not limited to 2 and may be arbitrary according to the purpose. Can have a value.

Other than these, various configurations can be considered based on the concept of the present invention.

[0056]

As described above, the reference voltage generating circuit of the present invention comprises the characteristic output circuit for outputting the electric characteristic of the transmitting circuit as a current value, and further inputs the current value from the characteristic output circuit, Since the voltage generating circuit that controls the reference voltage that determines the logical threshold value of the receiving circuit according to the current value is provided, it is possible to supply the logical threshold value that compensates for manufacturing variations.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a reference voltage circuit of the present invention.

FIG. 2 is a specific circuit diagram of the first embodiment of the present invention.

FIG. 3 is a specific circuit diagram of the second embodiment of the present invention.

FIG. 4 is a specific circuit diagram of the third embodiment of the present invention.

FIG. 5 is a specific circuit diagram of the fourth embodiment of the present invention.

FIG. 6 is a circuit diagram when an FET according to another embodiment of the present invention is used.

FIG. 7 is a configuration diagram of a conventional reference voltage generation circuit.

[Explanation of symbols]

1 Reference voltage generation circuit 2 Transmission circuit 3 Reception circuit 4 Characteristic output circuit 5 Voltage generation circuit 6 Wiring 7 Digital signal input terminal 8 Current signal output terminal 9 Current signal input terminal 10 Digital signal output terminal 11 Logical threshold input terminal 12, 16 Wiring 13 Voltage output terminal 14 Current output terminal 15 Current input terminal Q3, Q5, Q21, Q22, Q31, Q32, Q5
1, Q52, Q transistor RC2, RC3, RC4, RC5, RC51, RC5
2, RC load resistance REF3, REF5, REF pull-down resistance I2, I4, I1 current source AMP differential amplifier circuit VR reference voltage output terminal VBB cascade reference voltage terminal VRC load resistance current control power supply terminal VCC high potential side power supply terminal VEE Low-potential side power supply terminal D, D'signal

Claims (3)

[Claims] 1. A transmission circuit for converting a given digital signal into a current signal to be transmitted according to the presence or absence of a current or its magnitude and transmitting the current signal, and a receiver for receiving the current signal and converting it into an original digital signal for output. In a reference voltage generating circuit that determines a logical threshold value of a signal transmission circuit including a circuit, a characteristic output circuit that outputs a predetermined current value according to the output current characteristic of the transmission circuit, and a current value from the characteristic output circuit A reference voltage generating circuit for controlling a reference voltage which is input and which determines a logical threshold value of the receiving circuit according to the current value. 2. A transmitter circuit having a collector of an emitter-coupled logic circuit type current switching circuit as an output, and a receiver circuit having a current-voltage converter circuit composed of a resistor or a grounded-base current-voltage converter circuit. In a reference voltage generation circuit that determines a logical threshold value of a signal transmission circuit, a characteristic output circuit having a configuration in which a drive current source of a current switching circuit of the transmission circuit is directly connected to an output terminal, and a resistance value of a current-voltage conversion circuit of the reception circuit. And a voltage generating circuit having a configuration in which only the required value is changed to a required value, the output of the characteristic output circuit is input to the voltage generating circuit, and the output of the voltage generating circuit is used as the output of the reference voltage generating circuit. Reference voltage generating circuit. 3. A source-coupled FET logic circuit type current switching circuit comprising a transmission circuit having the drain as an output and a receiving circuit having a current-voltage conversion circuit composed of a resistor or a grounded-gate type current-voltage conversion circuit. In the reference voltage generation circuit that determines the logical threshold of the signal transmission circuit, only the characteristic output circuit in which the drive current source of the current switching circuit of the transmission circuit is directly connected to the output terminal and the resistance value of the current-voltage conversion circuit of the reception circuit And a voltage generation circuit having a configuration in which is changed to a required value, the output of the characteristic output circuit is input to the voltage generation circuit, and the output of the voltage generation circuit is used as the output of the reference voltage generation circuit. Reference voltage generating circuit.