JPH06252237A - Semiconductor wafer test apparatus - Google Patents

Abstract

PURPOSE:To provide a semiconductor wafer test apparatus for automatically confirming, upon a low yield wafer being produced, the fact with use of a wafer already measured by preventing the operation of the apparatus from being interrupted owing to a change in the yield of each wafer in an inspection process of the semiconductor wafer. CONSTITUTION:There is provided in a wafer prober storage device 2a means for storing quality control data of an object to be measured and the test yield of a wafer already measured, and there is further provided in a wafer prober control portion 3a means for comparing the quality control data and the test yield and altering an inspection procedure based on a comparison result. There is additionally provided a wafer transfer system 1a useable for supply of a wafer for re-measurement of the wafer and accommodation of a wafer from the measurement portion.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer tester used for inspecting a semiconductor wafer.

[0002]

2. Description of the Related Art A wafer test is an inspection process of a semiconductor device for inspecting the electric characteristics of a plurality of semiconductor chips manufactured on a semiconductor wafer which has completed a wafer process.

At the wafer test stage, the wafer is handled on a wafer-by-wafer basis, and a wafer probe card for probing chips and an inspection device such as an LSI tester, a wafer prober for handling the wafer, and an external inspection device are used. The individual chips formed above are tested.

The purpose of the wafer test is to inspect the electrical characteristics at the time when the wafer process is completed and to select non-defective chips, to minimize the production cost after assembling and to perform the wafer process steps. To give quality feedback quickly.

FIG. 3 shows a wafer transfer system and a control signal system of a conventional semiconductor wafer tester. In the figure, 1 is a wafer transfer system for transferring a wafer to a stage for performing a wafer test, and 2 is a wafer size or a chip of a wafer to be measured which is necessary as information for alignment when aligning a wafer to be measured with a probe card. A wafer prober storage device 4 for storing the size generates a test signal necessary for testing the wafer to be measured, compares the response signal from the chip with an expected value stored therein, and D
An external inspection device 3 for determining the quality of the chip by performing a C test is a wafer prober control unit for controlling the wafer transfer system 1, the wafer prober storage device 2 and the external inspection device.

Further, in the wafer transfer system 1, 11 is a transfer belt driven bidirectionally by the drive unit A12 to transfer an object to be transferred mounted on its upper surface, 13a is a wafer supply cassette for accommodating a wafer to be measured, Reference numeral 17a denotes a supply-side wafer drive unit for moving the wafer supply cassette 13a up and down, taking out a wafer to be measured and moving it to the transfer belt 11, 13b a wafer storage cassette for storing the wafers after the measurement, and 17b a wafer It is a storage-side wafer drive unit that moves the storage cassette 13b up and down and stores the measured wafer returned by the transfer belt 11 after the test is completed in the wafer storage cassette 13b.

FIG. 4 shows an inspection procedure from a wafer test start to a lot processing completion of a wafer lot which is a unit of a semiconductor wafer test processing of a conventional semiconductor wafer test apparatus.

Table 1 shows management data that is input to the wafer test apparatus and is specific to the wafer under test (product type) for controlling the wafer test apparatus during the test.

[0009]

[Table 1]

Next, the operation will be described. In this wafer test apparatus, the wafer prober control unit 3 controls the drive unit 17a to move the wafer supply cassette 13a in the vertical direction, and the wafers to be measured are taken out one by one and placed on the transfer belt 11. To do. Next, the wafer prober control unit 3 controls the drive unit A12 to drive the transfer belt 11 to transfer the wafer leftward in the drawing and move it to a wafer stage (not shown). Then, the wafer prober control unit 3 aligns the wafer transferred to the wafer stage and a probe card (not shown) with reference to the wafer size and chip size data stored in the wafer prober storage device 2, and the position thereof is determined. When the matching is completed, the external inspection device 4 is driven to perform the test. When the test is completed, the wafer prober control unit 3
Moves the wafer on the wafer stage to the transfer belt 11 and controls the drive unit A12 to drive the transfer belt 11 in the right direction in the drawing to move the wafer to the right end thereof. Then, the drive unit B17b is controlled to move the wafer storage cassette 13b in the vertical direction to store the wafers one by one.

The control operation of the wafer test apparatus for carrying the wafer by the carrying operation is as follows. That is, as shown in FIG. 4, after the initial data is set by the lot start (step S1), the wafer of the lot is set up in the interface mechanism with the external inspection device (step S2), and the external inspection device 4
Then, the test is started (step S3). The wafer test apparatus receives the non-defective / defective signal of the device under test as a test end signal according to the test result signal from the external inspection apparatus 4 (step S4). The wafer tester continues the test until all the wafers of the lot are tested (step S5), calculates the test yield of the wafer from the number of test start signals and the number of non-defective / defective signals, and inputs it in advance. The management data in Table 1 is referred to (step S6), and if the test yield of the relevant wafer is within the range of the management data, the test of the relevant wafer is continued. When the test of the relevant wafer is completed,
The next wafer is set up, and the operation of the device is continued until all the wafers of the relevant lot have been tested (step S
7). On the other hand, if the test yield exceeds the range of the management data, the present wafer test equipment generates an alarm signal to inform the inspection equipment or the outside of the abnormality (step S6).
6) Stop the operation of the prober device or suspend it, and request the operator to take measures.

[0012]

Since the conventional semiconductor wafer test apparatus is configured as described above, an alarm is generated as an abnormal yield process during the lot process,
There is a problem in that the operation rate must be reduced in the inspection process of semiconductor wafers, where the equipment must be stopped, the operator must confirm and judge the alarm content, and the yield changes from wafer to wafer. It was

The present invention has been made to solve the above-mentioned problems, and by automatically re-testing the already-measured wafers when the yield is reduced,
(EN) Provided is a semiconductor wafer probing apparatus capable of preventing the apparatus from being stopped due to the occurrence of a low yield due to a change in the yield within a lot, increasing the operating rate, and suitable for executing such a procedure. To aim.

[0014]

The semiconductor wafer test apparatus according to the present invention is provided with means for re-setting up and re-measuring an already-measured wafer based on the product type management data and the test yield data for each wafer. is there.

Further, the semiconductor wafer test apparatus according to the present invention can store a wafer before measurement and a wafer after measurement in the same wafer storage portion, and supply and store the wafer according to the control signal. It is equipped with a simple wafer transfer system.

[0016]

The semiconductor wafer test apparatus according to the present invention is
The test yield data and management data enable automatic re-measurement of already-measured wafers.

Further, in the semiconductor wafer test apparatus according to the present invention, the wafer is conveyed in either the supply or the storage direction based on the control signal, so that the wafers can be stored and supplied in the same cassette. Miniaturization is possible. The configuration is also suitable for realizing automatic remeasurement.

[0018]

EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a wafer transfer system and a control signal system of a semiconductor wafer test apparatus according to an embodiment of the present invention. In the figure, 1a is a wafer transfer system for transferring a wafer to a stage for performing a wafer test, and 2a is a wafer size or chip of a wafer to be measured which is necessary as information for alignment when performing alignment between a wafer to be measured and a probe card. This is a wafer prober storage device for storing sizes, and in the present embodiment, it also stores wafer inspection management information such as management setting yield and product type management data, and test data information such as yield data for each wafer.
Reference numeral 4 is an external circuit for generating a test signal necessary for testing the wafer to be measured, comparing a response signal from the chip with an expected value stored therein, and performing a DC test to judge whether the chip is good or bad. The inspection device 3a is a wafer prober control unit that controls the wafer transfer system 1a, the wafer prober storage device 2a, and the external inspection device 4. In this embodiment, the inspection management information of the wafer under test and the test data information are compared. Then, the inspection procedure is changed so that the re-test of the already-measured wafer is automatically performed when the yield decrease occurs.

In the wafer transfer system 1a, 11 is a transfer belt which is driven by a drive unit A12 to transfer an object to be transferred, which is mounted on the upper surface of the transfer belt, 13 is a wafer storage cassette for storing wafers, and 14 is a wafer storage cassette. Wafer storage unit 16
Drive units B and 15 for moving the wafer to the transfer belt 11 at the time of supplying the wafer hold the wafer and are driven by the drive unit B14 to move the wafer bidirectionally between the wafer storage cassette 13 and the transfer belt 11. Wafer holding rod,
Reference numeral 17 denotes a storage cassette drive unit for vertically moving the wafer storage cassette.

FIG. 2 is a flow chart showing the control procedure of the semiconductor wafer test apparatus according to the embodiment of the present invention.

Further, Table 1 is a product type name input to the semiconductor wafer test apparatus and a set yield table serving as a management reference, and Table 2 is for each wafer stored in the wafer prober storage device 2a of the semiconductor wafer test apparatus. The wafer number and the test yield data are shown.

[0022]

[Table 2]

Next, the operation of the semiconductor wafer test apparatus according to the embodiment of the present invention will be described. In the present wafer test apparatus, the wafer prober control unit 3a includes the drive unit 17
To move the wafer storage cassette 13 in the vertical direction, and to control the drive unit 14 to drive the holding rod 15 to take out the wafers to be measured stored in the wafer storage cassette 13 one by one and place them on the transfer belt 11. Place. Next, the wafer prober control unit 3a controls the drive unit 12 to drive the transfer belt 11 to transfer the wafer leftward in the drawing and move it to a wafer stage (not shown). Then, the wafer prober control unit 3a aligns the wafer transferred to the wafer stage with a probe card (not shown) by referring to the wafer size and chip size data stored in the wafer prober storage device 2a. When done,
The external inspection device 4 is driven to perform the test. When the test is completed, the wafer prober control unit 3a
Moves the wafer on the wafer stage to the transfer belt 11 and controls the drive unit 12 to drive the transfer belt 11 in the right direction in the drawing to move the wafer to the right end. The drive unit 13 is controlled to control the wafer storage cassette 1
7 is moved up and down, and the drive unit 14 is controlled to drive the holding rods 15 to store the wafers one by one.

Next, the control of the semiconductor wafer test apparatus according to one embodiment of the present invention will be described with reference to FIG. After the probing device initializes the data (step S
1) Then, the wafer with the wafer number "1" of the relevant lot is set up (step S2), and the measurement is started by the external inspection device 4 (step S3). Test chip number and test end signal by test start (step S4)
The good and bad counts of the chip to be measured are performed by. Next, the test yield is calculated when the measurement of all chips of the wafer number “1” is completed (step S5).

Next, the management setting yield of the corresponding chip stored in the management data of Table 1 is compared with the test yield of the wafer (step S6), and if it is within the control range, the next wafer is tested. Then, the test yield of the wafer is stored in the test yield data of Table 2 as data corresponding to the wafer number (step S7). If the control range is exceeded, refer to the test yield data in Table 2 (step S
61), a wafer within the control range is selected from the already measured wafers as an object of remeasurement (step S62), and the measurement is performed again by the same procedure as steps S3, S4, S5 (steps S62, S63, S64). Compare the test yield of remeasurement with the test yield of the previous measurement, and if it is normal, for the wafers under measurement that have exceeded the control range among the wafers under measurement before entering the remeasurement operation, this is the low yield wafer. to decide. In this case, the next wafer to be measured is set up and the operation of the apparatus is continued. If the remeasurement result is abnormal, it is determined that an abnormality has occurred in the measurement system including the inspection device, an alarm is generated, and the operation is stopped (step S66).

By the way, as described above, when the wafer to be measured is supplied, the drive section A12 is actuated by the signal from the wafer prober control section 3, and the transfer belt 11 transfers the wafer from the storage section to the measuring apparatus side. At the completion of the wafer test,
The management data of the storage device 2a shown in FIG. 2 is referred to, and based on this result, it is determined whether or not to re-measure the already-measured wafer.
First, the wafer is stored in the wafer storage unit 13 by the transfer belt, and then the storage unit drive unit 17 moves the wafer storage unit 13 up and down to the position of the wafer to be remeasured by the control signal from the wafer prober control unit 3a, and then it is driven. Part B1
4, the wafer holding rod 15 is operated to push the wafer onto the transfer belt 11 to perform remeasurement.

The reason why the operation rate of the present apparatus can be increased by performing such automatic re-measurement is as follows. That is, in the semiconductor manufacturing process including the wafer test process, labor saving for cost reduction is one of the problems, and even in the wafer test process, the number of devices per worker is several to ten or more. Is coming. The cause of the alarm of the equipment is the case where the operator needs to confirm, judge and take action like abnormal operation of the equipment, and the case where the alarm is generated when the yield of the wafers is extremely lowered on some wafers. If the alarm is generated due to the lowering of the yield of the wafer in the latter case, retesting is performed on another wafer or a wafer with a good yield, and whether the alarm occurs due to the lowering of the yield of this wafer? Determine whether or not. While performing this treatment, when an alarm occurs in a plurality of devices, the state of waiting for treatment continues and the operating rate decreases. Therefore, by performing the automatic re-measurement, it is possible to carry out a primary investigation as to whether the yield decrease is due to the wafer or due to the device abnormality, without an operator, so that the operation rate can be improved. Further, according to the above-described embodiment, since the wafer cassette for storing the wafers can be used for both storing and supplying the wafers, the apparatus can be downsized, and the structure can be automatically re-used for the already measured wafers. It became suitable for measurement.

[0028]

As described above, according to the semiconductor wafer test apparatus of the present invention, the control of the probing apparatus is referred to the management data and automatically re-measured, so that the operation rate of the apparatus is improved. The effect that can be obtained is obtained.

Further, according to the semiconductor wafer test apparatus of the present invention, since the wafer transfer system has a structure capable of realizing both functions of storing and supplying the wafer, the structure is suitable for improving the operation rate of the apparatus. Moreover, there is an effect that the device can be downsized.

[Brief description of drawings]

FIG. 1 is a diagram showing a wafer transfer system of a wafer test apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram showing a control flowchart of the wafer test apparatus according to the embodiment of the present invention.

FIG. 3 is a diagram showing a wafer transfer system of a conventional wafer test apparatus.

FIG. 4 is a diagram showing a control flowchart of a conventional wafer test apparatus.

[Explanation of symbols]

 1a Wafer Transfer System 11 Wafer Transfer Belt 13 Wafer Storage 2a Storage Device 3a Control Device

Claims (2)

[Claims] 1. An apparatus for inspecting a semiconductor wafer having a plurality of semiconductor elements formed thereon, comprising inspection procedure changing means for changing the inspection procedure according to wafer inspection management information and test data information of a wafer under test. A semiconductor wafer test apparatus characterized by being provided. 2. The semiconductor wafer test apparatus according to claim 1, wherein a wafer before measurement and a wafer after measurement are stored in the same wafer storage portion, and the wafers can be supplied and stored by a control signal. A semiconductor wafer test apparatus having a wafer transfer system.