JPH06250612A - Scanning side electrode driving circuit of ferroelectric liquid crystal display - Google Patents

Abstract

PURPOSE:To enable driving stable over a long period of time by impression writable pulses, erasure pulses and high-frequency voltages to scanning side electrodes or writable scanning side electrode groups in accordance with a write enable signal, erasure signal and high-frequency voltage signal. CONSTITUTION:This driving circuit consists of a shift register 1 for writing, a shift register 2 for erasing, an erasure-write-hold changeover selector 3, a high-frequency voltage generating circuit 4, a booster circuit 5 and a changeover and AC conversion circuit 6. The instruction signal outputted from a hold signal selector 46 and the writable signal and erasure signal outputted from the erasure-write-hold changeover selector 3 are inputted to the booster circuit 5 then to the changeover and AC conversion circuit 6. The writable signal and the erasure signal are converted to AC in this circuit 6,which in turn generates the write enable pulses and erasure pulses. The writable pulses are applied to the scanning side electrode selected by the shift register 1 for writing and the erasure pulses are applied to the electrodes selected by the shift register 2 for erasing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit for a scanning side electrode of a ferroelectric liquid crystal display.

[0002]

2. Description of the Related Art Ferroelectric liquid crystals have spontaneous polarization in a direction orthogonal to the long axis of the molecule. Therefore, the orientation direction of the molecules changes according to the application of an external electric field. The liquid crystal molecules maintain their alignment direction even after the removal of the external electric field, while the alignment direction changes when an electric field opposite to the external electric field is applied.

Further, since the ferroelectric liquid crystal has a refractive index anisotropy, when the ferroelectric liquid crystal molecules aligned in a certain direction by the application of the external voltage are irradiated with polarized light, the polarization plane is changed according to the alignment direction. Rotates. Therefore, the ferroelectric liquid crystal is sandwiched between the transparent substrates including the transparent electrode and the polarizing plate,
By partially applying a pulsed electric field between the transparent electrodes, the light transmittance between the electric field application site and the non-application site can be changed, and an image can be displayed.

It is well known that such a characteristic of the ferroelectric liquid crystal can be used for screen display, and it has been put into practical use under the name of the ferroelectric liquid crystal display.

By the way, the ferroelectric liquid crystal molecules do not change their orientations in proportion to the applied external voltage, but their orientations change when a certain threshold voltage is applied for a certain period of time. Therefore, as a method of driving this ferroelectric liquid crystal display, two pulses having the same application time but different voltages are applied, and pixel information is written by a pulse (writing pulse) that exceeds the threshold voltage of these pulses. , A voltage modulation drive system that drives by maintaining the pixel information written by a pulse (screen information sustaining pulse) that is insufficient for this threshold voltage, and by applying two pulses that have the same applied voltage but different application times Pulse of sufficient time to change direction (write pulse)
There is known a pulse modulation driving method in which pixel information is written by, and driving is performed while maintaining the written pixel information.

This pulse modulation driving method is described in, for example, Japanese Patent Application Laid-Open No. 63-314524. That is, in this Japanese Patent Laid-Open No. 63-314524,
As a ferroelectric liquid crystal display, a liquid crystal in which a ferroelectric liquid crystal is interposed between a transparent substrate having a stripe-shaped scanning side transparent electrode group and a transparent substrate having a stripe-shaped data side transparent electrode group is used. As shown, the scanning side transparent electrode groups a1, a2, ... And the data side transparent electrode groups b1, b
Pixels (eg, c11, c12-) at the intersection point with 2 and
As a pulse, a pulse is applied between the scanning side transparent electrode groups a1 and a2, and the data side transparent electrode groups b1 and b2, to control the alignment of liquid crystal molecules in the pixel portion.

At this time, the screen information is written for each of the scanning side transparent electrodes. That is, the scanning side electrode group a
One scanning-side electrode (for example, a
At the same time as applying a writable pulse to 2), an on-pulse is applied to the data side electrodes (for example, b2 and b3) corresponding to the pixels (for example, c22 and c23) on the scanning side electrode a2 that need to write information. Is applied.
Then, a composite pulse of the voltage of the writable pulse and the voltage of the on-pulse is applied to the liquid crystal, and the orientation direction thereof is changed. 4 (a), (b), and (c) show examples of the waveforms of the writable pulse, the on-pulse, and the combined pulse, respectively, and the combined pulse aligns the liquid crystal at a portion having a voltage higher than the threshold voltage. It can be seen that it has a sufficient τ time.

Further, when the selected one scan side electrode (eg, a2) writable pulse is applied, the pixels on the scan side electrode a2 that do not need to be written with information (eg, c21, c24). An off pulse is applied to the data side electrodes (for example, b1 and b4) corresponding to the above, and the alignment state of the liquid crystal is maintained. 5 (a), (b),
(C) shows the waveforms of the above-described writable pulse and the waveforms of the off-pulse and their combined pulse correspondingly, respectively.

Then, one scanning-side electrode is sequentially selected from the scanning-side electrode group, and the writing is sequentially performed on the pixel portion on the selected scanning-side electrode.
Writing is completed for all of these scanning electrodes, and one screen is displayed.

An erasing pulse is applied to the scanning-side electrode (for example, a3) to be selected next to the one scanning-side electrode thus selected, simultaneously with the application of the writable pulse or the ON pulse. FIG. 6 shows the waveform of the erase pulse. Pixel information on the scan line electrode a3 side is erased by application of the erase pulse and ON pulse or OFF pulse, and pixel information by the next writable pulse or ON pulse applied. Can be written.

Incidentally, the ON pulse or OFF pulse of the data side electrode is applied to the scan side electrodes a1 and a4 other than the scan side electrodes a2 and a3 to which the writable pulse and the erase pulse are applied. However, when such a voltage is applied to the ferroelectric liquid crystal, the orientation direction of the liquid crystal fluctuates, which causes the rotation angle of the polarization plane to fluctuate and the transmittance of the display to become unstable. A high-frequency voltage is applied to the electrodes a1 and a4 to generate high-frequency induced polarization in the liquid crystal molecules, and the high-frequency induced polarization stabilizes the liquid crystal molecules and maintains their alignment direction.

[0012]

However, in such a driving method, it is necessary to apply three kinds of voltages, a writable pulse, an erasing pulse and a high frequency voltage, to the scanning side electrode at delicate timings. However, a simple drive circuit that can stably apply these three types of voltage at delicate timing has not been developed.
Therefore, there is a problem that the display cannot be stably driven for a long time.

The present invention has been made under such circumstances, and an object of the present invention is to provide a drive circuit capable of stably driving a ferroelectric liquid crystal display for a long time.

[0014]

That is, according to the present invention, a ferroelectric liquid crystal is interposed between a transparent substrate having a striped scanning side transparent electrode group and a transparent substrate having a striped data side transparent electrode group. , One of the scanning side transparent electrodes is selected, a writable pulse of a writable waveform is applied, and the data side selected from the data side transparent electrode group corresponding to the pixel on the scanning line. An on-pulse is applied to the transparent electrode to write pixel information to the pixel at the intersection of the selected scanning-side transparent electrode and the data-side transparent electrode, and at the same time, another scanning to be written next to the one scanning-side transparent electrode. An erase pulse of an erase waveform is applied to the side electrode to erase the pixel information on that scan line, and the scan side electrode group excluding the selected one scan side electrode and the other one scan side electrode has a high frequency. In the drive circuit of the scanning side electrode of the ferroelectric liquid crystal display that applies a voltage to maintain the pixel information and sequentially performs the writing and erasing to display a screen, applying the writable pulse in synchronization with a clock signal A write enable signal generating circuit indicating a position, an erase signal generating circuit indicating an erase pulse application position in synchronization with the clock signal, and the high frequency voltage except for the write enable signal applying position and the erase signal applying position A high frequency electric field indicating signal circuit for generating a high frequency voltage indicating signal indicating the application position of the scanning side electrode, and a writable pulse, an erasing pulse and a high frequency voltage based on the writable signal, the erasing signal and the high frequency voltage indicating signal. Alternatively, it is characterized by comprising an applying means for applying to the scanning side electrode group.

[0015]

According to the present invention, the drive circuit for the scanning-side electrode has a writable pulse generated based on a writable signal, an erasing signal, and a high frequency voltage signal generated in synchronization with a clock signal,
Since the erase pulse and the high frequency voltage can be applied to the scanning side electrode or the scanning side electrode group, these three types of voltages can be stably applied at delicate timings.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments will be described below with reference to the drawings. Figure 1
Shows a block diagram of a drive circuit according to an embodiment of the present invention,
As can be seen from the figure, the shift register for writing 1, the shift register for erasing 2, the erasing / writing / holding switching selector 3, the high frequency voltage generating circuit 4, the boosting circuit 5, the switching
The alternating current circuit 6 is configured as a main part.

The writing shift register 1 contains n + 1 shift registers, one more than the number n of scanning-side electrodes of the liquid crystal display, and the first shift register 10 means standby, while The n shift registers 11, 12 and so on that correspond to the scanning side electrodes correspond to the respective scanning side electrodes. The writing shift register 1 sequentially moves the driven shift register to select the scanning-side electrode based on the clock signal from the shift clock circuit 1a and the drive signal from the liquid crystal drive signal input circuit 1b. Then, a writable signal is generated. still,
FIG. 2 shows the waveforms of the clock signal (a), the drive signal (b), and the writable signal (c). In FIG. 2, the horizontal axis is a time axis, and each signal commonly shows this time axis.

Further, the erasing shift register 2 has the same number of shift registers 21, 22, ... As the number n of scanning side electrodes of the liquid crystal display, and each shift register 21, 22 ,. It corresponds to the side electrode. The erasing shift register 2 sequentially moves the shift register to be driven based on the clock signal from the shift clock circuit 1a and the drive signal from the liquid crystal drive signal input circuit 1b to select the scanning side electrode. Then, an erase signal is generated. At this time, since the selection is performed in synchronization with the writing shift register, the scanning side electrode selected by the erasing shift register 2 precedes the scanning side electrode selected by the writing shift register 1. Therefore, the scanning-side electrode selected by the erasing shift register 2 in this manner is the writing shift register 1 next.
Selected in. The waveform (d) of the erase signal generated from the erase shift register 2 is shown in FIG.

Erase / write / hold switching selector 3
Detects a writable signal and an erasing signal generated in this way and generates a holding signal except for the timings at which the writable signal and the erasing signal are applied, and can be constituted by, for example, a NAND circuit. The waveform (e) of this hold signal is shown in FIG.

The high frequency voltage generating circuit 4 is a circuit for generating a high frequency voltage applied during the holding time. This circuit includes an oscillator 41, an external clock input device 42, a clock switching signal circuit 43, a clock selector 44, a frequency divider 45, a holding selector 46, a frequency division ratio setting register 47, and a decoder 48.
Is configured as a main part. And the oscillator 41,
The external clock input device 42 and the clock switching signal circuit 43 are connected to a clock selector 44, and the clock selector 44 receives the clock signal of the oscillator 41 and the clock signal of the external clock input device 42 based on the signal from the clock switching signal circuit 43. Will be output. The clock selector 44 is connected to both the frequency divider 45 and the hold signal selector 46.

The frequency divider 45 determines the frequency of the high frequency voltage by adding the clock signals input from the clock selector 44. This divider 45
Can consist of many flip-flops, etc.
The clock signals are added according to the number of the flip-flops to determine the frequency.

The holding signal selector 46 selects the frequency of the high frequency voltage and outputs a high frequency voltage instruction signal. That is, the hold signal selector 46 has an input terminal from the frequency divider 45 in addition to the input terminal from the clock selector 44, and selects the frequency according to the signal from the decoder 48. Assuming that the same frequency as the clock signal from the clock selector 44 is selected as the frequency of the high frequency voltage, the holding signal selector 46 outputs this clock signal as it is. When a high frequency voltage having a frequency lower than the frequency of the clock signal from the clock selector 44 is required, the hold signal selector 46 outputs the signal from the frequency divider 45 according to the required frequency. The frequency of the signal to be output is determined by the signal input from the frequency division ratio setting register 47 via the decoder 48.

Then, the high frequency voltage instruction signal output from the holding signal selector 46 and the writable signal and the erasing signal output from the erase / write / hold switching selector 3 are input to the booster circuit 5 and applied to the liquid crystal. The voltage is boosted to a voltage required for the operation, and then input to the switching / AC conversion circuit 6.

The switching / AC circuit 6 is connected to each scanning side electrode of the scanning side electrode group of the liquid crystal display, and a writable pulse and an erasing pulse are applied to the scanning side electrode selected from this scanning side electrode group. Apply. That is,
In this switching / AC circuit, the boosted writable signal and the erasing signal are AC-converted, and by this AC conversion, a writable pulse and an erasing pulse having a waveform to be applied to the scanning side electrode are generated, A writable pulse is applied to one scanning-side electrode selected by the shift register 1 for scanning, and an erasing pulse is applied to another scanning-side electrode selected by the erasing shift register 2 in synchronization with each other. .

The waveform (f) of the pulse applied to the scanning side electrode at this time is shown in FIG. In FIG. 2 (f), each is an erase pulse, is a writable pulse, and is a high-frequency voltage waveform.

[0026]

According to the present invention, a writable pulse,
Since the erase pulse and the high frequency voltage can be stably applied at a delicate timing, the ferroelectric liquid crystal display can be stably driven for a long time.

[Brief description of drawings]

FIG. 1 is a block diagram of a drive circuit according to an embodiment of the present invention.

FIG. 2 shows waveforms of respective signals and pulses according to an embodiment of the present invention, FIG. 2 (a) is a clock signal, and FIG.
2B is a drive signal, FIG. 2C is a writable signal, FIG. 2D is an erase signal, FIG. 2E is a hold signal, and FIG.
6F is an explanatory diagram showing respective waveforms of pulses applied to the scanning side electrodes.

FIG. 3 is an explanatory diagram for explaining a conventional ferroelectric liquid crystal display.

FIG. 4 is an explanatory diagram showing an example of waveforms of a writable pulse, an ON pulse, and a composite pulse of a conventional ferroelectric liquid crystal display.

FIG. 5 is an explanatory diagram showing an example of waveforms of a writable pulse, an off pulse, and a composite pulse of a conventional ferroelectric liquid crystal display.

FIG. 6 is an explanatory diagram showing an example of a waveform of an erase pulse of a conventional ferroelectric liquid crystal display.

[Explanation of symbols]

 1 Write shift register. 2 Erase shift register. 3 Erase / write / hold switching selector. 4 High frequency voltage generation circuit. 5 Booster circuit. 6 Switching / AC circuit.

Claims (1)

[Claims] 1. A ferroelectric liquid crystal is interposed between a transparent substrate having a striped scanning side transparent electrode group and a transparent substrate having a striped data side transparent electrode group, and one of the scanning side transparent electrode groups is provided. The scanning side transparent electrode of is selected and a writable pulse of a writable waveform is applied, and an ON pulse is applied to the data side transparent electrode selected from the data side transparent electrode group corresponding to the pixel on this scanning line, Pixel information is written to the pixel at the intersection of the selected transparent electrode on the scanning side and the transparent electrode on the data side, and at the same time, an erasing pulse of an erasing waveform is applied to the other scanning side electrode to be written next to the above transparent electrode on one scanning side. Then, the pixel information on the scanning line is erased, and a high frequency voltage is applied to the scanning side electrode group excluding the selected one scanning side electrode and the other one scanning side electrode to maintain the pixel information. In the drive circuit of the scanning side electrode of the ferroelectric liquid crystal display which performs the above-mentioned writing and erasing in sequence to display a screen, a writable signal generating circuit which indicates an application position of the writable pulse in synchronization with a clock signal, An erase signal generation circuit that indicates the application position of the erase pulse in synchronization with the clock signal, and a high frequency voltage instruction signal that indicates the application position of the high frequency voltage except for the application positions of the writable signal and the erase signal A high-frequency electric field indicating signal circuit, and applying means for applying a writable pulse, an erasing pulse, and a high-frequency voltage to the scanning side electrode or the scanning side electrode group based on the writable signal, the erasing signal, and the high frequency voltage indicating signal. A scanning-side electrode drive circuit for a ferroelectric liquid crystal display characterized by comprising: