JPH062479Y2 - Motor control circuit - Google Patents

Description

Detailed Description of the Invention A. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit in which two chips for controlling a motor are connected to a common DC power source, such as a cargo handling chip and a traveling chip for an electric vehicle. It is related to the technology for prevention.

B. SUMMARY OF THE INVENTION The present invention relates to a circuit in which a common DC power source is connected to a second chipper composed of a first chipper and a thyristor and two motors are controlled respectively by these chippers, and the first chipper is turned on. Then, the commutation failure of the thyristor is prevented by suppressing the ignition of the thyristor for a predetermined suppression time.

C. 2. Description of the Related Art FIG. 4 is a circuit diagram showing a motor control circuit used in an electric vehicle such as a forklift. Reference numeral 1 is a cargo handling chaper as a first chaper, 2 is a traveling chaper as a second chaper, and these chapers 1 and 2 are each constituted by a transistor and a thyristor SM. M ₁ is a cargo handling motor and M ₂ is a traveling motor, which are controlled by the cargo handling chaper 1 and the traveling chaper 2, respectively. E is a DC power supply, L _A and L _B are reactors, D ₁ and D ₂ are flywheel diodes, and F ₁ and F ₂ are field windings.

The timing of turning on and off the thyristor SM will be described below. When a gate pulse signal is supplied to the thyristor SM while the capacitor C ₁ is being charged to the polarity shown in the figure, the thyristor SM turns on and the commutation capacitor C ₁
And the series resonance of the inverting reactor L ₁ causes the capacitor C ₁
The voltage polarity of is reversed and becomes opposite to the polarity shown, and
The auxiliary thyristor SS that had been on until then is turned off by applying a reverse bias. Then, when the half cycle current due to series resonance has finished flowing, the auxiliary thyristor SS
Is fired, thereby applying a reverse bias to the thyristor SM and turning off the thyristor SM. At this time, the charge of the capacitor C ₁ apparently flows through the thyristor SM, and the voltage polarity of the capacitor C ₁ returns to the illustrated polarity. Thus, the thyristor SM is turned on with a constant on time,
The frequency is controlled by being turned off and changing the timing of the gate pulse signal according to the depression of the accelerator, thereby adjusting the traveling speed. The reactor L ₁ and the reactor L _e are wound around the same core, and the transformer action thereof increases the current flowing through the thyristor SM during ignition.

D. Problems to be Solved by the Invention The circuit shown in FIG. 4 has a problem that commutation failure occurs when the thyristor SM is ignited immediately after the cargo handling chipper 1 is turned on. Reason 5
It will be described with reference to the drawings. For example, when the cargo handling hopper 1 is turned on at time t ₁ , after that, the current flowing through the diode D ₁ becomes equal to the current (about 150 μS).
In the same manner as when the diode D ₁ is apparently short-circuited, a large current flows and an organic voltage of the illustrated polarity is generated in the reactors L _A and L _B , so that the voltage at the point A drops in a pulse shape. At this time of the capacitor C ₁ charges, decreases rapidly at reactor L ₀ → auxiliary thyristor SS → reactor L _e → diode D ₂ → handling motor M ₁ → handling Chiyotsupa 1 → loop of the capacitor C _1, the charging voltage of the capacitor C ₁ descend. During this period, the auxiliary thyristor SS remains in the ON state because a large current is flowing from the reactor L ₁ . When the voltage at the point A is low, for example, when the thyristor SM is ignited at time t _{2, the} auxiliary thyristor SS cannot be turned off because the voltage of the capacitor C ₁ is low, and the charge of the capacitor C ₁ becomes It flows through the reactor L ₀ → auxiliary thyristor SS → thyristor SM → capacitor C _1, the voltage polarity of the capacitor C ₁ is inverted. If off here if the auxiliary thyristors SS, by a trans-acting current energy and reactor L _1, L _e in reactor L _1, the inverted voltage of capacitor C ₁ is the larger, the auxiliary as described above Since the thyristor SS could not be turned off, the reversal voltage of the capacitor C ₁ was small, and therefore the thyristor SM could not be reverse biased with a sufficient magnitude, so the thyristor SM could not be turned off and commutation failed. Reach

An object of the present invention is to solve such a problem.

E. Means for Solving the Problems The present invention provides a first oscillator, for example, a first oscillator circuit and an second oscillator circuit for taking on timing of a cargo handling chuck of an electric vehicle.
, A second oscillating circuit for timing the firing of a thyristor that forms a traveling chip,
A suppression circuit is provided which generates a suppression signal for suppressing the output of the gate pulse signal from the second oscillation circuit for a predetermined suppression time from the time when the pulse signal is output from the first oscillation circuit.

F. Action Even when the pulse signal is output from the first oscillation circuit and the first chip is turned on, and the voltage of the capacitor is lowered by this, the timing of supplying the gate pulse signal to the thyristor is such that the first chip is turned on. It does not occur that the commutation of the thyristor occurs since the voltage of the capacitor C ₁ is restored after a while after the operation.

G. Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention, and shows the same parts as those in FIG. Reference numeral 3 is a first oscillation circuit for supplying an ON signal to the base of the transistor of the cargo handling chaper 1. 4 is the thyristor S of the traveling chip 2
This is a second oscillation circuit for supplying a gate pulse signal to M, and the timing of the gate pulse signal output from this oscillation circuit 4 changes according to the access step. In this embodiment, the gate pulse signal is output from the second oscillator circuit 4 between the two oscillator circuits 3 and 4 for a predetermined inhibition time from the time point when the pulse signal is output from the first oscillator circuit 3. A suppression circuit 5 for generating a suppression signal for suppressing is provided.

An example of this inhibition circuit 5 is shown in FIG.
The pulse signal from the first oscillating circuit 3 is input to the + side of the comparator 6, the waveform of the pulse signal is shaped by comparing with the reference voltage, and this is input to the differentiating circuit 7. As a result, a pulse signal corresponding to the rising edge of the pulse signal is obtained, and this pulse signal is input to the timer integrated circuit 8 through the resistor R ₁ and the capacitor C ₂ . When the pulse signal is input from the timer integrated circuit 8, a pulse signal having a pulse width corresponding to the time constants of the variable resistor VR and the capacitor C ₃ is input to the base of the transistor 9 via the resistor R ₂ . Therefore, the current signal, which is the inhibition signal, flows through the second oscillator circuit 4 only for the time corresponding to the pulse width. Here, the second oscillating circuit 4 is configured so that the output of the gate pulse signal is not generated while the current signal is being supplied, and accordingly, the thyristor SM is turned on while the current signal is being generated. Not arced.

FIG. 3 is a diagram showing the correspondence between the operation of the two chips 1 and 2 and the inhibition signal. It is assumed that the pulse signal is output from the first oscillating circuit 3 at time t ₄ and the cargo handling cutter 1 shifts from off to on. As described above, the voltage at the point A lowers because the current suddenly flows through the cargo handling chaper 1, and the voltage between the anode and the cathode of the thyristor SM lowers and the charging voltage of the capacitor C ₁ also lowers. Then, after a lapse of a certain time from the time t ₄ , that is, when the current flowing through the cargo handling chatter 1 settles down, the voltage at the point A rises,
This also restores the voltage of the capacitor C ₁ . While the first
When the pulse signal is output from the oscillation circuit 3 of FIG. 3, the inhibition time is supplied to the second oscillation circuit 4 by the inhibition circuit 5 from time t ₄ to time t ₅ , so that the thyristor SM is not ignited during this time. . The pulse width of the inhibition signal is the capacitor C ₁
The voltage must be long enough to recover, for example, 0.7 ms or more.

H. As described above, according to the present invention, since the ignition of the thyristor, which is the second chip, is suppressed only for the predetermined suppression time after the first chip is turned on, the voltage of the capacitor is reduced. Even if the thyristor is once lowered, the thyristor is ignited after it is recovered, so that commutation failure of the thyristor can be prevented.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing an example of an inhibition circuit, FIG. 3 is a waveform diagram showing the operation of the embodiment of the present invention, and FIG. 4 is a conventional example. The circuit diagram shown in FIG. 5 is a waveform diagram showing the operation of the conventional example. M ₁ ... Cargo handling motor, M ₂ traveling motor, 1 ... Cargo handling chaper, 2 ... Traveling chaper, 3 ... First oscillating circuit, 4 ... Second oscillating circuit, 5 ... Inhibiting circuit.

Claims (1)

[Scope of utility model registration request] 1. A first motor and a second motor each having a flywheel diode by a first chopper and a second chopper made of a thyristor connected in parallel to a common DC power source via a reactor. A first oscillator circuit for controlling and connecting a series circuit of a capacitor and a reactor for applying a reverse bias to the thyristor in parallel with the thyristor and for taking on timing of the first chip. A motor control circuit comprising a second oscillation circuit for timing the firing of the thyristor, wherein a pulse from the first oscillation circuit is provided between the first oscillation circuit and the second oscillation circuit. A suppression signal is generated to suppress the output of the gate pulse signal from the second oscillation circuit for a predetermined suppression time from the signal output time. A motor control circuit having a stop circuit.