JPH0624290B2 - Frequency mixer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a balanced frequency mixer using, for example, a field effect transistor.

(Prior Art) Generally, a frequency mixer using a field effect transistor (hereinafter abbreviated as FET) or a high electron mobility transistor has a higher conversion gain (Gc) than a frequency mixer using a diode. Since it is obtained and has a low noise figure (NF), it is widely used in various communication devices such as satellite communication devices and satellite broadcast receiving converters.

FIG. 5 is a circuit diagram showing a conventional frequency mixer using a source-grounded FET.

That is, the first high frequency (RF) is applied to the gate terminal 1G of the FET1.
A gate to which the first RF signal source 2 is connected via the matching circuit 2a for the signal (F1) (frequency 1) and which blocks the first RF signal F1 and passes the mixed intermediate frequency (1F) signal A power supply terminal 3 for applying a negative DC bias voltage (-Vg) 'is connected via the bias circuit 3a.

Further, the first RF is connected to the drain terminal 1D of the FET1.
The signal F1 is blocked, and the local oscillation signal, that is, the second RF signal F2 (frequency 2) and the IF signal ΔF (frequency Δ = | 1-2
Via a matching circuit 4a for |) and an IF blocking circuit 4b that blocks the IF signal ΔF and passes the second RF signal F2.
The second RF signal source 4 is connected.

Furthermore, the connection point between the matching circuit 4a and the IF blocking circuit 4b is
The output terminal 5 is connected through an IF matching circuit (filter) 5a that matches only the IF signal ΔF and blocks the other RF signals F1 and F2.

The second power supply terminal 6 is connected to the output side of the IF matching circuit 5a via the bias circuit 6a in order to block the IF signal ΔF and apply a positive DC bias voltage Vd to the drain 1D of the FET1. ing. 1S represents a source terminal.

Therefore, with the bias voltage of −Vg applied to the gate 1G of the FET1 and the bias voltage of + Vd applied to the drain 1D, the mixed IF signal ΔF of the first RF signal F1 and the second RF signal F2 is obtained. Is derived from the output terminal 5.

In the conventional frequency mixer configured as above, for example, when the frequency mixer of the SHF band directly receives the signal, the frequency Δ of the IF signal Δ becomes a high frequency of about 1 GHz band.

However, in the case where the radar transmission frequency signal is 9400 MHz and the frequency Δ of the IF signal ΔF is about several tens of MHz as in the case of a radar device, for example, the frequency 2 of the second RF signal F2 is , The frequency of the first RF signal F1 is extremely close to 1, so that the two matching circuits 2a, 4a
And the IF blocking circuit 4b, the first and second RF signals
It was difficult to separate F1 and F2 from each other.

As a result, some of the first and second RF signals F1 and F2 leak into the other RF signal sources 4 and 2 and invade each other, and the operation of the RF signal generation circuit including the low noise amplifier and the oscillation circuit is performed. This made it unstable and caused a problem that the oscillation frequency fluctuated.

In addition, the first and second RF signals F1 and F2 are R
Partly leaking to the F signal sources 4 and 2 means that these R
Since it means that the F signal is not effectively supplied to the FET 1, the conversion gain as a mixer is reduced and the noise figure is also increased, and an improvement has been desired.

The above is the same when a high electron mobility transistor is used instead of the FET.

(Problems to be Solved by the Invention) In the conventional frequency mixer, when the frequencies of the frequency signals to be mixed are close to each other, the high-frequency signals of the other parties intrude into their own signal sources to cause a frequency conversion gain. There are drawbacks such as lowering the noise and increasing the noise figure.

Therefore, an object of the present invention is to solve the above-mentioned conventional drawbacks and to provide a frequency mixer that can obtain good conversion characteristics and the like even when the frequencies of frequency signals to be mixed are close to each other.

[Configuration of the Invention] (Means for Solving the Problems) A frequency mixer according to the present invention includes a gate terminal to which one high frequency signal is supplied from one high frequency signal source, and 2
A transistor having two drain terminals and a source terminal; and a transmission line connected between the two drain terminals of the transistor and having a length of at least ½ or more of the wavelength of the one high-frequency signal; The other high-frequency signal source connected to the position where the standing wave of the one high-frequency signal is substantially minimum, and the other high-frequency signal supplied from the other high-frequency signal source and the one high-frequency signal The signal mixed with is taken out in the middle of the transmission line or from the source terminal of the transistor.

(Operation) In the frequency mixer according to the present invention, a transmission line having a half wavelength or more is connected between one drain input high frequency signal and the other high frequency signal source for determining the one high frequency signal. Since it is connected to the position on the transmission line where the standing wave is almost minimum, leakage of one high frequency signal to the other high frequency signal source is avoided, and the high frequency signal is efficiently supplied to the transistor.

Further, since the other high-frequency signal is balanced with respect to the drain of the transistor and supplied in opposite phases to each other, the high-frequency signal is prevented from leaking to the one high-frequency signal source side connected to the gate terminal.

Therefore, in the frequency mixer of the present invention, the signal sources of the two high-frequency signals to be mixed are not affected by the high-frequency signals from the other one, so that the operation is stable and the frequency conversion can be performed with high efficiency. .

(Embodiment) Hereinafter, an embodiment of the frequency mixer according to the present invention will be described in detail with reference to FIGS. 1 to 4.

The same components as those of the conventional frequency mixer shown in FIG. 5 are designated by the same reference numerals and detailed description thereof will be omitted.

FIG. 1 is a circuit diagram showing a first embodiment of a frequency mixer according to the present invention using a source-grounded FET.

That is, the gate terminals 11G and 12G of the two FETs 11 and 12 are commonly connected, and the first RF signal source 2 is connected through the matching circuit 2a for the first high frequency (RF) signal F1 (wavelength λg). It

Between the drain terminals 11D and 12D of the FETs 11 and 12, one ends of two transmission lines 71 and 72 of the same length are connected, and between the other ends, two RF signals F1 and F2 are mixed. Is connected to a capacitor 8 having a low impedance and a high impedance with respect to the IF signal ΔF, and the total length L of the two transmission lines 71 and 72 including this capacitor 8 is
It is configured to be longer than 1/2 wavelength (λg / 2) of the first RF signal F1.

Since the length including the lead wire of the capacitor 8 is small compared to the length of the transmission lines 71, 72 and can be ignored, the drain terminal 11D of the FET 11 or the drain terminal 12D of the FET 12 is separated by (L / 2−λg / 4). At the positions P and P ', the standing wave is the smallest with respect to the first RF signal F1.

The signal source 4 of the local oscillation signal, that is, the second RF signal F2 is connected via the IF blocking circuit 4b to, for example, one position P where the standing wave of the first high frequency signal F1 of the transmission line 71 is minimized. To be done.

Further, IF matching circuits 51 and 52 are provided at both ends of the capacitor 8, respectively.
And the output terminal 5 is connected via the output transformer 9 and the output side of one IF matching circuit 51, that is, the transformer 9
The second power supply terminal 6 is connected to one end of the primary side of the via a bias circuit 6a.

In addition, on the input side of the matching circuit 2a, each gate terminal 11G, 12G
Gate bias circuit to supply the bias voltage to
The first power supply terminal 3 is connected via 3a.

Therefore, the first RF signal F1 and the second RF signal F1 and the second RF signal are applied with the bias voltage of −Vg applied to the gates 11G and 12G of the FETs 11 and 12 and the bias voltage of + Vd applied to the drains 11D and 12D, respectively. The mixed IF signal ΔF of the signal F2 is derived from the output terminal 5.

At this time, the first RF signal F1 commonly supplied to the gates 11G and 12G of the FETs 11 and 12 is the drain terminal 1 of the FETs 11 and 12.
In-phase is output to 1D and 12D, and drain terminal 11
The signal of which the output of D is applied to the other drain terminal 12D via the transmission lines 71, 72 and the capacitor 8 and the drain terminal 1
The 2D output has the same phase as the signal supplied to one drain terminal 11D via the transmission lines 72, 71 and the like.

Further, the transmission lines 71, 72 including the capacitor 8 are connected to the common reactance when viewed from the drain terminals 11D, 12D of the FETs 11, 12.

Therefore, its common reactance is
A value that allows the FETs 11 and 12 to operate efficiently as a frequency mixer for the first high-frequency signal F1 because the total length of 2 can be selected to a desired value by selecting an arbitrary length of λg / 2 or more. Can be selected. Although the two transmission lines 71 and 72 have the same length in FIG. 1, they do not necessarily have to be the same as long as the total length L is λg / 2 or more.

In addition, from the drain terminals 11D and 12D of the FETs 11 and 12 to the transmission line
The characteristic impedances of the transmission lines 71 and 72 do not necessarily have to be the same, as long as they are common to each other as viewed from 71 and 72.

In the conventional frequency mixer configured as described above,
For example, when the IF signal frequency Δ is about several tens of MHz with respect to the radar transmission frequency signal of 9400 MHz, such as a radar device, the second RF signal F2, that is, the frequency 2 of the local oscillation signal is the first RF signal. It is extremely close to frequency 1 of F1, but the position P of the standing wave of the first RF signal F1 is the smallest
In addition, since the second RF signal source 4 is connected, it is possible to prevent the RF signal F1 from leaking to the second signal source 4. The second RF signal F2 is transmitted to the capacitor 8 and the transmission lines 71 and 72.
The second RF signal F2 is canceled by the common gate terminals 11G and 12G and is supplied to the first RF signal source 2 because the drains 11D and 12D of the FET 1 are supplied in opposite phases to each other. It has no effect. That is, the first and second RF signal sources 2 and 4 are separated from each other in the circuit configuration of this frequency mixer, and do not affect each other.

In addition, the second RF signal F2 has opposite phases to the drains 11D and 12
Since it is supplied to D and mixed with the first RF signal,
The mixed IF signals ΔF output to the drains 11D and 12D have opposite phases and are combined by the output transformer 9. Due to the circuit configuration, when the IF signal ΔF is directly taken out as a balanced output signal and supplied to the subsequent stage, the output transformer 9 is omitted.

Further, in the first embodiment, the transmission line has two FETs.
The connection between the drain terminals of the above was described. But,
1 if one FET has two drain terminals
A transmission line may be connected between two drain terminals of one FET. For example, in FIG. 2, one FET has two
In the example having two drain terminals, the FET 1 has one gate terminal 1G, one source terminal 1S, and two drain terminals 11D and 12D. In this case, two FET1
In comparison with the first embodiment using 1,12, the commonly connected gate terminals 11G, 12G are one gate terminal 1G, and the source terminals 11S, 12S which are both grounded are one source terminal. Corresponds to 1S. The drain terminals 11D and 12D correspond to the two drain terminals 11D and 12D. Therefore,
A frequency mixer having the same function can be constructed by replacing the one FET1 shown in FIG. 2 with the two FETs 11 and 12 shown in FIG.

Further, by using the FET1 shown in FIG. 2, it is possible to construct a frequency mixer which operates with one bias power source.

That is, FIG. 3 is a circuit diagram showing a third embodiment according to the present invention.

The difference from FIG. 1 is that the other end of the gate bias circuit 3a is grounded, and the first RF signal F1 and IF signal ΔF are grounded between the source terminal 1S and ground.
a and variable resistor 10b for operating FET1 with one power supply
And are connected in parallel. The capacitor 10a may be separately connected and used for the first RF signal F1 and the IF signal ΔF.

Further, in the embodiment shown in FIGS. 1 to 3, a frequency mixer without the capacitor 8 can be constructed.

That is, the first RF is applied between the drain terminals 11D and 12D of the FET1.
Transmission line 7 with a length of 1/2 or more for the wavelength λg of the signal F1
Are connected.

Further, the second RF signal source 4 is placed on the transmission line 7 at a position P ′ where the standing wave is the smallest with respect to the first RF signal F1.
It is connected via a blocking circuit 4b, and further, the output side of the RF signal source 4 is connected to a bias power supply 6 via a bias circuit 6a which blocks the second RF signal F2. The capacitor 6b is for high frequency bypass.

On the other hand, the output terminal 5 is connected to the common source terminal 1S of the FET 1, and the first and second RF signals F1 and F2 are short-circuited between the source terminal 1S and ground to cut off the IF signal ΔF. Capacitor 51 and I in parallel with this capacitor 51
A series circuit of a filter 52 and a variable resistor 53 for blocking the F signal F2 and passing a direct current is connected.

Therefore, the bias condition of the FET 1 is determined by changing the resistance value of the variable resistor 53, and the IF signal ΔF is derived from the output terminal 5 by the frequency conversion operation under the condition.

Since each of the variable resistors 10b and 53 is a resistor that determines the bias condition of the FET, it is a long fixed resistor.

According to the circuit configuration shown in FIG. 4, the circuit shown in FIGS.
Filter circuits 51 and 52 and output transformer 9 required in the figure
Can be omitted, and the overall miniaturization can be realized.

Further, in this embodiment, for example, by connecting the stub,
By adjusting and setting the position P ′ at which the first RF signal F1 on the transmission line 7 has a substantially zero potential and the impedance Z of the transmission line 7 so as to be matched when viewed from the drain terminals 11D and 12D, A highly efficient frequency mixer can be constructed.

In each of the above embodiments, an example in which an FET is used as an active element has been described, but it is still not applicable to a high electron mobility transistor.

[Advantages of the Invention] The present invention provides a first RF signal λg between two drains.
/ 2 wavelength or more transmission lines are connected so that two high-frequency signals mixed in frequency do not affect each other's signal source, and a good frequency mixer can be obtained. It can be used as a receiver for the above to obtain a remarkable effect.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a frequency mixer according to the present invention, FIG. 2 is a configuration diagram of an FET adopted in a second embodiment of the frequency mixer according to the present invention, and FIG. A circuit diagram showing a third embodiment of the frequency mixer according to the present invention,
FIG. 4 is a circuit diagram showing a fourth embodiment according to the present invention, and FIG. 5 is a circuit diagram showing a conventional frequency mixer. 1, 11 ... FET, 11D, 12D ... drain terminal, 11G, 12G ... gate terminal, 2 ... first RF signal source, 3, 6 ... bias power supply, 4 ... second RF signal source 5 ... Output terminal, 7, 71, 72 ... Transmission line, 8 ... Capacitor.

Claims (1)

[Claims] 1. A gate terminal to which one high-frequency signal is supplied from one high-frequency signal source, and two drain terminals,
A transistor having a source terminal, a transmission line connected between two drain terminals of the transistor and having a length of at least 1/2 of the wavelength of the one high-frequency signal, and the one high-frequency wave on the transmission line. A signal obtained by mixing the other high-frequency signal source supplied from the other high-frequency signal source with the other high-frequency signal source connected to a position where the standing wave of the signal is substantially minimized. Is taken out in the middle of the transmission line or from the source terminal of the transistor.