JPH06236415A - Scheduling method for processing operation in semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To provide a scheduling method capable of evading the same kind of computation from being concentrated in the same control step. CONSTITUTION:This method is the scheduling method to perform the design of a semiconductor integrated circuit in which temporal partial order relation is regulated between arithmetic processings performed in either control step and a control step directly following the control step within a range of supplied number of control steps, and the arithmetic processing is allocated to each control step one by one within a range of allocatable number (c)(steps S2, S3). The arithmetic processing in which a degree of freedom of allocation is not reduced is selected (steps S4, S5). When the arithmetic processing of unallocatable kind within the allocatable number occurs, the allocatable number is increased by one (step S6), and the allocation of remaining arithmetic processing without being allocated is repeated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention provides a total number of control steps to be sequentially executed in a semiconductor integrated circuit,
A semiconductor integrated circuit is designed in the case where a temporal partial order relation is defined between the arithmetic processing performed in any control step and the arithmetic processing performed in the control step subsequent to the control step. Scheduling method for.

[0002]

2. Description of the Related Art Conventionally, in this type of scheduling method, when a schedule is determined, the time and the number of arithmetic units required to realize a series of processing procedures according to the determined schedule are determined. Therefore, the scheduling method influences the processing speed and scale of the semiconductor integrated circuit to be synthesized.

A typical scheduling method for allocating a series of operations to a finite number of control steps is "P. Gee. Paulin and J. Pee. Knight's "Force Directed Scheduling for ASIC's Behavioral Synthesis," June 1989, IEEE Report on CAD, Volume 8, Issue 6 (PG Paulin and
J. P. Knight, "Force-Directe"
d Scheduling for the Behav
ioral Synthesis of ASIC '
s "IEEE Transactions on CAD,
VOL. 8 NO. 6, June 1989. ) ”Is a force-directed scheduling method. The force-directed scheduling method is a method of reducing the number of finally required arithmetic units based on the existence probability distribution of arithmetic operations at each control step.

[0004]

When assigning a series of operations to a given finite number of control steps, it is important to keep the maximum value of the number of operations assigned to each control step small. In the directed scheduling method, an operation in which a control step is determined in an early stage of allocation may limit a control step to which an operation left behind may be assigned, and the operation may be concentrated in the same control step. Since the final required arithmetic unit is the maximum value of the number of arithmetic units assigned to each control step, if the same type of arithmetic operations are concentrated in the same step, the required number of arithmetic units will increase. .

In view of the above problems, it is an object of the present invention to provide a scheduling method that avoids concentration of the same type of operations in the same control step.

[0006]

A scheduling method according to the present invention comprises a calculation process performed in any control step within the range of a given control step to be sequentially executed as time passes, and the control step. In a scheduling method for designing a semiconductor integrated circuit in which a temporal partial order relation is defined between the arithmetic processing to be performed in the control step subsequent to and the arithmetic processing to be performed in the same control step among the arithmetic processing. There is an allocation procedure for distributing the arithmetic processing to each control step so that the number of arithmetic processing of the same type is minimized.

Preferably, in the allocation procedure, operations of the same type are maintained in the order of not decreasing the degree of freedom of the allocation while maintaining the partial order relation, and within the range of a given allocatable number. Each operation is allocated to the control step, and when an operation of a type that cannot be allocated occurs in the range of the allocatable number, the allocatable number is increased by 1, and the allocation of the remaining unallocated operations is repeated. It is also preferable that the initial value of the allocatable number given in the above-mentioned allocation procedure is 1.

[0008]

In the assigning procedure, the operations that can be assigned to the control steps to which the operations are not assigned are always assigned so that the operations are not concentrated on the same control step. Further, by selecting an allocation that minimizes the reduction in the degree of freedom of calculation from the possible allocations, the distribution of operations can be made as free as possible without limiting the degree of freedom at an early stage of allocation.

[0009]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram showing a schedule determination system to which an embodiment of the scheduling method of the present invention is applied. The input device 101 receives instructions regarding a given number of control steps and a series of operations to be processed. The schedule determination device 102 determines in which control step each operation to be processed should be performed. The result output device 103 displays the schedule determined by the schedule determination device 102 on the display device 104.

FIG. 2 is a data flow graph schematically showing a specific example of a series of operations to be processed, which is given to the input device 101 of FIG. Nodes indicated by circles represent operations, and symbols in the circles represent types of operations. For example, "*"
Indicates multiplication, “+” indicates addition, “−” indicates subtraction, and “>” indicates comparison. The numbers on the sides of the circle represent the operation numbers. In addition, the directed edge is a variable that is output by the partial order relation regarding the control step and the calculation of the node that is the starting point of the directed edge, and is the variable that is the input of the node that is the end point of the directed edge.
That is, a certain calculation cannot execute its own calculation until the calculation immediately before the preceding calculation is completed. FIG. 3 is a tabular diagram for explaining how each operation is arranged in the control steps 1 to 4 given the relationship of FIG. 2 to determine the schedule. Each calculation shall be executed in one control step.

Therefore, each operation must be performed within the control steps shaded in FIG. That is, one column represents one operation, and the shaded row in that column represents the control step to which the operation can be assigned. The number of shaded sections in a certain column indicates the degree of freedom of calculation corresponding to that column. The total degree of freedom is the total number of shaded sections in FIG. 3, and in the example of FIG. 3, the total degree of freedom is 21.

The total degree of freedom described above decreases as the schedule is determined. For example, if the multiplication 8 in FIG. 3 is assigned to the control step 3, the addition 9
Is assigned to control step 4, so multiplication 8 and addition 9 each reduce the degree of freedom by 2 and the total degree of freedom is reduced by 4 from 21 to 17.

Hereinafter, a set of an operation whose control step to be assigned is not determined and a control step to which the operation can be assigned without breaking the defined partial order relation is called an assignment set. A set of assignments indicating that l is assigned to the control step l will be represented as (operation 1, control step l).

In this embodiment, when selecting a set of allocations, the allocation with the smallest decrease in the total degree of freedom is selected preferentially. However, the limit of the number of operations of the same type (for example, multiplication) that can be assigned to the same control step (hereinafter, referred to as the allocatable number) is set, and the allocation beyond this is not performed. However, only when the allocatable number cannot be allocated unless the allocatable number is increased, the allocatable number is sequentially increased by 1 and allocation is performed again. This will be described with reference to FIGS. 2 and 3.

First, the allocatable number is set to 1. In this initial state, there are 2l combinations of allocations, and no matter which allocation group is selected, the number of allocations does not exceed the number that can be allocated. Among them, the set of allocations that has the smallest reduction in the total sum of degrees of freedom is (multiplication 1, control step 1), (multiplication 2, control step 1), (multiplication 3, control step 2), (subtraction 4, control step 3). ), (Subtraction 7, control step 4). It should be noted that the reduction in the total degree of freedom when performing any one of these allocations is zero. When there are a plurality of allocations with the smallest decrease in the total degree of freedom as in this example, an arbitrary one is selected. Here, the allocation of (multiplication 1, control step 1) is selected.

After determining this assignment, there are 20 remaining sets of assignments. However, among these, (multiplication 2, control step 1), (multiplication 5, control step 1),
As for the allocation of (multiplication 8, control step 1), one multiplication has already been allocated to the control step l, and if any of these allocations is performed, the allocation exceeds the allocatable number of l. Do not select the allocation set of. Therefore, there are 17 allocations that do not exceed the limit of the allocatable number. Of these, there are three types of allocations with the smallest reduction in the total degree of freedom: (multiplication 3, control step 2), (subtraction 4, control step 3), (subtraction 7, control step 4). Select from. Here, the allocation of (multiplication 3, control step 2) is selected.

Similarly, the allocation of (subtraction 4, control step 3) and (subtraction 7, control step 4) is selected. In the state bear that has completed the above assignment, there are 17 remaining sets of assignments. Of these, allocations that do not exceed the limit of the allocatable number are (multiplication 6, control step 3), (multiplication 8, control step 3), (addition 9, control step 2), (addition 9, control step 3), ( Addition 9, control step 4), (addition l0, control step 1), (addition l0, control step 2), (addition l0, control step 3), (comparison operation l1, control step 2),
(Comparison calculation l1, control step 3), (Comparison calculation l1,
There are 11 ways of control step 4). Of these, the allocation with the smallest decrease in the total degree of freedom is (multiplication 6, control step 3). The reduction in the total degree of freedom when this allocation is performed is l.

At this time, even if the multiplication 6 is assigned to the control step 2, the partial order relation among the operations 5, 6 and 7 is not broken. However, since one multiplication is already assigned to control step 2, multiplication 6 is assigned to control step 3 without being assigned to control step 2. As described above, in the present embodiment, since the same type of calculation is assigned to each control step as much as possible one by one, it is possible to avoid concentration of the same type of calculation in one control step, and it is finally necessary. It is possible to reduce the number of special arithmetic units.

Similarly, (addition 9, control step 4), (addition l0, control step l), (comparison operation l)
1, the allocation of control step 4) is selected. After the above allocation, the remaining allocation pairs are (multiplication 2, control step 1), (multiplication 5, control step 1), (multiplication 5, control step 2), (multiplication 8, control step 1). ), (Multiplication 8, control step 2), (multiplication 8,
There are 6 types of control step 3). However, the allocation of these multiplications exceeds the limit of the allocatable number of 1 and therefore cannot be allocated. in this way,
If there is an operation for which the control step to be assigned is not determined and there is no set of assignments that does not exceed the allocatable number (in the present case, the allocatable number 1), add 1 to the allocatable number. (In the present case, the allocation number is 2). At this time, the above-mentioned six sets of allocations do not exceed the limit of the allocatable number in any allocation. Therefore, of these six ways, the assignment of (multiplication 2, control step 1) that causes the smallest decrease in the total degree of freedom is selected. Similarly, (multiplication 5, control step 2),
Select the allocation in the order of (multiplication 8, control step 3),
As shown in FIG. 4, arithmetic processing is arranged in each control step, and the schedule determination processing ends.

Next, the general operation of the schedule determination device 102 of FIG. 1 will be further described with reference to the flowchart of FIG. However, each symbol represents the following.

I .. Calculation number j .. Calculation type number k .. Control step number f (i) .. Calculation shown by number i The number of operations of the same type assigned to the same control step x _jk ... The number of operations of the jth type assigned to the kth control step (i, j ) ... A set of assignments that assigns the operation of the number i to the control step k, first set c = 1 and x _jk for all j, k
Is set to 0 (step S1). It is determined whether or not there is an operation for which the control step to be assigned is not determined (step S2). If there is an operation for which the control step to be assigned has not been determined, further x
_It is determined whether or not there is an assignment set (i, k) such that _{f (i) k} ≦ c (step S3). if x f _{(i) k} ≦ c becomes allocation set (i, k) are present, with respect to x f _{(i) k} ≦ c becomes the set of all assignments (i, k), selects the assignment Calculate the reduction of the degree of freedom when
4) From among them, the set of assignments with the smallest reduction in the degree of freedom is selected, and the selected set of assignments (i,
For k), l is added to xf _{(i) k} (step S5), and the process returns to step S2.

In step S3, there is an operation for which the control step to be assigned is not determined, and x _{f (i) k}
When there is no allocation set (i, k) such that ≦ c,
l is added to c (step S6), the process returns to step S1,
The above process is repeated. In step S2, when there is no calculation for which the control step to be assigned has not been determined, the schedule determination process ends.

[0023]

As described above, according to the present invention, the number of the same arithmetic processing distributed to the same control step is minimized, so that the arithmetic unit can be minimized by matching the minimum number. Further, since there is a procedure in which the same type of calculation is assigned to each control step as much as possible, concentration of calculations on the same control step is avoided. Furthermore, when there are multiple operations that can be assigned to a control step, priority is given to assignments that reduce the degree of freedom in computation as much as possible, thereby limiting the degree of freedom in computation at an early stage of assignment. It is possible to positively prevent the calculation from being gathered in the same step. As is clear from these facts, the present invention can provide a scheduling method that can avoid the concentration of computations in the same control step and keep the number of computing units finally required low.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schedule determination system to which an embodiment of a scheduling method of the present invention is applied.

FIG. 2 is a data flow graph schematically showing a specific example of a series of operations to be processed given to the input device of FIG.

FIG. 3 is a diagram showing the data flow graph of FIG. 2 in tabular form including degrees of freedom.

FIG. 4 is a diagram showing, in a tabular form, a result in which each operation shown in the data flow graph of FIG. 2 is distributed to each control step according to the embodiment of the present invention.

FIG. 5 is a flowchart showing an embodiment of the scheduling method of the present invention.

[Explanation of symbols]

 101 Input Device 102 Schedule Determination Device 103 Result Output Device 104 Display Device S1 to S6 Steps

Claims (3)

[Claims] 1. A design of a semiconductor integrated circuit in which a total number of control steps to be sequentially executed over time is given, and a temporal partial order relation is defined for arithmetic processing executed in the control steps. In the scheduling method for carrying out the method, the method further comprises an allocation procedure for distributing the arithmetic processing to each control step so that the number of arithmetic processing of the same type executed in the same control step is minimized. Scheduling method. 2. In the assigning procedure, the same type of operations are performed in the order in which the degree of freedom of the allocation is not reduced while maintaining the partial order relation, and within a given assignable number range. 3. When each operation is allocated to a step, and when an operation of a type that cannot be allocated occurs within the range of the allocatable number, the allocatable number is increased by 1 and the allocation of the remaining arithmetic operations is repeated. The described scheduling method. 3. The scheduling method according to claim 1, wherein the initial value of the allocatable number given in the allocation procedure is 1.