JPH06232936A - Frequency stabilizing device in radio phase shift modulation type communication equipment - Google Patents

Abstract

PURPOSE:To provide the frequency stabilizing device able to reduce power consumption. CONSTITUTION:The device is provided with latch circuits 4, 5 latching a phase error of the output of an error integration circuit 2, a subtractor circuit 6 receiving each output of the latch circuits 4, 5 and outputting the difference of the inputs, and a changeover switch 8 selecting an output of a phase frequency conversion circuit 3 or the output of a frequency correction circuit 7 and outputting the selected output between reception slots and for other slots. When the changeover switch 8 selects the output of the frequency correction circuit 7, no power is supplied to the receiver.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency stabilizing device, and more particularly to a frequency stabilizing device in a time division multiplex digital cellular system.

[0002]

2. Description of the Related Art The TDMA method is adopted as one method of digital cellular systems. The frequency stabilization technique that has been performed up to now in this TDMA system is shown below.

FIG. 3 is a diagram showing a configuration of a conventional frequency stabilizer, which is a phase error measuring circuit 301 for inputting a received signal and outputting phase error information, and a phase error for inputting and integrating the phase error information. An integrating circuit 302, a phase frequency converting circuit 303 that inputs the output of the phase error integrating circuit 302 and converts it into a frequency error, and a frequency control circuit 309 that controls the frequency by the output of the phase frequency converting circuit 303. .

Next, the operation of the conventional frequency stabilizing device shown in FIG. 3 will be described.

The received signal that has been π / 4DQPSK modulated is always input and converted into a phase error in the phase error measuring circuit 301. The converted phase error signal is integrated in the phase error integration circuit 302. When the receiver has a frequency error with respect to the received signal, the phase error integrating circuit 302 outputs the phase error information. Phase frequency conversion circuit 30
In 3, the phase error information is converted into frequency error information and output to the frequency control circuit 309. Frequency control circuit 3
At 09, frequency control is performed according to the input frequency error information.

[0006]

In the above-mentioned conventional frequency stabilizing device for matching the frequency of the receiver with the frequency of the receiving signal, a highly stable frequency can be obtained unless the receiving state is set in the slots other than the receiving slot. You have no control. For this reason, when frequency control is always performed, the power supply of the receiving circuit must be kept in the ON state at all times, which causes a problem that power consumption increases.

The present invention has been made in view of the problems of the above-described conventional technique, and an object of the present invention is to realize a frequency stabilizing device capable of reducing power consumption.

[0008]

A frequency stabilizing device in a phase shift modulation type wireless communication device of the present invention is a frequency stabilizing device for communicating a signal modulated by the phase shift modulation system in a time division multiplex system. In the digitizing device, a phase error side determining circuit that measures a phase error between a received signal and a symbol point in a reception slot period, a phase error integrating circuit that integrates the output of the phase error measuring circuit, and an output of the phase error integrating circuit. Phase frequency conversion circuit for converting frequency error, power supply circuit for supplying power to the phase error measurement circuit, phase error integration circuit and phase frequency conversion circuit, and change for detecting change amount of output of the phase error integration circuit An amount detection circuit, a frequency correction circuit that predicts a frequency correction amount between the reception slots using the output of the change amount detection circuit, and the phase frequency Each of the output of the conversion circuit and the output of the frequency correction circuit is input, the phase frequency conversion circuit output is selected during the reception slot period, and the frequency correction circuit output is selected between the reception slots and output to the output terminal. Together with a changeover switch that outputs a power supply signal indicating the current selection state to the power supply circuit, and a frequency control circuit that performs frequency control according to the output of the changeover switch, the power supply circuit, the changeover switch When a power supply signal indicating that the output of the frequency correction circuit is selected is input, power is not supplied to the phase error measuring circuit, the phase error integrating circuit, and the phase frequency converting circuit.

According to another aspect of the present invention, there is provided a frequency stabilizing device for a phase shift modulation type wireless communication device, which is a frequency stabilizing device for a radio communication device for communicating a signal modulated by the phase displacement modulation system by time division multiplexing. , A phase error side determining circuit that measures a phase error between a received signal and a symbol point in a reception slot period, a phase error integrating circuit that integrates the output of the phase error measuring circuit, and an output of the phase error integrating circuit is a frequency error. Of the phase error converting circuit, a power supply circuit for supplying power to the phase error measuring circuit, the phase error integrating circuit and the phase frequency converting circuit, and a change amount detecting means for detecting the change amount of the output of the phase error integrating circuit. A circuit, a frequency correction circuit that predicts a frequency correction amount between the reception slots using the output of the change amount detection circuit, and the phase frequency Each of the conversion circuit output and the output of the frequency correction circuit is input, the phase frequency conversion circuit output is selected during the reception slot period, and the frequency correction circuit output is selected between the reception slots and output to the output terminal. A changeover switch and a frequency control circuit for performing frequency control according to the output of the changeover switch are provided, and the power supply circuit is connected to the phase error measuring circuit, the phase error integrating circuit and the phase frequency converting circuit between receiving slots. The feature is that the power supply is not performed.

A frequency stabilizing device in a phase shift modulation type wireless communication device according to still another aspect of the present invention is a frequency stabilizing device for communicating a signal modulated by the phase shift modulation system in a time division multiplex system. In the device,
A phase error determining circuit that measures a phase error between a received signal and a symbol point in a reception slot period, a phase error integrating circuit that integrates the output of the phase error measuring circuit, and a frequency error conversion of the output of the phase error integrating circuit. A phase frequency conversion circuit, a power supply circuit that supplies power to the phase error measurement circuit, the phase error integration circuit, and the phase frequency conversion circuit, and a change amount detection circuit that detects the change amount of the output of the phase error integration circuit. , Inputting each of the output of the phase frequency conversion circuit and the output of the change amount detection circuit, selecting the output of the phase frequency conversion circuit during the reception slot period, and selecting the change amount detection circuit between the reception slots. A changeover switch that outputs a power supply signal indicating the current selection state to the power supply circuit while outputting to the output terminal, and an output of the changeover switch The power supply circuit includes a frequency correction circuit that predicts a frequency correction amount using the frequency correction circuit and a frequency control circuit that performs frequency control according to the output of the frequency correction circuit. When the power supply signal indicating that the
Power is not supplied to the phase error measuring circuit, the phase error integrating circuit, and the phase frequency converting circuit.

According to still another aspect of the present invention, there is provided a frequency stabilizing device in a phase shift modulation type wireless communication device, wherein a frequency stabilizing device for communicating a signal modulated by the phase displacement modulation system in a time division multiplex system. In the device,
A phase error determining circuit that measures a phase error between a received signal and a symbol point in a reception slot period, a phase error integrating circuit that integrates the output of the phase error measuring circuit, and a frequency error conversion of the output of the phase error integrating circuit. A phase frequency conversion circuit, a power supply circuit that supplies power to the phase error measurement circuit, the phase error integration circuit, and the phase frequency conversion circuit, and a change amount detection circuit that detects the change amount of the output of the phase error integration circuit. Inputting each of the phase frequency conversion circuit output and the change amount detection circuit output, selecting the phase frequency conversion circuit output during the reception slot period, and selecting the change amount detection circuit output between the reception slots. A changeover switch for outputting to an output terminal, a frequency correction circuit for predicting a frequency correction amount using the output of the changeover switch, and the frequency correction circuit. A frequency control circuit that controls the frequency according to the output of the power supply circuit, and the power supply circuit does not supply power to the phase error measuring circuit, the phase error integrating circuit, and the phase frequency converting circuit between receiving slots. Is characterized by.

In any of the above cases, the change amount detection circuit has a subtraction circuit for detecting a difference in phase error between the first half and the second half of the reception slot period of the phase error output from the phase error integration circuit. May be

[0013]

In the receiving slot period when frequency stabilization is particularly important, the power supply circuit is supplied to the receiving circuit including the phase error measuring circuit, the phase error integrating circuit and the phase frequency converting circuit, and the receiving circuit output is The frequency is selected and frequency control based on this is performed. No power is supplied to the receiving circuit between the receiving slots, and frequency control is performed based on the output of the change amount detecting circuit.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

In FIG. 1, the frequency stabilizing apparatus of this embodiment comprises a phase error measuring circuit 1 for measuring a phase error from a symbol point of a signal input during a receiving slot period, and an output of this phase error measuring circuit 1. A phase error integrating circuit 2 that integrates the phase error integrating circuit 2, a phase frequency converting circuit 3 that converts the output of the phase error integrating circuit 2 into a frequency error, and a change amount detecting circuit 10 that detects the amount of change in the output of the phase error integrating circuit 2. A frequency correction circuit 7 for predicting a frequency correction amount between slots other than the receiving slot using the output of the change amount detection circuit 10.
, The output of the phase frequency conversion circuit 3 and the output of the frequency correction circuit 7 are input, the output of the preceding phase frequency conversion circuit 3 is selected and output between the reception slots, and the frequency correction circuit is input between slots other than the reception slot. 7, a changeover switch 8 for selecting and outputting the output, a frequency control circuit 9 for performing frequency control by the output of the changeover switch 8, the phase error measuring circuit 1, the phase error integrating circuit 2, and the phase frequency converting circuit 3 The power supply circuit 12 supplies power to the receiving circuit.

The change amount detection circuit 10 includes a latch circuit 4 for latching a first half phase error between receiving slots and a latch circuit 5 for latching a second half phase error between receiving slots.
And a subtraction circuit 6 for detecting the difference between the output of the latch circuit 4 and the output of the latch circuit 5.

Each element constituting this embodiment will be described below.

The function of one phase error measuring circuit is usually used also by the demodulator, and examples of the actual demodulator include a delay detector and a delay equalizer.
A phase error detection block in differential detection is shown in FIG.

In FIG. 2, the phase error measuring circuit 1 includes a counter 201, a symbol timing detecting circuit 202, latch circuits 203 and 204, and a subtracting circuit 2 which are provided within a broken line.
It is composed of 05.

The symbol timing detection circuit 202 synchronously detects the symbol clock included in the transmission signal from the base station and outputs the synchronous clock.

In π / 4DQPSK modulation, time t
Data is transmitted by changing the phase after one symbol period "T" from the phase at the time of 0, and the amount of phase change π / 4, 3π / 4, -π / 4, -3π / 4, Are assigned 00, 01, 10, and 11, respectively. The phase data is generated by the counter 201 that makes one rotation for one cycle of the input signal. The output of the counter 201 is latched by the latch circuit 203 as n-bit parallel data at the timing of the synchronous clock output from the symbol timing detection circuit 202. In addition, at this time, the latch circuit 204 uses the synchronous clock of one cycle before the latch circuit 2
The data latched in 03 is latched at the same time.
The outputs of these latch circuits 203 and 204 are input to the subtractor circuit 205, and the subtraction circuit 205 obtains the phase difference information of each input. Of the phase difference information, the upper 2 bits correspond to the phase information such as π / 4, 3π / 4, ... As described above, and the lower n-2 bits correspond to the phase error amount.

Phase error integrating circuit 2 Under normal white noise, when phase error 1 is integrated for a certain period of time, the integrated value is canceled by + and-and ideally becomes 0. However, when there is a frequency offset, The integrated value of the phase error is integrated in either + or-direction. The integrator used here integrates the input n-2 bits in a two's complement representation, and as a result, outputs CARRY / BORROW.

Phase Circulation Number Conversion Circuit 3 Data conversion from the output of the phase error integration circuit to a frequency control signal, and control data is output to the frequency control circuit based on the data. In the example shown in FIG. 2, the U / D counter 206 is used to convert the output of the phase error integrating circuit into a frequency control signal, and the A / D converter 207 is used in the circuit that outputs the control data to the frequency control circuit.
Is used.

Frequency correction circuit 7 The amount of change in the correction operation of the frequency error is detected between the reception slots, and the frequency correction pulse is output according to the detected amount.
The sign and magnitude of the amount of change in the accumulated frequency error per constant time are obtained, and either the positive correction output or the negative correction output is changed to supplement them, and the correction interval is changed.

A PLL circuit or a narrow band filter for synchronizing the reference carrier wave with the carrier wave component is provided at the subsequent stage of the circuit of this embodiment.
The respective outputs and intervals may be multiplied by a predetermined coefficient according to the characteristics of the circuit provided in the subsequent stage.

The frequency control circuit 9 is, for example, an oscillator whose frequency can be varied according to the control amount. Normally, PLL is applied, so PLL
The control is applied to the reference oscillator of.

Next, the operation of this embodiment will be described.

In FIG. 1, when the frequency of the receiver is matched with the frequency of the received signal of the time division multiplexing system, the signal received during the receiving slot period is input to the phase error measuring circuit 1 and the phase error from the symbol point is received. It is converted into information and output to the phase error integrating circuit 2.

When the received signal frequency and the receiver frequency do not match, the phase error integrated circuit 2 changes the phase error integrated value to either plus or minus.
The output of the phase error integration circuit 2 is converted into a frequency error in the phase frequency conversion circuit 3. Also, the phase error integration circuit 2
Is latched in the latch circuit 4 and the latch circuit 5 by the change amount detection signal Sck which rises only twice between the receiving slots.

The above change amount detection signal Sck is used by each of the latch circuits 4 and 5 to detect the amount of phase change at an arbitrary time during the reception slot period and to obtain the phase change per fixed time. .

The phase error integrated information output from the latch circuit 4 delayed by one pulse and the phase error integrated information output from the latch circuit 5 are input to the subtraction circuit 6. The subtraction circuit 6 detects the difference between the outputs of the latch circuit 4 and the latch circuit 5, and outputs the difference to the frequency correction circuit 7.

Here, the reception slot detection signal Ssc will be described. In the communication by TDMA, in order to recognize the time slots assigned to each other, in the transmitted slots, a predetermined position is known in advance. The data pattern of The receiving device detects the assigned time slot from this specific data pattern. A signal that maintains the "H" state only during the detected time slot is created and is used as the reception slot detection signal.

The frequency correction circuit 7 determines and outputs the frequency correction value between the receiving slots based on the information on the phase error difference. The output of the phase frequency conversion fixed path 3 and the output of the frequency correction circuit 7 are input to the changeover switch 8, respectively.

The changeover switch 8 is, in addition to the outputs of the phase frequency conversion fixed path 3 and the frequency correction circuit 7, the reception slot detection signal which is a signal for detecting the amount of change in the frequency converging operation between the reception slots. Ssc is input, and the reception slot detection signal Ssc is used to confirm whether the current reception slot period or the reception slot is in progress.

The changeover switch 8 selects the output of the phase frequency conversion circuit 3 and outputs it to the output terminal in the reception slot period, and outputs the output of the frequency correction circuit 7 in the reception slot period. Select and output to the output terminal. Further, the power supply control signal SPW indicating which input is currently selected is output to the power supply circuit 12.

In the power supply circuit 12, the phase error measuring circuit 1, the phase error integrating circuit 2, and the phase error integrating circuit 2 are input only when the power supply control signal SPW indicating that the changeover switch 8 selects the output of the frequency correction circuit 7 is input. Power is supplied to the receiving circuit composed of the phase frequency conversion circuit 3 through the power supply line PL.

The frequency control circuit 9 inputs the output of the changeover switch 8 and controls the frequency according to the input. Therefore, in the present embodiment, power is supplied to the receiving circuit including the phase error measuring circuit 1, the phase error integrating circuit 2 and the phase frequency converting circuit 3 during the receiving slot period when frequency control is particularly important. The frequency is stabilized by the output of the receiving circuit. In addition, the frequency is stabilized between the receiving slots based on the output of the change amount detecting circuit 10, but at this time, the receiving circuit is not supplied with power and the power consumption is reduced. ing.

In the above-described embodiment, the change-over switch 8 to which the reception slot signal SSC is input outputs the power supply signal SPW indicating the current selection state according to the content, and the content of the power supply signal SPW. The power supply circuit 12 determines the power supply state according to the above, but the power supply circuit 12 inputs the reception slot signal SSC and determines the power supply state according to the contents of the reception slot signal SSC. May perform only the switching operation without outputting the power supply signal SPW.

A correction circuit similar to the frequency correction circuit 7 is provided in the reception circuit, but a common correction circuit is provided between the changeover switch 8 and the frequency control circuit 9 in order to simplify the configuration. However, the configuration of the present invention is not limited to the embodiment described above.

Further, as the phase displacement modulation method, π / 4DQ
Although the description has been made assuming that the modulation is performed by the PSK modulation method, there are various other methods, such as QPSK modulation, as the phase displacement modulation method. The present invention can be applied to any of these phase displacement modulation methods, and the phase displacement modulation method is not particularly limited.

[0042]

Since the present invention is constructed as described above, it has the following effects.

Only during the receiving slot period, the receiving circuit including the phase error measuring circuit, the phase error integrating circuit and the phase frequency converting circuit is operated, and during the receiving slot period, frequency control is performed using the integrated value of the phase error by the receiving circuit. By performing the frequency control using the amount of change in the phase error of the receiving slot between the receiving slots, the receiving circuit operates only in the receiving slot period even if the frequency stabilizer is operated continuously. This has an effect that the power consumption of the receiving circuit can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing a phase error detection block in differential detection used in the embodiment shown in FIG.

FIG. 3 is a block diagram showing an example of a conventional frequency stabilizing device.

[Explanation of symbols]

 1 phase error measuring circuit 2 phase error integrating circuit 3 phase frequency converting circuit 4, 5, 203, 204 latch circuit 6, 205 subtracting circuit 7 frequency correcting circuit 8 changeover switch 9 frequency control circuit 10 change amount detecting circuit 12 power supply circuit 201 counter 202 symbol timing detection circuit 206 U / D counter 207 D / A converter Sck change amount detection signal Ssc reception slot detection signal SPW power supply control signal PL power supply line

Claims (5)

[Claims] 1. A frequency error measuring device for a radio communication device for communicating a signal modulated by a phase displacement modulation system in a time division multiplexing system, wherein a phase error for measuring a phase error between a received signal and a symbol point in a reception slot period. A side determination circuit, a phase error integration circuit that integrates the output of the phase error measurement circuit, a phase frequency conversion circuit that converts the output of the phase error integration circuit into a frequency error, the phase error measurement circuit, a phase error integration circuit, and A power supply circuit that supplies power to the phase frequency conversion circuit, a change amount detection circuit that detects the change amount of the output of the phase error integration circuit, and a frequency between the reception slots using the output of the change amount detection circuit. A frequency correction circuit for predicting a correction amount, each of the phase frequency conversion circuit output and the output of the frequency correction circuit are input, and the reception slot Between the phase frequency conversion circuit output and the reception slot, the frequency correction circuit output is selected and output to the output terminal, and a power supply signal indicating the current selection state is output to the power supply circuit. A switch and a frequency control circuit that performs frequency control according to the output of the changeover switch, wherein the power supply circuit receives a power supply signal indicating that the changeover switch selects the frequency correction circuit output. The frequency stabilizing device in the phase shift modulation type wireless communication device is characterized in that power is not supplied to the phase error measuring circuit, the phase error integrating circuit, and the phase frequency converting circuit when it is present. 2. In a frequency stabilizing device of a wireless communication device for communicating a signal modulated by a phase displacement modulation system in a time division multiplex system, a phase error for measuring a phase error between a received signal and a symbol point in a reception slot period. A side determination circuit, a phase error integration circuit that integrates the output of the phase error measurement circuit, a phase frequency conversion circuit that converts the output of the phase error integration circuit into a frequency error, the phase error measurement circuit, a phase error integration circuit, and A power supply circuit that supplies power to the phase frequency conversion circuit, a change amount detection circuit that detects the change amount of the output of the phase error integration circuit, and a frequency between the reception slots using the output of the change amount detection circuit. A frequency correction circuit for predicting a correction amount, each of the phase frequency conversion circuit output and the output of the frequency correction circuit are input, and the reception slot Select the output of the phase frequency conversion circuit, and select the output of the frequency correction circuit between the receiving slots and output to the output terminal, and a frequency control circuit for performing frequency control according to the output of the switch Wherein the power supply circuit does not supply power to the phase error measuring circuit, the phase error integrating circuit, and the phase frequency converting circuit between receiving slots. Frequency stabilizer in. 3. A frequency error measuring device for a frequency stabilizing device of a wireless communication device for communicating a signal modulated by a phase displacement modulation system in a time division multiplexing system, wherein a phase error for measuring a phase error between a received signal and a symbol point in a reception slot period. A side determination circuit, a phase error integration circuit that integrates the output of the phase error measurement circuit, a phase frequency conversion circuit that converts the output of the phase error integration circuit into a frequency error, the phase error measurement circuit, a phase error integration circuit, and A power supply circuit that supplies power to the phase frequency conversion circuit, a change amount detection circuit that detects a change amount of the output of the phase error integration circuit, and a phase frequency conversion circuit output and an output of the change amount detection circuit, respectively. Input, select the output of the phase frequency conversion circuit during the reception slot period, and select and output the change amount detection circuit between the reception slots. A switch that outputs to the terminal a power supply signal indicating the current selection state to the power supply circuit, a frequency correction circuit that predicts a frequency correction amount using the output of the switch, and a frequency correction circuit A frequency control circuit for performing frequency control according to the output, wherein the power supply circuit is configured to detect the phase error when a power supply signal indicating that the changeover switch selects the change amount detection circuit output is input. A frequency stabilizing device in a phase displacement modulation type wireless communication device, characterized in that power is not supplied to a measuring circuit, a phase error integrating circuit and a phase frequency converting circuit. 4. A phase error measuring device for a phase error between a received signal and a symbol point in a reception slot period in a frequency stabilizing device of a wireless communication device for communicating a signal modulated by a phase displacement modulation system by a time division multiplexing system. A side determination circuit, a phase error integration circuit that integrates the output of the phase error measurement circuit, a phase frequency conversion circuit that converts the output of the phase error integration circuit into a frequency error, the phase error measurement circuit, a phase error integration circuit, and A power supply circuit that supplies power to the phase frequency conversion circuit, a change amount detection circuit that detects a change amount of the output of the phase error integration circuit, and an input of each of the phase frequency conversion circuit output and the change amount detection circuit output Then, the output of the phase frequency conversion circuit is selected during the reception slot period, and the output of the change amount detection circuit is selected and output during the reception slot. A switch for outputting to a power terminal, a frequency correction circuit for predicting a frequency correction amount using the output of the switch, and a frequency control circuit for performing frequency control according to the output of the frequency correction circuit, The frequency stabilizing device in a phase shift modulation type wireless communication device, wherein the power supply circuit does not supply power to the phase error measuring circuit, the phase error integrating circuit, and the phase frequency converting circuit between receiving slots. 5. The frequency stabilizing device in the phase shift modulation type wireless communication device according to claim 1, wherein the change amount detecting circuit is a phase output from the phase error integrating circuit. A frequency stabilizing device in a phase shift modulation type wireless communication device, comprising a subtraction circuit for detecting a difference in phase error between the first half and the second half of an error receiving slot period.