JPH06232839A - Spread spectrum receiver - Google Patents

Spread spectrum receiver

Info

Publication number
JPH06232839A
JPH06232839A JP50A JP3952493A JPH06232839A JP H06232839 A JPH06232839 A JP H06232839A JP 50 A JP50 A JP 50A JP 3952493 A JP3952493 A JP 3952493A JP H06232839 A JPH06232839 A JP H06232839A
Authority
JP
Japan
Prior art keywords
signal
component
spread spectrum
difference component
positive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50A
Other languages
Japanese (ja)
Inventor
Haruo Sakata
晴夫 坂田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Faurecia Clarion Electronics Co Ltd
Original Assignee
Clarion Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Clarion Co Ltd filed Critical Clarion Co Ltd
Priority to JP50A priority Critical patent/JPH06232839A/en
Publication of JPH06232839A publication Critical patent/JPH06232839A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a spread spectrum(SS) receiver which is simply constituted and can provide signals with satisfactory C/N. CONSTITUTION:The output of a BPF 22 is impressed to a circuit composed of rectifiers 26 and 27 and bias resistors 28 and 29 for the rectifiers, a positive half wave f1 and a negative half wave f2 are provided, second modulated waves at frequencies 2f1 and 2f2 are provided by synthesizing those half waves at a differential amplifier 30, and those second modulated waves are impressed to a cyclic filter composed of adder circuits 31 and 32, delay lines 33 and 34 and gain control circuits 35 and 36. Those outputs pass respectively through gain control circuits 37 and 38 and limiters 39 and 40 and demodulated by FM demodulators 41 and 42, a difference is provided by a differential amplifier 43 and passes through a shaping circuit 44, and a data output signal 45 is provided. Loop transmission times tau1 and tau2 of respective cyclic filters are set to tau1=1/2f1 and tau2=1/2f2. Loop gains K1 and K2 are enlarged as much as possible although on the condition of K1<1 and K2<1 at the frequencies 2f1 and 2f2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はスペクトラム拡散方式に
よるスペクトラム拡散(以下、SSと記す)受信機に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum (hereinafter referred to as SS) receiver using a spread spectrum system.

【0002】[0002]

【従来の技術】図4はFM変調を第1変調に用いたSS
送信機の系統図であり、図5はSAWコンボルバを用い
たSS受信機の例であり、図6は変調方式の説明図であ
る。図4において、データ入力信号1は図6(a)の波
形図に示す2値(1,0)の振幅をとる。そして、デー
タ入力信号1をVOC(電圧制御発振器)2に加え図6
(b)に示すような2つの周波数f1,f2の時系列を
得る。
2. Description of the Related Art FIG. 4 shows an SS using FM modulation for the first modulation.
6 is a system diagram of a transmitter, FIG. 5 is an example of an SS receiver using a SAW convolver, and FIG. 6 is an explanatory diagram of a modulation system. In FIG. 4, the data input signal 1 has a binary (1,0) amplitude shown in the waveform diagram of FIG. Then, the data input signal 1 is added to the VOC (voltage controlled oscillator) 2 and
A time series of two frequencies f1 and f2 as shown in (b) is obtained.

【0003】PNコード(擬似ノイズコード)発生器4
で発生するPN信号(PN符号:図6(C”)に示す符
号列)により乗算回路3で図6(C”)のPN符号
‘0’を−1として乗算することで、図6(b)に示し
た周波数f1,f2の時系列は図6(c)に示す波形と
なる(図6(c’)の波形はその部分拡大図であり、図
6(c”)のPN符号列により極性が反転している)。
PN code (pseudo noise code) generator 4
6 (b) by multiplying the PN code '0' of FIG. 6 (C ") by -1 in the multiplication circuit 3 by the PN signal (PN code: code string shown in FIG. 6 (C")) generated in FIG. The time series of the frequencies f1 and f2 shown in () is the waveform shown in FIG. 6 (c) (the waveform of FIG. 6 (c ') is a partially enlarged view thereof, and the PN code string of FIG. 6 (c'') is used. The polarity is reversed).

【0004】図4で番号5で示されている構成部分は高
周波送信部であり局部発振器5−1の周波数をf0とす
れば周波数変換器(乗算回路5−2とBPF(バンドパ
スフィルタ)5−3で構成)で周波数(f0+f1)ま
たは(f0+f2)としてアンテナから放射する。
The component indicated by numeral 5 in FIG. 4 is a high frequency transmitter, and if the frequency of the local oscillator 5-1 is f0, a frequency converter (multiplier circuit 5-2 and BPF (bandpass filter) 5) is provided. -3) and radiate from the antenna as frequency (f0 + f1) or (f0 + f2).

【0005】図5において、番号6で示されている構成
部分は高周波受信部であり受信した高周波を増幅し周波
数変換を行ってSAWコンボルバ8を動作させるために
適合した周波数とする。なお、BPF7は高周波受信部
5からの出力から周波数f1またはf2の周波数の信号
を抽出する。
In FIG. 5, a component indicated by numeral 6 is a high frequency receiving section, which has a frequency suitable for operating the SAW convolver 8 by amplifying the received high frequency and performing frequency conversion. The BPF 7 extracts the signal of the frequency f1 or f2 from the output from the high frequency receiving unit 5.

【0006】SAWコンボルバ8の他端(入力)には、
固定発振器9(周波数(f0+f1)または(f0+f
2))の搬送波をPNコード発生器4’で図4のPNコ
ード発生器4と同じPN符号を発生させて乗算回路10
で極性変調しBPF11及び増幅器12を経た信号、を
加える。SAWコンボルバ8でBPF7の出力と増幅器
12の出力の相関出力を増幅器13で増幅し、HPF
(ハイパスフィルタ)14、包絡検波器15、及び比較
回路16を経てデジタル復調器17でデジタル復調し、
LPF18を経て出力データ19を得る。
At the other end (input) of the SAW convolver 8,
Fixed oscillator 9 (frequency (f0 + f1) or (f0 + f
The carrier wave of 2)) is generated by the PN code generator 4 ′ to generate the same PN code as the PN code generator 4 of FIG.
A signal that has been polarity-modulated with and passed through the BPF 11 and the amplifier 12 is added. The SAW convolver 8 amplifies the correlation output between the output of the BPF 7 and the output of the amplifier 12 by the amplifier 13, and outputs the HPF.
(High-pass filter) 14, envelope detector 15, and comparison circuit 16, and then digitally demodulated by digital demodulator 17,
Output data 19 is obtained via the LPF 18.

【0007】図5に示すSS受信機は基本的ではあるが
図4に示した送信機の構成に比べて複雑であり、また、
SAWコンボルバをキーデバイス(Key Device:主要構
成)として必要とするので装置の小型化に関しても一定
の制限があるという不都合があった。このような不都合
を解消するものとして、特開平2−69051号(発明
の名称「スペクトラム拡散装置」)で開示されたSS受
信機(図7)がある。
The SS receiver shown in FIG. 5 is basic, but is more complicated than the structure of the transmitter shown in FIG.
Since the SAW convolver is required as a key device (key device), there is a disadvantage that there is a certain limitation in miniaturizing the device. As a means for solving such inconvenience, there is an SS receiver (FIG. 7) disclosed in Japanese Patent Laid-Open No. 2-69051 (invention title "spread spectrum device").

【0008】図7において、番号6’で示されている構
成部分は高周波受信部であり、受信した高周波を増幅
し、固定発振器21と乗算回路20で差周波数f1また
はf2に変換しその出力をBPF22に加え、BPF2
2の出力を乗算回路23で2乗し信号cosω1tから信号c
os2ω1tに変換する。
In FIG. 7, the component indicated by reference numeral 6'is a high frequency receiver, which amplifies the received high frequency, converts it to a difference frequency f1 or f2 by the fixed oscillator 21 and the multiplication circuit 20, and outputs the output. BPF2 in addition to BPF22
The second output the multiplication circuit 23 squared signal cos .omega 1 t from the signal c
Convert to os2ω 1 t.

【0009】図8は図7の乗算回路23による周波数逓
倍の説明図であり、乗算回路23では信号cosω1tから
信号cos2ω1tが発生するので、図8(a)に示すPN
信号では極性がt=t1,t2,t3で反転している
が、図8(b)に示すように同一極性になると周波数が
2倍になる。次に、BPF24でS2の周波数2f1,
2f2を取り出しFMディスクリミネータ25で図8
(c)に示すようにデータ信号を復元する。このように
特開平2−69051号で開示されたSS受信機では簡
単な構成でデータ信号の復調を実現できる。
[0009] Figure 8 is an explanatory diagram of a frequency multiplier according to the multiplication circuit 23 in FIG. 7, the signal cos2ω 1 t is generated from the multiplier circuit 23 the signal cos .omega 1 t, PN shown in Figure 8 (a)
In the signal, the polarities are inverted at t = t1, t2, t3, but when the polarities are the same as shown in FIG. 8B, the frequency doubles. Next, in the BPF 24, the frequency 2f1 of S2,
2f2 is taken out, and it is shown in FIG.
The data signal is restored as shown in (c). As described above, the SS receiver disclosed in Japanese Patent Laid-Open No. 2-69051 can realize the demodulation of the data signal with a simple configuration.

【0010】[0010]

【発明が解決しようとする課題】しかしながら、上記特
開平2−69051号で開示されたSS受信機において
は構成は簡単であるが復調入力のS/Nが充分とれない
という問題点があった。
However, the SS receiver disclosed in Japanese Patent Laid-Open No. 2-69051 has a problem that the S / N of the demodulation input cannot be sufficiently obtained although the SS receiver has a simple structure.

【0011】本発明は簡単な構成で且つS/Nのよい信
号を得ることのできるSS受信機を提供することを目的
とする。
An object of the present invention is to provide an SS receiver having a simple structure and capable of obtaining a signal with good S / N.

【0012】[0012]

【課題を解決するための手段】上記の目的を達成するた
めに第1の発明によるスペクトラム拡散受信機は、スペ
クトラム拡散送信手段からのデータ信号が含まれた送信
信号を受信し該信号の差成分信号を得る差成分信号抽出
手段と、差成分信号から異なる周波数の成分信号を含む
時系列信号を得る周波数成分信号抽出手段と、時系列信
号から正負極成分信号を得る正負成分信号抽出手段と、
正負極成分信号の差成分信号を抽出する信号成分抽出手
段と、正負極成分信号の差成分信号と、該差成分信号を
前記異なる周波数に関係した伝達遅延時間だけ遅延させ
利得制御した結果とから合成信号を得る巡回型フィルタ
手段と、合成信号を振幅調整制御する振幅制御手段と、
振幅制御された合成信号を復調しデータ信号を得る復調
手段と、を有することを特徴とする。
In order to achieve the above object, a spread spectrum receiver according to a first aspect of the present invention receives a transmission signal including a data signal from a spread spectrum transmission means and receives a difference component of the signal. A difference component signal extracting means for obtaining a signal, a frequency component signal extracting means for obtaining a time series signal containing component signals of different frequencies from the difference component signal, and a positive / negative component signal extracting means for obtaining a positive / negative component signal from the time series signal,
From the signal component extraction means for extracting the difference component signal of the positive and negative component signals, the difference component signal of the positive and negative component signals, and the result of gain control by delaying the difference component signal by the transmission delay time related to the different frequency. A recursive filter means for obtaining a combined signal; an amplitude control means for controlling the amplitude of the combined signal;
Demodulation means for demodulating the amplitude-controlled composite signal to obtain a data signal.

【0013】第2の発明は上記第1の発明によるスペク
トラム拡散受信機において、巡回型フィルタ手段が、正
負極成分信号の差成分信号受信信号と、該差成分信号を
所定時間遅延し利得制御した信号とを加算し合成信号を
得る合成手段と、差成分信号を該信号の周波数2f1,
2f2に基づいたループの伝達時間だけ遅延させる遅延
手段と、利得kをk<1とするように制御して利得制御
信号を得る利得制御手段と、からなることを特徴とす
る。
In a second aspect of the present invention, in the spread spectrum receiver according to the first aspect of the present invention, the cyclic filter means delays the difference component signal received signal of the positive and negative polarity component signals and the difference component signal for a predetermined time and controls the gain. A synthesizing means for adding a signal to obtain a synthesized signal, and a difference component signal having a frequency 2f1,
It is characterized by comprising delay means for delaying the transmission time of the loop based on 2f2, and gain control means for controlling the gain k to be k <1 to obtain a gain control signal.

【0014】[0014]

【作用】上記構成により、第1の発明によるスペクトラ
ム拡散受信機は、差成分信号抽出手段によりスペクトラ
ム拡散送信手段からのデータ信号が含まれた送信信号を
受信し該信号の差成分信号を得て、周波数成分信号抽出
手段により差成分信号から異なる周波数の成分信号を含
む時系列信号を得る。そして、正負成分信号抽出手段に
より時系列信号から正負極成分信号を得て、信号成分抽
出手段により正負極成分信号の差成分信号を抽出し、巡
回型フィルタ手段により正負極成分信号の差成分信号
と、該差成分信号を前記異なる周波数に関係した伝達遅
延時間だけ遅延させ利得制御した結果とから合成信号を
得て、振幅制御手段により合成信号を振幅調整制御し、
復調手段により振幅制御された合成信号を復調しデータ
信号を得る。
With the above construction, the spread spectrum receiver according to the first invention receives the transmission signal containing the data signal from the spread spectrum transmission means by the difference component signal extraction means and obtains the difference component signal of the signal. A time-series signal containing component signals of different frequencies is obtained from the difference component signal by the frequency component signal extraction means. Then, the positive and negative component signal extracting means obtains the positive and negative component signals from the time series signals, the signal component extracting means extracts the difference component signal of the positive and negative component signals, and the cyclic filter means extracts the difference component signal of the positive and negative component signals. And a result of gain control by delaying the difference component signal by a transmission delay time related to the different frequency, and performing amplitude adjustment control of the combined signal by the amplitude control means,
A data signal is obtained by demodulating the combined signal whose amplitude is controlled by the demodulation means.

【0015】第2の発明は上記第1の発明によるスペク
トラム拡散受信機において、巡回型フィルタ手段が、合
成手段により正負極成分信号の差成分信号受信信号と、
該差成分信号を所定時間遅延し利得制御した信号とを加
算し合成信号を得て、遅延手段により差成分信号を該信
号の周波数2f1,2f2に基づいたループの伝達時間
だけ遅延させ、利得制御手段により利得kをk<1とす
るように制御して利得制御信号を得る。
According to a second aspect of the present invention, in the spread spectrum receiver according to the first aspect of the invention, the recursive filter means receives the difference component signal reception signal of the positive and negative component signals by the combining means.
The difference component signal is delayed by a predetermined time and added to the gain-controlled signal to obtain a composite signal, and the delay component delays the difference component signal by the transmission time of the loop based on the frequencies 2f1 and 2f2 of the signal to control the gain. The gain k is controlled by the means so that the gain k becomes k <1.

【0016】[0016]

【実施例】図1は本発明に基づくSS受信機の一実施例
の構成を示すブロック図であり、図2は本発明に基づく
SS受信機の他の実施例の構成を示すブロック図であ
り、図3は図1のSS受信機の各構成部分による出力信
号の波形図である。
1 is a block diagram showing the configuration of an embodiment of an SS receiver according to the present invention, and FIG. 2 is a block diagram showing the configuration of another embodiment of an SS receiver according to the present invention. 3 is a waveform diagram of an output signal from each component of the SS receiver of FIG.

【0017】〈実施例1〉図1において、6’は高周波
受信部でありその構成及び動作は図7に示した特開平2
−69051号で開示されたSS受信機の高周波受信部
6’と同様である(従って、20〜22も同様であ
る)。また、図1で、26,27は整流素子、28,2
9は整流素子バイアス付与抵抗、30は差動増幅回路、
31,32は加算回路、33,34は遅延回路、35〜
38は利得制御回路、39,40はリミッタであり振幅
制御手段に相当し、41,42はFM復調器、43は差
動増幅器であり信号成分抽出手段に相当し、44は整形
回路、45は出力信号(データ)である。なお、BPF
22は周波数成分信号抽出手段に相当し、乗算回路20
及び固定発振器21は差成分信号抽出手段を構成し、整
流素子26と整流素子バイアス付与抵抗、整流素子27
と整流素子バイアス付与抵抗29はそれぞれ正負成分信
号抽出手段を構成し、加算回路31、遅延回路33、及
び利得制御回路35、加算回路32、遅延回路34及び
利得制御回路36はそれぞれ巡回型フィルタを構成し、
FM復調器41,42、差動増幅器43及び整形回路4
4は復調手段を構成する。
<Embodiment 1> In FIG. 1, reference numeral 6'denotes a high-frequency receiving section, the construction and operation of which are shown in FIG.
It is the same as the high-frequency receiving unit 6'of the SS receiver disclosed in No. -69051 (and so is 20 to 22). Further, in FIG. 1, 26 and 27 are rectifying elements, and 28 and 2
9 is a rectifying element bias applying resistor, 30 is a differential amplifier circuit,
31 and 32 are adder circuits, 33 and 34 are delay circuits, and 35 to 35.
38 is a gain control circuit, 39 and 40 are limiters which correspond to amplitude control means, 41 and 42 are FM demodulators, 43 is a differential amplifier which corresponds to signal component extraction means, 44 is a shaping circuit and 45 is It is an output signal (data). In addition, BPF
Reference numeral 22 corresponds to a frequency component signal extracting means, which is a multiplication circuit 20.
The fixed oscillator 21 constitutes a difference component signal extracting means, and includes a rectifying element 26, a rectifying element bias applying resistor, and a rectifying element 27.
The rectifying element bias applying resistor 29 constitutes a positive / negative component signal extracting means, and the adder circuit 31, the delay circuit 33, the gain control circuit 35, the adder circuit 32, the delay circuit 34, and the gain control circuit 36 are cyclic filters. Configure and
FM demodulators 41 and 42, differential amplifier 43, and shaping circuit 4
Reference numeral 4 constitutes demodulation means.

【0018】図1で、受信した高周波を増幅し、固定発
振器21と乗算回路20で差周波数f1またはf2に変
換しBPF22の出力として、図3(a)に示すような
周波数f1,f2の時系列信号を得る。図3(a)でt
=t1,t3,…はPN符号で極性を反転する時刻であ
り、t=t2では周波数がデータによりf1からf2に
変化する(図6(b)参照)。
In FIG. 1, the received high frequency is amplified, converted to the difference frequency f1 or f2 by the fixed oscillator 21 and the multiplication circuit 20, and output as the output of the BPF 22 at the frequencies f1 and f2 as shown in FIG. 3A. Obtain a sequence signal. In FIG. 3 (a), t
= T1, t3, ... Are times at which the polarity is inverted by the PN code, and at t = t2, the frequency changes from f1 to f2 depending on the data (see FIG. 6B).

【0019】BPF22の出力を整流素子26,27と
整流素子のバイアス付与抵抗28,29からなる回路に
加えると、整流素子26では正の半波が、整流素子27
では負の半波が得られるのでそれらを差動増幅器30で
合成して図3(b)に示すような波形の信号(整流信
号)を得る。図3(b)の基本波は図3(d)に示すよ
うに周波数2f1と2f2の第2変調波となる。
When the output of the BPF 22 is applied to the circuit composed of the rectifying elements 26 and 27 and the bias applying resistors 28 and 29 of the rectifying elements, a positive half wave is generated in the rectifying element 26.
Since negative half-waves are obtained, they are combined by the differential amplifier 30 to obtain a signal (rectified signal) having a waveform as shown in FIG. The fundamental wave of FIG. 3 (b) becomes a second modulated wave of frequencies 2f1 and 2f2 as shown in FIG. 3 (d).

【0020】差動増幅器30の出力は加算回路31、遅
延線33及び利得制御回路35からなる巡回フィルタ及
び加算回路32、遅延線34及び利得制御回路36から
なる巡回フィルタに加える。ここで、加算回路31、遅
延線33及び利得制御回路35のループの伝達時間τ1
をτ1=1/2f1に設定し、加算回路32、遅延線3
4及び利得制御回路36のループの伝達時間τ2をτ2
=1/2f2に設定する。なお、巡回フィルタの利得K
1,K2は周波数2f1,2f2でK1<1,K2<1
であるが、できるだけ大きくして(1に近付けて)積分
効果をもたせ、巡回(ループ)による減衰率Knがデー
タ長で0.5程度になるように選ぶことが望ましい。
The output of the differential amplifier 30 is applied to a cyclic filter composed of an adder circuit 31, a delay line 33 and a gain control circuit 35 and a cyclic filter composed of an adder circuit 32, a delay line 34 and a gain control circuit 36. Here, the transmission time τ1 of the loop of the adder circuit 31, the delay line 33, and the gain control circuit 35.
Is set to τ1 = 1 / 2f1, and the adder circuit 32 and the delay line 3 are set.
4 and the loop transfer time τ2 of the gain control circuit 36 is τ2
= 1 / 2f2. Note that the gain K of the recursive filter is
1 and K2 have frequencies 2f1 and 2f2 and K1 <1 and K2 <1.
However, it is desirable to make it as large as possible (close to 1) to have an integration effect, and to select the attenuation rate K n due to the loop (loop) to be about 0.5 in data length.

【0021】加算回路31,32の出力はそれぞれ利得
制御回路37,38、リミッタ39,40を経て、FM
復調器41,42で復調し差動増幅器43で差をとり差
成分信号を得て整形回路44で波形を整形してデータ出
力信号45を得る。
The outputs of the adder circuits 31 and 32 are passed through gain control circuits 37 and 38 and limiters 39 and 40, respectively, and FM.
The demodulators 41 and 42 demodulate, the differential amplifier 43 takes a difference to obtain a difference component signal, and the shaping circuit 44 shapes the waveform to obtain a data output signal 45.

【0022】図3(e)は上述の差動増幅器30の出力
波形であり変調波を省略すると周波数2f1,2f2の
時系列信号となる。また、図3(f)は加算回路31の
出力波形であり、巡回フィルタにより周波数2f1の成
分が大きく周波数2f2の成分は小さくなる。さらに、
図3(g)は加算回路32の出力波形であり、巡回フィ
ルタにより周波数2f1の成分が小さく周波数2f2の
成分は大きくなる。
FIG. 3 (e) shows the output waveform of the differential amplifier 30 described above, which is a time-series signal having frequencies 2f1 and 2f2 when the modulating wave is omitted. Further, FIG. 3F shows the output waveform of the adder circuit 31, and the component of the frequency 2f1 is large and the component of the frequency 2f2 is small by the cyclic filter. further,
FIG. 3 (g) shows the output waveform of the adder circuit 32, and the component of frequency 2f1 is small and the component of frequency 2f2 is large due to the cyclic filter.

【0023】本実施例では図1で加算回路31〜FM復
調器41と加算回路32〜FM復調器42の2系統と
し、FM変調では利得制御回路37,38の出力信号を
それぞれリミッタ39,40で振幅一定にしてFM復調
器41,42に加えているが、これを1系統で構成して
もよい。なお、本実施例のように2系統で構成すれば差
動増幅器のS/Nが向上する。
In this embodiment, there are two systems of the adder circuit 31 to FM demodulator 41 and the adder circuit 32 to FM demodulator 42 in FIG. 1. In FM modulation, the output signals of the gain control circuits 37 and 38 are limiters 39 and 40, respectively. Although the amplitude is made constant and added to the FM demodulators 41 and 42, they may be configured by one system. It should be noted that the S / N ratio of the differential amplifier is improved by using two systems as in this embodiment.

【0024】〈実施例2〉図7は図1の巡回フィルタか
らの出力信号(周波数2f1,2f2)の復調にエンベ
ローブ検波器を用いる例であり、46,47はエンベロ
ーブ検波器、48は差動増幅器、49はLPF(ローパ
スフィルタ)、50は整形回路、51,52はバッファ
アンプ、53はトラップf1、54はトラップf2であ
る。
<Embodiment 2> FIG. 7 shows an example in which an envelope detector is used for demodulating the output signals (frequency 2f1, 2f2) from the cyclic filter of FIG. 1, 46 and 47 are envelope detectors, and 48 is differential. An amplifier, 49 is an LPF (low-pass filter), 50 is a shaping circuit, 51 and 52 are buffer amplifiers, 53 is a trap f1, and 54 is a trap f2.

【0025】なお、バッファアンプ51、トラップ5
3、バッファアンプ52及びトラップ54はそれぞれ振
幅制御手段を構成し、エンベローブ検波器46,47、
差動増幅器48、LPF49及び整形回路50は復調手
段を構成する。
The buffer amplifier 51 and the trap 5
3, the buffer amplifier 52 and the trap 54 respectively constitute amplitude control means, and the envelope detectors 46 and 47,
The differential amplifier 48, the LPF 49 and the shaping circuit 50 constitute demodulation means.

【0026】図7で、加算回路31、遅延線33及び利
得制御回路35からなる巡回フィルタの出力をバッファ
アンプ51とトラップ53(2f2の直列共振回路また
は2f1の並列共振回路)を通してエンベローブ検波器
46に加える。一方、加算回路32、遅延線34及び利
得制御回路36からなる巡回フィルタの出力をバッファ
アンプ52とトラップ54(2f1の直列共振回路また
は2f2の並列共振回路)を通してエンベローブ検波器
47に加える。
In FIG. 7, the output of the cyclic filter composed of the adder circuit 31, the delay line 33 and the gain control circuit 35 is passed through the buffer amplifier 51 and the trap 53 (2f2 series resonance circuit or 2f1 parallel resonance circuit) to the envelope detector 46. Add to. On the other hand, the output of the cyclic filter including the adder circuit 32, the delay line 34, and the gain control circuit 36 is applied to the envelope detector 47 through the buffer amplifier 52 and the trap 54 (2f1 series resonance circuit or 2f2 parallel resonance circuit).

【0027】エンベローブ検波器46,47の出力は図
3(f),(g)のエンベローブとなるので差動増幅器
48で差をとって図3(h)の出力波形信号(差成分信
号)を得る。そして、LPF49でノイズ成分をさらに
抑制する(ここで、LPF49は図6(a)に示した基
本波はそのまま通過させる)。
Since the outputs of the envelope detectors 46 and 47 are the envelopes of FIGS. 3F and 3G, the difference is taken by the differential amplifier 48 and the output waveform signal (difference component signal) of FIG. 3H is obtained. obtain. Then, the LPF 49 further suppresses the noise component (here, the LPF 49 allows the fundamental wave shown in FIG. 6A to pass as it is).

【0028】LPF49の出力は図3(i)に示す出力
波形信号となるがこれを整形回路50に加えて図3
(j)の波形(矩形信号)の出力を得る。また、図7で
巡回フィルタ以降を2系統としているのは実施例1の場
合と同様にS/Nの改善のためである。
The output of the LPF 49 becomes the output waveform signal shown in FIG. 3 (i).
The output of the waveform (rectangular signal) of (j) is obtained. Further, in FIG. 7, the reason why the recursive filter and thereafter are two systems is to improve the S / N as in the case of the first embodiment.

【0029】[0029]

【発明の効果】以上説明したように本発明のスペクトラ
ム拡散受信機によれば、スペクトラム拡散の第1変調信
号が周波数変調の場合にスペクトラム拡散受信機に巡回
フィルタを用いているので、簡単な構成で原信号をS/
Nよく復調することができる。
As described above, according to the spread spectrum receiver of the present invention, since the cyclic filter is used in the spread spectrum receiver when the first spread spectrum modulated signal is frequency modulated, a simple structure is obtained. The original signal with S /
N can be demodulated well.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に基づくスペクトラム拡散受信機の一実
施例の構成を示すブロック図である。
FIG. 1 is a block diagram showing the configuration of an embodiment of a spread spectrum receiver according to the present invention.

【図2】本発明に基づくスペクトラム拡散受信機の他の
実施例の構成を示すブロック図である。
FIG. 2 is a block diagram showing the configuration of another embodiment of the spread spectrum receiver according to the present invention.

【図3】図1のスペクトラム拡散受信機の各構成部分に
よる出力信号の波形図である。
FIG. 3 is a waveform diagram of an output signal from each component of the spread spectrum receiver of FIG.

【図4】FM変調を第1変調に用いたスペクトラム拡散
受信機の系統図である。
FIG. 4 is a system diagram of a spread spectrum receiver using FM modulation for the first modulation.

【図5】SAWコンボルバを用いたスペクトラム拡散受
信機の例である。
FIG. 5 is an example of a spread spectrum receiver using a SAW convolver.

【図6】変調方式の概要説明図である。FIG. 6 is a schematic explanatory diagram of a modulation method.

【図7】従来のスペクトラム拡散受信機の例である。FIG. 7 is an example of a conventional spread spectrum receiver.

【図8】図7の乗算回路による周波数逓倍の説明図であ
る。
8 is an explanatory diagram of frequency multiplication by the multiplication circuit of FIG.

【符号の説明】[Explanation of symbols]

20 乗算回路 21 固定発振器 22 BPF22(周波数成分信号抽出手段) 26,27 整流素子(正負成分信号抽出手段) 28,29 整流素子バイアス付与抵抗(正負成分信号
抽出手段) 30 差動増幅回路(信号成分抽出手段) 31,32 加算回路(巡回型フィルタ手段) 33,34 遅延回路(巡回型フィルタ手段) 35,36 利得制御回路(巡回型フィルタ手段) 39,40 リミッタ(振幅制御手段) 41,42 FM復調器(復調手段) 43 差動増幅回路(復調手段) 44 整形回路(復調手段)
20 Multiplier Circuit 21 Fixed Oscillator 22 BPF 22 (Frequency Component Signal Extracting Means) 26, 27 Rectifying Element (Positive / Negative Component Signal Extracting Means) 28, 29 Rectifying Element Biasing Resistance (Positive / Negative Component Signal Extracting Means) 30 Differential Amplifying Circuit (Signal Component) Extraction means) 31,32 Adder circuit (recursive filter means) 33,34 Delay circuit (recursive filter means) 35,36 Gain control circuit (recursive filter means) 39,40 Limiter (amplitude control means) 41,42 FM Demodulator (demodulation means) 43 Differential amplifier circuit (demodulation means) 44 Shaping circuit (demodulation means)

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 スペクトラム拡散送信手段からのデータ
信号が含まれた送信信号を受信し該信号の差成分信号を
得る差成分信号抽出手段と、 前記差成分信号から異なる周波数の成分信号を含む時系
列信号を得る周波数成分信号抽出手段と、 前記時系列信号から正負極成分信号を得る正負成分信号
抽出手段と、 前記正負極成分信号の差成分信号を抽出する信号成分抽
出手段と、 前記正負極成分信号の差成分信号と、該差成分信号を前
記異なる周波数に関係した伝達遅延時間だけ遅延させ利
得制御した結果から合成信号を得る巡回型フィルタ手段
と、 前記合成信号を振幅調整制御する振幅制御手段と、 前記振幅制御された合成信号を復調しデータ信号を得る
復調手段と、 を有することを特徴とするスペクトラム拡散受信機。
1. A difference component signal extracting means for receiving a transmission signal containing a data signal from a spread spectrum transmission means to obtain a difference component signal of the signal, and a component signal having a different frequency from the difference component signal. A frequency component signal extracting means for obtaining a sequence signal, a positive / negative component signal extracting means for obtaining a positive / negative component signal from the time series signal, a signal component extracting means for extracting a difference component signal of the positive / negative component signals, the positive / negative electrodes A difference component signal of the component signals, a cyclic filter means for obtaining a combined signal from the result of gain control by delaying the difference component signal by a transmission delay time related to the different frequency, and amplitude control for amplitude adjusting control of the combined signal A spread spectrum receiver comprising: a demodulation means for demodulating the amplitude-controlled combined signal to obtain a data signal.
【請求項2】 請求項1記載のスペクトラム拡散受信機
において、巡回型フィルタ手段が、正負極成分信号の差
成分信号受信信号と、該差成分信号を所定時間遅延し利
得制御した信号とを加算し合成信号を得る合成手段と、
前記差成分信号を該信号の周波数2f1,2f2に基づ
いたループの伝達時間だけ遅延させる遅延手段と、利得
kをk<1とするように制御して利得制御信号を得る利
得制御手段と、からなることを特徴とするスペクトラム
拡散受信機。
2. The spread spectrum receiver according to claim 1, wherein the recursive filter means adds a difference component signal reception signal of the positive and negative component signals and a signal whose gain is controlled by delaying the difference component signal for a predetermined time. Combining means for obtaining a combined signal,
From delay means for delaying the difference component signal by the transmission time of the loop based on the frequencies 2f1 and 2f2 of the signal, and gain control means for controlling the gain k so that k <1 to obtain a gain control signal. A spread spectrum receiver characterized in that.
JP50A 1993-02-03 1993-02-03 Spread spectrum receiver Pending JPH06232839A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50A JPH06232839A (en) 1993-02-03 1993-02-03 Spread spectrum receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50A JPH06232839A (en) 1993-02-03 1993-02-03 Spread spectrum receiver

Publications (1)

Publication Number Publication Date
JPH06232839A true JPH06232839A (en) 1994-08-19

Family

ID=12555438

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50A Pending JPH06232839A (en) 1993-02-03 1993-02-03 Spread spectrum receiver

Country Status (1)

Country Link
JP (1) JPH06232839A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109995332A (en) * 2011-09-27 2019-07-09 英特尔德国有限责任公司 System and method for calibrating sequential logic mismatch for envelope-tracking emission system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109995332A (en) * 2011-09-27 2019-07-09 英特尔德国有限责任公司 System and method for calibrating sequential logic mismatch for envelope-tracking emission system
CN109995332B (en) * 2011-09-27 2023-06-13 英特尔德国有限责任公司 System and method for calibrating timing mismatch for envelope tracking transmission system

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