JPH06232045A - Manufacture of crystalline substrate - Google Patents
Manufacture of crystalline substrateInfo
- Publication number
- JPH06232045A JPH06232045A JP4022014A JP2201492A JPH06232045A JP H06232045 A JPH06232045 A JP H06232045A JP 4022014 A JP4022014 A JP 4022014A JP 2201492 A JP2201492 A JP 2201492A JP H06232045 A JPH06232045 A JP H06232045A
- Authority
- JP
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- Prior art keywords
- crystal substrate
- substrate
- layer
- crystal
- gaas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はトランジスタ、レーザー
ダイオード、発光ダイオード、光ICなどの種々の半導
体素子を形成する場合等に用いられる結晶基板の製造方
法に関するものであり、特に第1の結晶基板上に、その
第1の結晶基板と格子定数および熱膨張係数が異なる第
2、3の結晶基板をヘテロエピタキシャル成長により形
成した場合における、前記格子定数および熱膨張係数の
差異に基づく種々の欠陥および格子歪を軽減除去した結
晶基板の製造方法に特徴を有する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a crystal substrate used for forming various semiconductor elements such as a transistor, a laser diode, a light emitting diode, and an optical IC, and more particularly to a first crystal substrate. Various defects and lattices based on the difference between the lattice constant and the thermal expansion coefficient when the second and third crystal substrates having the lattice constant and the thermal expansion coefficient different from the first crystal substrate are formed on the top by heteroepitaxial growth It is characterized by a method of manufacturing a crystal substrate from which strain is reduced and removed.
【0002】[0002]
【従来の技術】近年、例えばGaAs半導体結晶基板を
形成する際に、安価でより大きな結晶が容易に得られる
Si基板上に、ヘテロエピタキシャル成長法によりGa
As半導体結晶基板を形成する方法が試みられ、またこ
の方法により得られたGaAs半導体結晶基板を用いて
レーザダイオードなどの作製が試みられている。2. Description of the Related Art In recent years, for example, when forming a GaAs semiconductor crystal substrate, Ga is formed by heteroepitaxial growth on a Si substrate which is inexpensive and can easily obtain larger crystals.
A method of forming an As semiconductor crystal substrate has been tried, and a laser diode or the like has been tried to be manufactured using the GaAs semiconductor crystal substrate obtained by this method.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、上述の
方法で得られたレーザダイオードの寿命は、極端に短い
ものである。However, the lifetime of the laser diode obtained by the above method is extremely short.
【0004】その原因の主たるものは、GaAs半導体
結晶とSi半導体結晶基板の格子定数および熱膨張係数
の差異により、GaAs半導体結晶基板内に発生した転
位、およびその転位を素子の動作中に活性層に伝搬・増
殖させうる歪応力である。The main cause is the dislocation generated in the GaAs semiconductor crystal substrate due to the difference in the lattice constant and the thermal expansion coefficient between the GaAs semiconductor crystal and the Si semiconductor crystal substrate, and the dislocation generated in the active layer during the operation of the device. It is a strain stress that can propagate and multiply.
【0005】本発明は、このエピタキシャル成長層の転
位密度および歪応力をより減少させるものである。The present invention further reduces the dislocation density and strain stress of this epitaxial growth layer.
【0006】[0006]
【課題を解決するための手段】上記の課題を解決するた
めの本発明の結晶基板の製造方法は、第1の結晶基板上
に、その第1の結晶基板の格子定数および熱膨張係数と
異なる格子定数および熱膨張係数を有する第2の結晶基
板をその一部が前記第1の結晶基板面より離間した状態
で対向するように形成し、しかる後に第2の結晶基板上
に第3の結晶基板を成長する場合に、成長前のエッチン
グ工程において露呈した第1の結晶基板上に酸化珪素等
の前記第3の結晶基板が結晶成長しない被膜を形成し、
第3の結晶基板成長後もその第2、3の結晶基板の一部
が第1の結晶基板に対して離間した状態を保持するよう
にしたものである。A method for manufacturing a crystal substrate according to the present invention for solving the above-mentioned problems is different from the lattice constant and the thermal expansion coefficient of the first crystal substrate on the first crystal substrate. A second crystal substrate having a lattice constant and a thermal expansion coefficient is formed so as to face each other with a part of the second crystal substrate separated from the first crystal substrate surface, and then a third crystal is formed on the second crystal substrate. In the case of growing a substrate, a film such as silicon oxide which does not cause crystal growth of the third crystal substrate is formed on the first crystal substrate exposed in the etching process before the growth,
Even after the growth of the third crystal substrate, a part of the second and third crystal substrates is kept separated from the first crystal substrate.
【0007】[0007]
【作用】上記の製造方法により作成された結晶基板は、
第1と第2の基板の境界面付近に多数存在する転位部分
は除去され、かつ第2の結晶基板内の大きな歪応力は緩
和される。この状態で熱アニールを施すことにより、境
界面付近からの転位の増殖を受けることなく、第2の結
晶基板内の残留歪と高温状態の中で転位の移動・結合が
生じ転位を減少させることができる。The crystal substrate produced by the above manufacturing method is
A large number of dislocations existing near the boundary surface between the first and second substrates are removed, and large strain stress in the second crystal substrate is relaxed. By performing thermal annealing in this state, dislocations are not propagated from the vicinity of the interface and residual dislocations in the second crystal substrate and dislocations move / bond in high temperature state to reduce dislocations. You can
【0008】その後歪、欠陥が低減された第2の基板上
に第3の基板層を成長させることにより、さらに結晶性
の良い第3の結晶層が得られる。第3の結晶基板の成長
中に充分熱アニール効果が得られる場合には先の熱アニ
ールは省いても良い。しかし、この第3の結晶基板を成
長させる場合に、露呈した第1の結晶基板上に何も施さ
ない場合には、第3の結晶が第1の基板上にも成長され
ることになり、第1と2の基板の離間状態が保てなくな
る。実際、第1の結晶基板上には第2の結晶基板の端部
よりある一定距離をおいて、第3の結晶が成長しない領
域が現れるにもかかわらず、第2の基板がその端部にお
いて第1の基板と接合されることとなった。After that, a third crystal layer having better crystallinity is obtained by growing a third substrate layer on the second substrate having reduced strain and defects. If a sufficient thermal annealing effect can be obtained during the growth of the third crystal substrate, the previous thermal annealing may be omitted. However, when nothing is applied to the exposed first crystal substrate when growing the third crystal substrate, the third crystal is also grown on the first substrate, The separated state of the first and second substrates cannot be maintained. In fact, although a region where the third crystal does not grow appears at a certain distance from the edge of the second crystal substrate on the first crystal substrate, the second substrate is at the edge of the region. It will be joined to the first substrate.
【0009】この離間状態が損なわれると、第2と3の
基板内に、結晶成長後温度を室温に降下させる過程にお
いて新たに歪応力が形成されてしまい、素子を第3の基
板上に形成した場合にその素子の劣化を早めてしまう。
このために第2の基板上に第3の結晶を成長させる場合
に、第1の基板と第2、3の基板が接合されないよう
に、露呈した第1の基板上に例えば酸化珪素の被膜を形
成する。この結果第3の結晶成長後も第1と2の結晶基
板の離間状態は保たれる。If this separated state is impaired, strain stress is newly formed in the second and third substrates in the process of lowering the temperature after crystal growth to room temperature, and an element is formed on the third substrate. In that case, the deterioration of the element is accelerated.
Therefore, when growing a third crystal on the second substrate, a film of, for example, silicon oxide is formed on the exposed first substrate so that the first substrate and the second and third substrates are not joined. Form. As a result, the separated state between the first and second crystal substrates is maintained even after the third crystal growth.
【0010】すなわち本発明により、第2の結晶基板上
に第3の結晶基板を成長した後も、第3の結晶基板内に
おいて素子の動作を妨げる転位と歪応力の両方が低減で
きるため、その第3の基板上に良好な特性の素子が形成
できる。That is, according to the present invention, even after the third crystal substrate is grown on the second crystal substrate, both dislocations and strain stress that hinder the operation of the device in the third crystal substrate can be reduced. A device having excellent characteristics can be formed on the third substrate.
【0011】[0011]
【実施例】まず図1に示すように250μmの厚さのS
i半導体結晶基板1上に、従来公知の2段階成長法を用
いて0.2μm厚さのGaAsエピタキシャル層3を形
成した。その上に、GaAsとの間においてエピタキシ
ャル成長が可能であり、かつGaAsに対して選択エッ
チングが可能な、例えばAl0.7 Ga0.3 Asの選択エ
ッチング層2を0.5μm形成した。その選択エッチン
グ層2の上に、第2の結晶基板となるGaAs半導体基
板層3を1μmエピタキシャル成長させた。EXAMPLE First, as shown in FIG. 1, S having a thickness of 250 μm was used.
On the i semiconductor crystal substrate 1, a GaAs epitaxial layer 3 having a thickness of 0.2 μm was formed by a conventionally known two-step growth method. On top of that, a selective etching layer 2 of, for example, Al0.7Ga0.3As, which can be epitaxially grown with GaAs and which can be selectively etched with respect to GaAs, was formed to a thickness of 0.5 μm. On the selective etching layer 2, a GaAs semiconductor substrate layer 3 serving as a second crystal substrate was epitaxially grown by 1 μm.
【0012】次に、図2(a)に示すように所定の範囲
3aを残すように前記GaAs半導体結晶基板層3の表
面よりエッチングにより前記選択エッチング層2に達す
る切溝4を形成し、しかる後に、その切溝4を利用し、
AlGaAs系選択エッチング液、例えばふっ化水素溶
液を用いてAl0.7 Ga0.3 As選択エッチング層2の
み、一部エッチングにより除去し、図2(a)に平面
図、(b)に断面図を示すような、Si半導体結晶基板
1より部分的に離間し、かつ歪応力が緩和されたGaA
s半導体結晶基板層を得た。このような形状で部分的に
離反されたGaAs半導体結晶基板層内の歪を計算機シ
ミュレーションおよびフォトルミネッセンス測定により
評価した結果、離反させる以前のGaAs半導体結晶基
板層の歪と比べて広範囲において1/10以下に減少し
ていることがわかった。Next, as shown in FIG. 2 (a), a kerf 4 reaching the selective etching layer 2 is formed by etching from the surface of the GaAs semiconductor crystal substrate layer 3 so as to leave a predetermined range 3a. Later, using the kerf 4,
Partial etching is performed to remove only the Al0.7Ga0.3As selective etching layer 2 using an AlGaAs-based selective etching solution, for example, a hydrogen fluoride solution, and a plan view is shown in FIG. 2A and a sectional view is shown in FIG. As shown, GaA partially separated from the Si semiconductor crystal substrate 1 and strain stress is relaxed.
An s semiconductor crystal substrate layer was obtained. The strain in the GaAs semiconductor crystal substrate layer partially separated in such a shape was evaluated by computer simulation and photoluminescence measurement, and as a result, it was 1/10 in a wide range compared with the strain of the GaAs semiconductor crystal substrate layer before separation. It was found to be decreasing below.
【0013】この状態で800℃、10分熱アニールを
施した。熱アニール後の転位を調べるために透過電子顕
微鏡観察したところ、部分的に離反されたGaAs半導
体結晶基板3内では転位が観察されない領域も存在して
いることがわかった。またフォトルミネッセンス測定に
おいてもアニール前と比べ強度が大きく増加することが
わかった。In this state, thermal annealing was performed at 800 ° C. for 10 minutes. Observation with a transmission electron microscope to examine the dislocations after the thermal annealing revealed that there are some regions in which dislocations are not observed in the partially separated GaAs semiconductor crystal substrate 3. It was also found that the photoluminescence measurement showed a significant increase in strength compared to before annealing.
【0014】その後、図3の断面図に示すように部分的
に離間されたGaAs半導体結晶基板3以外の露呈した
Si基板1上にフォトレジストによるリフトオフ法にて
蒸着SiO2 被膜層6をおよそ500オングストローム
形成した。その後減圧MOCVD(metalorganic chemi
cal vapor deposition)法にて離間された第2のGaA
s基板3上に第3の結晶基板となるGaAsエピタキシ
ャル層5を厚さ2μm再成長させた。この再成長後、G
aAs層とSi基板の離間状態を調べるために、走査電
子顕微鏡を用いてGaAs層3とSi基板1の境界部を
拡大観察した所、再成長後もGaAs層はSi基板に対
して離間した状態を保っていた。この時、このSiO2
を被膜しなかった場合は、第3のGaAs層成長後、第
2のGaAs層端部より一定距離を離してSi基板上に
多結晶GaAsが成長されていた。Thereafter, as shown in the cross-sectional view of FIG. 3, a vapor-deposited SiO2 coating layer 6 is formed on the exposed Si substrate 1 other than the partially separated GaAs semiconductor crystal substrate 3 by a lift-off method using a photoresist to about 500 angstroms. Formed. After that, reduced pressure MOCVD (metalorganic chemi
second GaA separated by cal vapor deposition method
The GaAs epitaxial layer 5 to be the third crystal substrate was regrown on the s substrate 3 to a thickness of 2 μm. After this regrowth, G
In order to investigate the separation state between the aAs layer and the Si substrate, the boundary part between the GaAs layer 3 and the Si substrate 1 was enlarged and observed using a scanning electron microscope. The GaAs layer was separated from the Si substrate even after regrowth. Was kept. At this time, this SiO2
In the case where the GaAs was not coated, the polycrystalline GaAs was grown on the Si substrate at a certain distance from the end of the second GaAs layer after the growth of the third GaAs layer.
【0015】すなわち第2のGaAs基板端部より一定
距離をおいた部分には多結晶GaAsが成長しない領域
が存在した。この現象は成長原料の横方向拡散としてす
でに良く知られている。この多結晶GaAsの成長しな
い領域があるにもかかわらず、成長後は第2、3のGa
As層とSi基板はその端部において接合されていた。
この成長後の第3のGaAs層内の歪を調べるためにフ
ォトルミネッセンス測定を行った所熱歪がさらに発生し
ていることがわかった。That is, there was a region where polycrystalline GaAs did not grow at a portion spaced from the end of the second GaAs substrate by a certain distance. This phenomenon is already well known as lateral diffusion of growth raw material. Even though there is a region where the polycrystalline GaAs does not grow, the second and third Ga are grown after the growth.
The As layer and the Si substrate were joined at their ends.
When photoluminescence measurement was performed to examine the strain in the third GaAs layer after the growth, it was found that thermal strain was further generated.
【0016】これに反してSiO2 被膜を行った場合に
は、再成長後の歪と結晶性を評価するためにフォトルミ
ネッセンス測定およびその像を観察したところ、歪は再
成長前と同様に1/10以下に減少したままで、発光強
度は10倍以上増加し半値幅も減少していた。さらにフ
ォトルミネッセンス像においても転位などによる暗点が
ほとんど観察されなかった。すなわち再成長後も大きく
歪が低減された状態を保ちながら、結晶性が格段に改善
されていることがわかった。On the contrary, when the SiO 2 film was formed, the photoluminescence measurement and its image were observed to evaluate the strain and crystallinity after the regrowth. The emission intensity was increased 10 times or more and the half-width was also decreased while it was decreased to 10 or less. Furthermore, dark spots due to dislocations were hardly observed in the photoluminescence image. That is, it was found that the crystallinity was remarkably improved while maintaining the state in which the strain was greatly reduced even after the regrowth.
【0017】しかる後に、従来公知の方法によってこの
上にレーザダイオード等の半導体素子を形成するもので
ある。また前記レーザダイオード等の半導体素子は第3
の結晶基板成長中に引き続いて形成しても良い。さらに
再成長中に熱アニール効果が充分期待される場合には熱
アニールは省略しても良い。また被膜材料はSi基板上
に形成して、GaAs再成長後、Si基板と分離された
GaAs層とSi基板の接合が阻止できるものであれば
SiO2 以外でも良い。Thereafter, a semiconductor element such as a laser diode is formed thereon by a conventionally known method. The semiconductor element such as the laser diode is the third
It may be formed continuously during the growth of the crystal substrate. Further, if a sufficient thermal annealing effect is expected during regrowth, thermal annealing may be omitted. Further, the coating material may be other than SiO2 as long as it can prevent the bonding between the GaAs layer separated from the Si substrate and the Si substrate after the GaAs is regrown after being formed on the Si substrate.
【0018】なお、結晶成長を阻止するための被膜6
は、従来からの結晶成長法の一つである選択成長法にお
いて用いられてきたもので良く、酸化珪素の他に、窒化
珪素、酸化アルミニュウムなどが知られている。The film 6 for preventing crystal growth
Can be used in the selective growth method which is one of the conventional crystal growth methods, and silicon nitride, aluminum oxide, etc. are known in addition to silicon oxide.
【0019】[0019]
【発明の効果】本発明によれば、第1の結晶基板上に、
格子定数および熱膨張係数の異なる第2、3の結晶基板
を成長する場合においても、第1の基板に対する第2の
基板の離間状態が保たれたまま第3の基板が成長でき、
第2の結晶基板よりさらに転位密度の少ないかつ歪応力
の少ない第3の結晶基板が得られ、その上に高品質の素
子を形成できるものである。According to the present invention, on the first crystal substrate,
Even when growing second and third crystal substrates having different lattice constants and coefficients of thermal expansion, the third substrate can be grown while keeping the separated state of the second substrate from the first substrate,
A third crystal substrate having a lower dislocation density and a lower strain stress than the second crystal substrate can be obtained, and a high quality element can be formed on the third crystal substrate.
【図1】本発明の実施例の結晶基板の製造方法の一工程
における結晶基板の断面図FIG. 1 is a sectional view of a crystal substrate in one step of a method for manufacturing a crystal substrate according to an embodiment of the present invention.
【図2】(a)は本発明の実施例の結晶基板の製造方法
の一工程における結晶基板の平面図 (b)は図2(a)のA−A線における断面図2A is a plan view of the crystal substrate in one step of the method of manufacturing a crystal substrate according to the embodiment of the present invention, and FIG. 2B is a sectional view taken along line AA of FIG. 2A.
【図3】本発明の実施例の結晶基板の製造方法の一工程
における結晶基板の断面図FIG. 3 is a cross-sectional view of the crystal substrate in one step of the method of manufacturing a crystal substrate according to the embodiment of the present invention.
1 Si基板 2 Al0.7 Ga0.3 As選択エッチング層 3 GaAsエピタキシャル層 4 エッチング溝部 5 GaAsエピタキシャル再成長層 6 SiO2 被覆層 1 Si substrate 2 Al0.7 Ga0.3 As selective etching layer 3 GaAs epitaxial layer 4 etching groove 5 GaAs epitaxial regrowth layer 6 SiO2 coating layer
Claims (2)
の格子定数および熱膨張係数と異なる格子定数および熱
膨張係数を有する第2の結晶基板を、その一部が前記第
1の結晶基板面より離間した状態で対向するように形成
し、その第1の結晶基板面より離間した第2の結晶基板
上に、第3の結晶基板を成長させる前の工程において、
露呈している前記第1の結晶基板上に前記第3の結晶基
板が結晶成長しない被膜を形成した後、第3の結晶基板
を成長せしめることを特徴とする結晶基板の製造方法。1. A second crystal substrate having a lattice constant and a thermal expansion coefficient different from the lattice constant and the thermal expansion coefficient of the first crystal substrate, a part of which is formed on the first crystal substrate. In a step before the third crystal substrate is grown on the second crystal substrate spaced apart from the first crystal substrate surface, the second crystal substrate and the second crystal substrate separated from the crystal substrate surface facing each other.
A method of manufacturing a crystal substrate, which comprises forming a film on which the third crystal substrate does not grow on the exposed first crystal substrate, and then growing the third crystal substrate.
の格子定数および熱膨張係数と異なる格子定数および熱
膨張係数を有する第2の結晶基板を、その第2の結晶基
板の上にさらに第3の結晶基板をそれぞれヘテロエピタ
キシャル成長させるに際し、前記第1の結晶基板上に前
記第1の結晶基板と第2の結晶基板に対して選択エッチ
ング可能な選択エッチング層を形成し、その選択エッチ
ング層の上に、第2の結晶基板を形成した後に、その第
2の結晶基板の表面から少なくとも前記選択エッチング
層まで届く切溝を形成し、その切溝を通して前記選択エ
ッチング層をエッチングにより除去して、前記第2の結
晶基板の一部が前記第1の結晶基板面より離間した状態
で対向するよう形成し、その第1の結晶基板面より離間
した第2の結晶基板上に、第3の結晶基板を成長させる
前の工程において、露呈している前記第1の結晶基板上
に前記第3の結晶基板が結晶成長しない被膜を形成した
後、第3の結晶基板をヘテロエピタキシャル成長せしめ
ることを特徴とする結晶基板の製造方法。2. A second crystal substrate, which has a lattice constant and a thermal expansion coefficient different from the lattice constant and the thermal expansion coefficient of the first crystal substrate, is formed on the first crystal substrate. Upon further heteroepitaxially growing the third crystal substrate, a selective etching layer capable of being selectively etched with respect to the first crystal substrate and the second crystal substrate is formed on the first crystal substrate. After the second crystal substrate is formed on the selective etching layer, a kerf extending from the surface of the second crystal substrate to at least the selective etching layer is formed, and the selective etching layer is etched through the kerf. A second crystal substrate that is removed and is formed so that a part of the second crystal substrate faces the first crystal substrate surface in a state of being separated from the first crystal substrate surface. In the step before growing the third crystal substrate, after forming a film on which the third crystal substrate does not grow on the exposed first crystal substrate, a third crystal substrate is formed. A method of manufacturing a crystal substrate, which comprises performing heteroepitaxial growth.
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JP2201492A JP2706592B2 (en) | 1992-01-10 | 1992-01-10 | Crystal substrate manufacturing method |
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JP2201492A JP2706592B2 (en) | 1992-01-10 | 1992-01-10 | Crystal substrate manufacturing method |
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JP2706592B2 JP2706592B2 (en) | 1998-01-28 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000091632A (en) * | 1998-09-14 | 2000-03-31 | Hewlett Packard Co <Hp> | Method for forming laminate structure with relaxed stress |
JP2001297990A (en) * | 2000-02-07 | 2001-10-26 | Motorola Inc | Edge grown heteroepitaxy |
-
1992
- 1992-01-10 JP JP2201492A patent/JP2706592B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000091632A (en) * | 1998-09-14 | 2000-03-31 | Hewlett Packard Co <Hp> | Method for forming laminate structure with relaxed stress |
JP2001297990A (en) * | 2000-02-07 | 2001-10-26 | Motorola Inc | Edge grown heteroepitaxy |
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JP2706592B2 (en) | 1998-01-28 |
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