JPH06225349A - Time-division switch circuit - Google Patents
Time-division switch circuitInfo
- Publication number
- JPH06225349A JPH06225349A JP1052293A JP1052293A JPH06225349A JP H06225349 A JPH06225349 A JP H06225349A JP 1052293 A JP1052293 A JP 1052293A JP 1052293 A JP1052293 A JP 1052293A JP H06225349 A JPH06225349 A JP H06225349A
- Authority
- JP
- Japan
- Prior art keywords
- transmission line
- time
- switching
- circuit
- transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Monitoring And Testing Of Exchanges (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はＣＣＩＴＴ勧告Ｇ．７８
３記載のＭＳＰ（Multiplex Section Protection）に規
定されている伝送路の切替系を有する装置、特に時分割
スイッチを有する装置に関する。The present invention relates to CCITT Recommendation G.G. 78
The present invention relates to a device having a transmission path switching system defined in MSP (Multiplex Section Protection) described in No. 3, particularly a device having a time division switch.
【０００２】[0002]
【従来の技術】ＣＣＩＴＴ勧告Ｇ．７８３による伝送路
切替方式においては１＋１切替系、１：ｎ切替系の各構
成の図（FIGURE A-1/G.783,FIGURE A-1/G.783）が記載
されている。個々の伝送路の切替構成のみを示している
が、複数の切替系構成を混在収容する装置、及び冗長構
成を有しない伝送路等を混在収容する装置の構成につい
ては述べられていない。2. Description of the Related Art CCITT Recommendation G. In the transmission path switching system according to 783, diagrams (FIGURE A-1 / G.783, FIG. A-1 / G.783) of 1 + 1 switching system and 1: n switching system are described. Although only the switching configuration of the individual transmission paths is shown, the configurations of the device that accommodates a plurality of switching system configurations in a mixed manner and the device that accommodates the transmission channels that do not have a redundant configuration in a mixed manner are not described.
【０００３】[0003]
【発明が解決しようとする課題】上記従来技術によれ
ば、個々の伝送路切替系を混在収容する場合に各々の切
替系制御に必要な切替回路を固定的に設けなければなら
ない。装置の設置条件などで伝送路の切替系を変更する
場合、回路変更が必要という問題がある。また、１：ｎ
切替系においては、現用伝送路ｎ本，予備伝送路１本で
構成し、現用伝送路故障時、予備系へ切替後、現用系が
復旧した際に現用系に再び切り戻す動作が必要となる。
その際に、伝送路に収容される信号が瞬断する可能性が
あるという問題がある。According to the above-mentioned prior art, when the individual transmission path switching systems are mixedly accommodated, the switching circuits necessary for controlling the respective switching systems must be fixedly provided. When changing the transmission line switching system depending on the installation conditions of the device, there is a problem that the circuit needs to be changed. Also, 1: n
The switching system is composed of n working transmission lines and one protection transmission line, and when the working transmission line fails, it is necessary to switch back to the working system when the working system is restored after switching to the protection system. .
At that time, there is a problem that a signal accommodated in the transmission path may be momentarily disconnected.
【０００４】[0004]
【課題を解決するための手段】上記目的を達成するため
に、入力伝送路，出力伝送路の現用／予備選択状態に対
応した切替を時分割スイッチ回路内部の伝送路番号を変
換するための変換回路を設けることによって行なう。入
力伝送路を切替る場合は、時分割スイッチ回路を制御す
るコントロールメモリ回路のデータの伝送路番号を変更
することにより行なう。出力伝送路を切替る場合は、時
分割スイッチ回路を制御するコントロールメモリ回路の
アドレスの伝送路番号を変更することにより行なう。In order to achieve the above object, a conversion for converting a transmission line number in a time division switch circuit is performed in accordance with a working / preliminary selection state of an input transmission line and an output transmission line. This is done by providing a circuit. The input transmission path is switched by changing the transmission path number of the data in the control memory circuit that controls the time divisional switch circuit. When switching the output transmission line, the transmission line number of the address of the control memory circuit for controlling the time divisional switch circuit is changed.
【０００５】[0005]
【作用】上記に示した時分割スイッチ回路より、個々の
切替系、及び切替系の混在収容する場合に対し、入力伝
送路，出力伝送路の現用／予備選択状態に対応した切替
を行なうことができる。また、入力伝送路，出力伝送路
に与えられた現用伝送路，予備伝送路の名称を伝送路の
切替とともに名称変更を行ない、切り戻し動作が不要と
なる。With the time-division switch circuit described above, it is possible to perform switching corresponding to the active / preliminary selection state of the input transmission line and the output transmission line in the case where individual switching systems and mixed switching systems are accommodated. it can. Further, the names of the active transmission path and the backup transmission path given to the input transmission path and the output transmission path are changed along with the switching of the transmission paths, and the switching back operation becomes unnecessary.
【０００６】[0006]
【実施例】実施例を図１より説明する。EXAMPLE An example will be described with reference to FIG.
【０００７】図１は本発明の時分割スイッチの一実施例
を示す構成図である。図１は入力，出力信号が４本の場
合を例として説明する。図１において、１〜４は入力信
号＃１〜＃４、５は入力信号を多重する多重部、６は多
重後の信号を任意のタイムスロットで読み出すために一
時格納するメモリ回路、７は時分割スイッチ後の信号を
分離する分離部、８〜１１は出力信号＃１〜＃４、１２
は切替動作が必要か否かを判定する切替検出部、１３は
切替検出部からの指示により時分割スイッチの接続状態
メモリ内の伝送路番号を変換する伝送路番号変換回路、
１４は伝送路番号を格納したメモリからの制御信号を多
重する多重部、１５はパス番号を格納したメモリから制
御信号を多重する多重部、１６〜１９はメモリ回路６の
タイムスロットの入れ替えを行なうための読み出しすべ
き入力信号＃１〜＃４の伝送路番号を格納したコントロ
ールメモリ回路、２０〜２３はメモリ回路６のタイムス
ロットの入れ替えを行なうための読み出しすべき入力信
号＃１〜＃４に対応したパス番号を格納したコントロー
ルメモリ回路である。FIG. 1 is a block diagram showing an embodiment of the time divisional switch of the present invention. In FIG. 1, the case where there are four input and output signals will be described as an example. In FIG. 1, 1 to 4 are input signals # 1 to # 4, 5 is a multiplexing unit for multiplexing the input signals, 6 is a memory circuit for temporarily storing the multiplexed signals for reading in arbitrary time slots, and 7 is a time Separation units for separating the signals after the division switch, 8 to 11 are output signals # 1 to # 4, 12
Is a switching detection unit that determines whether a switching operation is necessary, 13 is a transmission line number conversion circuit that converts the transmission line number in the connection state memory of the time divisional switch according to an instruction from the switching detection unit,
14 is a multiplexing unit for multiplexing the control signal from the memory storing the transmission path number, 15 is a multiplexing unit for multiplexing the control signal from the memory storing the path number, and 16 to 19 are for exchanging time slots of the memory circuit 6. Of the control memory circuits 20 to 23 storing the transmission line numbers of the input signals # 1 to # 4 to be read for the input signals # 1 to # 4 to be read for replacing the time slots of the memory circuit 6. It is a control memory circuit that stores corresponding path numbers.
【０００８】入力信号＃１〜＃４が、現用系３，予備系
１の構成であり、現用系のいずれかが故障した際に予備
に切替る１：３切替系を例にして説明する。１：３切替
系の動作を図２に示す。各々の動作について、図１を用
いて説明する。The input signals # 1 to # 4 are composed of the active system 3 and the standby system 1, and the 1: 3 switching system will be described as an example, which switches to the standby mode when any one of the active systems fails. The operation of the 1: 3 switching system is shown in FIG. Each operation will be described with reference to FIG.
【０００９】図２の（ａ）についての動作説明をする。
入力信号＃４を予備系とする片方向切替構成である時分
割スイッチに入力信号＃２で障害を検出し、切替検出部
１２において、対向装置との切替手順の結果、切替が必
要と判断されると、伝送路番号変換回路１３は、図３に
示す動作を行なう。伝送路番号格納コントロールメモリ
回路＃１〜＃４のデータ値を伝送路番号変換回路１３に
おいて、図３に示された変換を行なうことにより、メモ
リ回路６のデータ値を＃２→＃４に変える。メモリ回路
６のデータ値を変えることにより、入力信号を切替るこ
とが可能である。また、本実施例における４本の入力信
号が、現用系１，予備系１の切替構成が２組で構成され
るような場合についても、全く同様の動作によって、メ
モリ回路６のデータ値の変更のみで入力信号を切替可能
である。切替後、入力信号＃２が予備系になり、入力信
号＃１，＃３，＃４が現用系として動作する。The operation of FIG. 2A will be described.
A failure is detected by the input signal # 2 in the time division switch having the one-way switching configuration using the input signal # 4 as the standby system, and the switching detection unit 12 determines that the switching is necessary as a result of the switching procedure with the opposite device. Then, the transmission path number conversion circuit 13 performs the operation shown in FIG. The data values of the transmission path number storage control memory circuits # 1 to # 4 are converted in the transmission path number conversion circuit 13 as shown in FIG. 3 to change the data value of the memory circuit 6 from # 2 to # 4. . The input signal can be switched by changing the data value of the memory circuit 6. Also, in the case where the four input signals in the present embodiment are constituted by two sets of switching of the active system 1 and the standby system 1, the data value of the memory circuit 6 is changed by exactly the same operation. The input signal can be switched with only. After switching, the input signal # 2 becomes the standby system, and the input signals # 1, # 3, # 4 operate as the active system.
【００１０】図２の（ｂ）について、出力信号が現用、
予備の組合せの構成である場合の切替動作を説明する。
例として、４本の出力信号＃１〜＃４が現用系３、予備
系１の構成における出力側に相当する場合である。出力
信号＃４を予備系とする片方向切替構成である時分割ス
イッチに出力信号＃２で障害があり、切替検出部１２に
おいて、対向装置との切替手順の結果、切替が必要と判
断されると、伝送路番号変換回路１３は図３に示す動作
を行なう。伝送路番号格納コントロールメモリ回路＃１
〜＃４を伝送路番号変換回路１３で図３に示された変換
を行なうことより、メモリ回路６のアドレス値＃４のと
ころに切替前の＃２のデータが格納される。メモリ回路
６のアドレス値を変えることにより、出力信号を切替る
ことが可能である。切替後、出力信号＃２が予備系にな
り、出力信号＃１，＃３，＃４が現用系として動作す
る。In FIG. 2B, the output signal is currently in use,
The switching operation in the case of the configuration of the preliminary combination will be described.
As an example, it is a case where four output signals # 1 to # 4 correspond to the output side in the configuration of the active system 3 and the standby system 1. There is a failure in the output signal # 2 in the time-division switch having the one-way switching configuration in which the output signal # 4 is the standby system, and the switching detection unit 12 determines that switching is necessary as a result of the switching procedure with the opposite device. Then, the transmission path number conversion circuit 13 performs the operation shown in FIG. Transmission path number storage control memory circuit # 1
By performing the conversion shown in FIG. 3 in the transmission path number conversion circuit 13, the data # 2 before switching is stored at the address value # 4 of the memory circuit 6. The output signal can be switched by changing the address value of the memory circuit 6. After the switching, the output signal # 2 becomes the standby system, and the output signals # 1, # 3, # 4 operate as the active system.
【００１１】また、本実施例における４本の出力信号
が、現用系１，予備系１の切替構成が２組で構成される
ような場合についても、全く同様の動作によって、メモ
リ回路６のアドレス値の変更のみで出力信号を切替可能
である。Further, even when the four output signals in the present embodiment are constituted by two sets of the switching of the active system 1 and the standby system 1, the address of the memory circuit 6 is operated by exactly the same operation. The output signal can be switched only by changing the value.
【００１２】また、双方向切替構成の場合は、図２の
（ａ），（ｂ）の２つの動作を行なうことで、双方向切
替が可能である。Further, in the case of the bidirectional switching configuration, bidirectional switching can be performed by performing the two operations shown in FIGS. 2 (a) and 2 (b).
【００１３】次に、図１を用いて、一重系構成の動作を
説明する。Next, the operation of the single system configuration will be described with reference to FIG.
【００１４】入力信号＃１〜＃４１〜４が、多重部５を
経て、メモリ回路６の内容に従い、入力信号＃１〜＃４
のデータの配置を組み変える。時分割スイッチ後の信号
は、分離部７で信号の分離を行ない、出力信号＃１〜＃
４８〜１１になる。メモリ回路６にある時分割スイッチ
メモリは、接続先である出力信号＃１〜＃４の伝送路番
号、パス番号をメモリのアドレスで表し、アドレスに対
するデータを接続元である入力信号＃１〜＃４の伝送路
番号、パス番号のデータが格納されている。伝送路番号
格納メモリ＃１〜＃４１６〜１９の＃１〜＃４は、メモ
リ回路６にある時分割スイッチメモリの接続先を表すア
ドレスの伝送路番号に対応する。各々の伝送路番号格納
メモリのデータは時分割スイッチメモリの接続元である
データの伝送路番号に対応する。パス番号格納メモリ＃
１〜＃４２０〜２３の＃１〜＃４は、メモリ回路６にあ
る時分割スイッチメモリの接続先を表すアドレスの伝送
路番号に対応する。各々のパス番号格納メモリのアドレ
スは、時分割スイッチメモリの接続先を表すアドレスの
パス番号に対応する。各々のパス番号格納メモリのデー
タは、時分割スイッチメモリの接続元であるデータのパ
ス番号に対応する。伝送路番号格納メモリ＃１〜＃４１
６〜１９、パス番号格納メモリ＃１〜＃４２０〜２３の
内容を変更すると、メモリ回路６にある時分割スイッチ
メモリが変更される。伝送路番号変換回路１３の切替前
後の一重系構成の動作状態を図４に示す。図４より、伝
送路変換回路１３は動作しない。一重系構成は、予備系
が１本もないことより、入力信号＃１〜＃４１〜４、出
力信号＃１〜＃４８〜１１の４本すべてを使用すること
が可能である。The input signals # 1 to # 41 to 4 pass through the multiplexer 5 and the input signals # 1 to # 4 according to the contents of the memory circuit 6.
Rearrange the data arrangement of. The signal after the time division switch is separated by the separation unit 7, and output signals # 1 to #
It becomes 48-11. The time-division switch memory in the memory circuit 6 represents the transmission line numbers and path numbers of the output signals # 1 to # 4, which are the connection destinations, by the addresses of the memory, and the data for the addresses is the input signals # 1 to # that are the connection source. Data of the transmission path number and the path number of No. 4 are stored. # 1 to # 4 of the transmission line number storage memories # 1 to # 416 to 19 correspond to the transmission line numbers of the addresses indicating the connection destinations of the time divisional switch memories in the memory circuit 6. The data of each transmission line number storage memory corresponds to the transmission line number of the data that is the connection source of the time divisional switch memory. Pass number storage memory #
# 1 to # 4 of 1 to # 420 to 23 correspond to the transmission line numbers of the addresses indicating the connection destinations of the time divisional switch memory in the memory circuit 6. The address of each path number storage memory corresponds to the path number of the address indicating the connection destination of the time divisional switch memory. The data of each path number storage memory corresponds to the path number of the data that is the connection source of the time divisional switch memory. Transmission line number storage memories # 1 to # 41
6 to 19 and the contents of the path number storage memories # 1 to # 420 to 23 are changed, the time divisional switch memory in the memory circuit 6 is changed. The operating states of the single system configuration before and after the switching of the transmission line number conversion circuit 13 are shown in FIG. From FIG. 4, the transmission line conversion circuit 13 does not operate. Since the single system configuration has no spare system, it is possible to use all four input signals # 1 to # 41 to 4 and output signals # 1 to # 48 to 11.
【００１５】また、１：ｎ切替構成において、時分割ス
イッチでパスの設定を変更するときはｎ本の伝送路でパ
スの組替えを行なう。１＋１切替構成においても同様に
現用の伝送路のみでパスの組替えを行なう。Further, in the 1: n switching configuration, when the path setting is changed by the time division switch, the paths are rearranged by n transmission lines. Also in the 1 + 1 switching configuration, the paths are recombined only with the current transmission path.
【００１６】[0016]
【発明の効果】本発明によれば、個々の切替系に対し時
分割スイッチ回路で切替を行なうことができることか
ら、伝送路の切替系の変更に対しても、時分割スイッチ
回路の制御方法の変更だけで対応可能となる。また、
１：ｎ切替時の切り戻し動作を必要としないので、切り
戻しによる瞬断は生じない。According to the present invention, since it is possible to switch the individual switching systems by the time-division switch circuit, the method of controlling the time-division switch circuit can be used even when the transmission line switching system is changed. It will be possible only by changing. Also,
Since the switching back operation at the time of 1: n switching is not required, the instantaneous disconnection due to the switching back does not occur.
【図１】本発明の一実施例を示すブロック構成図であ
る。FIG. 1 is a block diagram showing an embodiment of the present invention.
【図２】本発明の１：ｎ切替動作概要図である。FIG. 2 is a schematic diagram of a 1: n switching operation of the present invention.
【図３】本発明の１：ｎ切替構成の伝送路番号変換回路
の動作概要図である。FIG. 3 is an operation schematic diagram of a transmission line number conversion circuit having a 1: n switching configuration according to the present invention.
【図４】本発明の一重系切替構成の伝送路番号変換回路
の動作概要図である。FIG. 4 is an operation outline diagram of the transmission path number conversion circuit of the single system switching configuration of the present invention.
１〜４…入力信号＃１〜＃４、５…多重部、６…メモリ
回路、７…分離部、８〜１１…出力信号＃１〜＃４、１
２…切替検出部、１３…伝送路番号変換回路、１４…多
重部（伝送路番号）、１５…多重部（パス番号）、１６
〜１９…コントロールメモリ（伝送路番号）、２０〜２
３…コントロールメモリ（パス番号）。1 to 4 ... Input signals # 1 to # 4, 5 ... Multiplexing section, 6 ... Memory circuit, 7 ... Separating section, 8-11 ... Output signals # 1 to # 4, 1
2 ... Switching detection unit, 13 ... Transmission line number conversion circuit, 14 ... Multiplexing unit (transmission line number), 15 ... Multiplexing unit (path number), 16
~ 19 ... Control memory (transmission path number), 20-2
3 ... Control memory (pass number).
Claims (9)
する複数のパスのタイムスロットを相互に入れ替える時
分割スイッチ回路と、その出力である複数の出力伝送
路、とからなる時分割スイッチにおいて、時分割スイッ
チ回路のタイムスロット入れ替えを制御するコントロー
ル回路に、出力伝送路の該当タイムスロットに出力すべ
き伝送路の番号を保持する回路と、本伝送路の番号を外
部からの制御により一定の規則で番号を変換する変換回
路を設けたことを特徴とする時分割スイッチ回路。1. A time division comprising a plurality of input transmission lines, a time division switching circuit for mutually exchanging time slots of a plurality of paths constituting each input transmission line, and a plurality of output transmission lines as outputs thereof. In the switch, the control circuit that controls the time slot switching of the time division switch circuit holds the number of the transmission line to be output in the corresponding time slot of the output transmission line and the number of this transmission line by external control. A time-division switch circuit, which is provided with a conversion circuit for converting numbers according to a certain rule.
複数の入力伝送路が、現用伝送路１本に対して予備伝送
路１本という冗長構成を含むことを特徴とする時分割ス
イッチ回路。2. The time divisional switch according to claim 1,
A time-division switch circuit, wherein a plurality of input transmission lines include a redundant configuration in which one working transmission line and one backup transmission line are included.
複数の出力伝送路が、現用伝送路１本に対して予備伝送
路１本という冗長構成を含むことを特徴とする時分割ス
イッチ回路。3. The time divisional switch according to claim 1, wherein
A time-division switch circuit, wherein a plurality of output transmission lines include a redundant configuration of one working transmission line and one spare transmission line.
複数の入力伝送路が、現用伝送路ｎ本に対して予備伝送
路１本という構成を含むことを特徴とする時分割スイッ
チ回路。4. The time divisional switch according to claim 1, wherein
A time-division switch circuit characterized in that a plurality of input transmission lines includes a configuration in which one protection transmission line is provided for n active transmission lines.
複数の出力伝送路が、現用伝送路ｎ本に対して予備伝送
路１本という構成を含むことを特徴とする時分割スイッ
チ回路。5. The time divisional switch according to claim 1, wherein
A time-division switch circuit characterized in that a plurality of output transmission lines includes a configuration in which one protection transmission line is provided for n active transmission lines.
入力伝送路の現用／予備選択状態に対応した伝送路番号
の変換データを変換回路に設定することを特徴とする伝
送路切替方法。6. The time divisional switch according to claim 1,
A transmission line switching method, wherein conversion data of a transmission line number corresponding to a working / preliminary selection state of an input transmission line is set in a conversion circuit.
出力伝送路の現用／予備選択状態に対応した伝送路番号
の変換データを変換回路に設定することを特徴とする伝
送路切替方法。7. The time divisional switch according to claim 1, wherein
A transmission line switching method, characterized in that conversion data of a transmission line number corresponding to an active / standby selection state of an output transmission line is set in a conversion circuit.
入力伝送路に与えられた現用伝送路予備伝送路の名称
を、伝送路の切替とともに名称変更することを特徴とす
る伝送路切替方法。8. The time divisional switch according to claim 4,
A transmission line switching method characterized in that the name of a working transmission line protection transmission line given to an input transmission line is changed together with the switching of the transmission line.
出力伝送路に与えられた現用伝送路予備伝送路の名称
を、伝送路の切替とともに名称変更することを特徴とす
る伝送路切替方法。9. The time division switch according to claim 5,
A transmission line switching method, characterized in that the name of a working transmission line protection transmission line given to an output transmission line is changed when the transmission line is switched.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1052293A JPH06225349A (en) | 1993-01-26 | 1993-01-26 | Time-division switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1052293A JPH06225349A (en) | 1993-01-26 | 1993-01-26 | Time-division switch circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06225349A true JPH06225349A (en) | 1994-08-12 |
Family
ID=11752581
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1052293A Pending JPH06225349A (en) | 1993-01-26 | 1993-01-26 | Time-division switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06225349A (en) |
-
1993
- 1993-01-26 JP JP1052293A patent/JPH06225349A/en active Pending
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