JPH0622250A - Liquid crystal display device and equipment using the same - Google Patents

Liquid crystal display device and equipment using the same

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Publication number
JPH0622250A
JPH0622250A JP4173054A JP17305492A JPH0622250A JP H0622250 A JPH0622250 A JP H0622250A JP 4173054 A JP4173054 A JP 4173054A JP 17305492 A JP17305492 A JP 17305492A JP H0622250 A JPH0622250 A JP H0622250A
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal display
display device
thin film
capacitive element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4173054A
Other languages
Japanese (ja)
Other versions
JP3223383B2 (en
Inventor
Tomihiro Hayakawa
富博 早川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP17305492A priority Critical patent/JP3223383B2/en
Publication of JPH0622250A publication Critical patent/JPH0622250A/en
Application granted granted Critical
Publication of JP3223383B2 publication Critical patent/JP3223383B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Image Input (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

PURPOSE:To provide an inexpensive liquid crystal display device capable of miniaturization and the equipment using the display device by integrating a picture read section comprising a photoelectric conversion element or the like to a matrix liquid crystal display panel. CONSTITUTION:A thin film transistor(TR) TFT1 and a capacitive element C1 are formed in the vicinity of each crossing among plural data lines L101, 102... and plural gate lines L201, 202... and a photodiode HD is used to supply a photo current is provided in each of the plural data lines L101, 102..., and capacitive elements C1, C2 are provided in each of the plural data lines L101, 102... and a diode D used to prevent the display data use capacitive element C2 from being charged due to a photo current supplied from the photodiode HD is provided between the capacitive elements C1, C2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はマトリクス型液晶表示パ
ネルに光電変換素子等からなる画像読取部を一体に形成
した液晶表示装置およびそれを用いた機器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device having a matrix type liquid crystal display panel integrally formed with an image reading section including photoelectric conversion elements and the like, and an apparatus using the same.

【0002】[0002]

【従来の技術】従来、光信号から画像信号を読み出すC
CD等の光電変換素子を用いたエリアセンサと、画像信
号を表示する液晶表示装置とは別々に構成されていた。
その為、このようなエリアセンサの機能と液晶表示装置
の機能を有する電子機器は大型化する欠点があった。そ
こで、エリアセンサ一体型液晶表示装置が検討されてい
る。この場合、階調表示をするため液晶表示装置駆動用
のシフトレジスタや表示データ用の容量素子も一体化す
ると、コスト的に大きなメリットが生ずる。
2. Description of the Related Art Conventionally, C for reading an image signal from an optical signal
An area sensor using a photoelectric conversion element such as a CD and a liquid crystal display device that displays an image signal are separately configured.
Therefore, there is a drawback in that the electronic device having the function of the area sensor and the function of the liquid crystal display device becomes large in size. Therefore, a liquid crystal display device integrated with an area sensor has been studied. In this case, if a shift register for driving the liquid crystal display device and a capacitive element for display data are also integrated for gray scale display, a great cost advantage is brought about.

【0003】[0003]

【発明が解決しようとする課題】従来はエリアセンサと
液晶表示装置の2つのデバイスが必要になり、高価にな
ると共に、装置が大型化する欠点があった。
Conventionally, two devices, that is, an area sensor and a liquid crystal display device are required, which is disadvantageous in that the device becomes expensive and the device becomes large.

【0004】本発明は上記の実情に鑑みてなされたもの
で、マトリクス型液晶表示パネルに光電変換素子等から
なる画像読取部を一体に形成することにより、安価で、
且つ装置を小形化し得る液晶表示装置およびそれを用い
た機器を提供することを目的とする。
The present invention has been made in view of the above circumstances, and is inexpensive at a low cost by integrally forming an image reading unit including a photoelectric conversion element on a matrix type liquid crystal display panel.
Moreover, it is an object of the present invention to provide a liquid crystal display device capable of miniaturizing the device and a device using the same.

【0005】[0005]

【課題を解決するための手段】本発明は上記課題を解決
するために、複数のデータ線と複数のアドレス線が交差
する各交差部付近にスイッチング素子と容量素子を形成
すると共に前記データ線に光電流を供給する光電変換素
子を設け、かつ前記各データ線上に前記容量素子を充電
するための表示データ用容量素子と、前記光電変換素子
から供給される光電流によって前記表示データ用容量素
子が充電されるのを防止する充電防止素子を設けて液晶
表示装置を構成することを特徴とするものである。又、
前記液晶表示装置を集光レンズを有する機器本体内に設
け読取りおよび表示可能となしたことを特徴とするもの
である。
In order to solve the above-mentioned problems, the present invention forms a switching element and a capacitive element near each intersection where a plurality of data lines and a plurality of address lines intersect with each other, and A display data capacitive element for providing a photoelectric conversion element for supplying a photocurrent and charging the capacitive element on each of the data lines, and the display data capacitive element by the photocurrent supplied from the photoelectric conversion element, The liquid crystal display device is characterized in that a charge prevention element for preventing charging is provided. or,
The liquid crystal display device is provided in a device body having a condenser lens so that it can be read and displayed.

【0006】[0006]

【作用】本発明は、マトリクス型液晶表示パネルに光電
変換素子等からなる画像読取部を一体に形成することに
より、装置を小形化することができ、しかも取扱いが容
易であり、また安価にすることができる。
According to the present invention, by integrally forming an image reading section composed of a photoelectric conversion element or the like on a matrix type liquid crystal display panel, the apparatus can be downsized, and it is easy to handle and inexpensive. be able to.

【0007】[0007]

【実施例】以下図面を参照して本発明の実施例を詳細に
説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0008】図1は本発明液晶表示装置の一実施例を示
す回路図である。即ち、駆動回路一体型のアクティブマ
トリクス液晶表示パネルは各データ線L101,102
……と共通電位VCOM との間にそれぞれスイッチング素
子の薄膜トランジスタTFT1及び容量素子C1が直列
に接続され、前記各薄膜トランジスタTFT1のゲート
はアドレス線のゲートラインL201,L202……に
接続される。このゲートラインL201,L202……
は垂直シフトレジスタ1に接続される。この垂直シフト
レジスタ1にはスタートパルスSP2及び垂直用クロッ
ク信号CPVが加えられる。このスタートパルスSP2
及び垂直用クロック信号CPVにより垂直シフトレジス
タ1は薄膜トランジスタTFT1をオンして容量素子C
1に信号電荷を蓄積する。前記各データ線L101,1
02……はスイッチング素子の薄膜トランジスタTFT
2を介して充電防止素子のダイオードDのカソードに接
続され、このダイオードDのアノードは表示データ用容
量素子C2を介して接地されると共にスイッチング素子
の薄膜トランジスタTFT3を介して映像信号ラインL
3に接続される。前記映像信号ラインL3には映像信号
S1が加えられる。前記各薄膜トランジスタTFT3の
ゲートは水平シフトレジスタ2に接続されると共に論理
ゲートLGの一方の入力端に接続される。水平シフトレ
ジスタ2にはスタートパルスSP1及び水平用クロック
信号CPHが加えられる。このスタートパルスSP1及
び水平用クロック信号CPHにより水平シフトレジスタ
2は薄膜トランジスタTFT3をオンして表示データ用
容量素子C2に信号電荷を蓄積する。また、前記論理ゲ
ートLGの他方の入力端には制御信号CTが供給される
制御信号ラインL5に接続され、この論理ゲートLGの
出力端は薄膜トランジスタTFT2のゲートに接続され
ている。
FIG. 1 is a circuit diagram showing an embodiment of the liquid crystal display device of the present invention. That is, the active matrix liquid crystal display panel integrated with the drive circuit has each data line L101, 102.
, And the common potential V COM are respectively connected in series with the thin film transistor TFT1 and the capacitive element C1 which are switching elements, and the gates of the thin film transistors TFT1 are connected to the gate lines L201, L202, ... Of the address lines. These gate lines L201, L202 ...
Are connected to the vertical shift register 1. A start pulse SP2 and a vertical clock signal CPV are applied to the vertical shift register 1. This start pulse SP2
And the vertical clock signal CPV causes the vertical shift register 1 to turn on the thin film transistor TFT1 to turn on the capacitive element C.
1 accumulates the signal charge. Each of the data lines L101, 1
02 ... is a thin film transistor TFT of a switching element
2 is connected to the cathode of the diode D of the charge prevention element, and the anode of the diode D is grounded via the display data capacitive element C2 and the video signal line L via the thin film transistor TFT3 of the switching element.
3 is connected. The video signal S1 is applied to the video signal line L3. The gate of each thin film transistor TFT3 is connected to the horizontal shift register 2 and also to one input end of the logic gate LG. The start pulse SP1 and the horizontal clock signal CPH are applied to the horizontal shift register 2. The horizontal shift register 2 turns on the thin film transistor TFT3 by the start pulse SP1 and the horizontal clock signal CPH to accumulate the signal charge in the display data capacitive element C2. The other input end of the logic gate LG is connected to the control signal line L5 to which the control signal CT is supplied, and the output end of the logic gate LG is connected to the gate of the thin film transistor TFT2.

【0009】しかして、映像信号S1は映像信号ライン
L3を通り薄膜トランジスタTFT3のうち、ゲート信
号が加えられてオンされた薄膜トランジスタTFT3を
通って、表示データ用容量素子C2に信号電荷を蓄積す
る。このようにして表示データ用容量素子C2に信号電
荷を蓄積する処理を全データ線L101,102……に
ついて逐次行い、1走査ライン分の表示データ用容量素
子C2に信号電荷を蓄積する処理を完了した時点で、論
理ゲートLGによって制御される薄膜トランジスタTF
T2をオンすると共に、これに同期して垂直シフトレジ
スタ1からゲートラインL201,L202……に水平
走査信号を加えて選択された画素すなわち薄膜トランジ
スタTFT1及び容量素子C1に信号電荷を伝送してい
る。論理ゲートLGの真理値表は図7に示され、また、
その回路の一例が図8に示される。これらの図におい
て、φは水平シフトレジスタ2の出力パルスである。ま
た、制御信号CTは画像表示の場合と後述する画像読取
りの場合とでは異なる周期およびパルス幅を有するもの
であり、上述せる画像表示の場合には、データ容量素子
C2への信号電荷の蓄積が終了した時点で、容量素子C
1に信号電荷を伝送するに十分な時間制御信号ラインL
5に加えられる。
Thus, the video signal S1 passes through the video signal line L3 and passes through the thin film transistor TFT3 of the thin film transistor TFT3 which is turned on by the addition of the gate signal, and accumulates signal charges in the display data capacitive element C2. In this way, the process of accumulating the signal charges in the display data capacitive element C2 is sequentially performed for all the data lines L101, 102 ... And the process of accumulating the signal charges in the display data capacitive element C2 for one scanning line is completed. Then, the thin film transistor TF controlled by the logic gate LG
While turning on T2, in synchronization with this, a horizontal scanning signal is applied from the vertical shift register 1 to the gate lines L201, L202, ... And signal charges are transmitted to the selected pixel, that is, the thin film transistor TFT1 and the capacitive element C1. The truth table of the logic gate LG is shown in FIG.
An example of the circuit is shown in FIG. In these figures, φ is the output pulse of the horizontal shift register 2. Further, the control signal CT has a different cycle and pulse width in the case of image display and in the case of image reading described later, and in the case of the image display described above, the accumulation of signal charges in the data capacitance element C2 does not occur. When completed, the capacitive element C
1 time control signal line L sufficient to transmit signal charge to
Added to 5.

【0010】次に、光電変換素子等からなる画像読取部
について説明する。各データ線L101,102……と
共通電位VCOM との間にはスイッチング素子の薄膜トラ
ンジスタTFT4及び光電変換素子例えばa−Siフォ
トダイオードHDが直列に接続され、前記各薄膜トラン
ジスタTFT4のゲートはゲートラインL202……に
接続される。前記各薄膜トランジスタTFT2とダイオ
ードDとの接続点には出力ラインL4が接続され、この
出力ラインL4はビデオ増幅器3の入力端子に接続され
ると共に抵抗4を介してフォトダイオードプリチャージ
用電源5に接続される。なお、この実施例では前記ビデ
オ増幅器3,抵抗4,電源5を除く装置全体、すなわち
点線6内はすべて薄膜ディポジションにより形成され
る。
Next, an image reading section including a photoelectric conversion element and the like will be described. A thin film transistor TFT4 as a switching element and a photoelectric conversion element such as an a-Si photodiode HD are connected in series between each data line L101, 102 ... And the common potential V COM, and the gate of each thin film transistor TFT4 is a gate line L202. ... is connected to. An output line L4 is connected to the connection point between each thin film transistor TFT2 and the diode D, and this output line L4 is connected to the input terminal of the video amplifier 3 and also to the photodiode precharge power source 5 via the resistor 4. To be done. In this embodiment, the entire device except the video amplifier 3, the resistor 4 and the power source 5, that is, the whole of the dotted line 6 is formed by thin film deposition.

【0011】即ち、垂直シフトレジスタ1からゲートラ
インL202……にゲート信号が供給されると、薄膜ト
ランジスタTFT4がオンして各フォトダイオードHD
とデータ線L101,102……が導通する。画像読取
りの場合、制御信号CTは水平シフトレジスタ2から出
力される出力パルスφに同期して制御信号ラインL5に
加えられるようになっており、この状態において、水平
シフトレジスタ2から出力パルスφが出力されると、薄
膜トランジスタTFT2のゲートにゲート信号が供給さ
れることになり、薄膜トランジスタTFT2が順次オン
して、フォトダイオードHDに光電変換により発生した
1画素づつのデータがビデオ増幅器3に入力される。こ
の場合、薄膜トランジスタTFT4およびTFT2を介
して出力ラインL4に伝送された光電流は、充電防止阻
止のダイオードDに阻止されるので、表示データ用容量
素子C2に充電されることはない。
That is, when the gate signal is supplied from the vertical shift register 1 to the gate lines L202, ..., The thin film transistor TFT4 is turned on and each photodiode HD.
And the data lines L101, 102 ... Conduct. In the case of image reading, the control signal CT is applied to the control signal line L5 in synchronization with the output pulse φ output from the horizontal shift register 2. In this state, the output pulse φ is output from the horizontal shift register 2. When output, the gate signal is supplied to the gate of the thin film transistor TFT2, the thin film transistor TFT2 is sequentially turned on, and the pixel-by-pixel data generated by photoelectric conversion in the photodiode HD is input to the video amplifier 3. . In this case, the photocurrent transmitted to the output line L4 via the thin film transistors TFT4 and TFT2 is blocked by the diode D for preventing charging, so that the capacitive element C2 for display data is not charged.

【0012】図2は本発明液晶表示装置の一実施例に係
る電極構成を示す平面図、図3は図2のA−A′線断面
図であり、蒸着スパッタ、プラズマCVD、エッチング
等によって薄膜積層されて形成される。即ち、ガラス基
板11の上には絶縁膜12が積層して形成され、この絶
縁膜12上には透明なアノード電極13,絶縁膜14
1,142及びシリコン半導体層15が所定のパターン
に積層して形成される。前記アノード電極13上にはp
+ a−Si層16,ia−Si層17及びn+ a−Si
層18が順次が積層して形成される。前記シリコン半導
体層15上にはソース電極19,ドレイン電極20及び
絶縁膜21,22が所定のパターンに積層して形成さ
れ、この絶縁膜21上にはゲート電極23が積層して形
成される。前記n+ a−Si層18及び絶縁膜141の
上にはカソード電極24が積層して形成され、カソード
電極24とソース電極19は接続される。前記絶縁膜1
42上にはデータ線L1が積層して形成され、データ線
L1とドレイン電極20は接続される。前記カソード電
極24,ソース電極19,データ線L1及びドレイン電
極20の上には絶縁膜25が積層して形成され、この絶
縁膜25上には例えばCr等の遮光マスク26が積層し
て形成される。前記絶縁膜21,ゲート電極23,シリ
コン半導体層15,ソース電極19及びドレイン電極2
0は薄膜トランジスタTFT4を構成し、前記カソード
電極24,n+ a−Si層18、ia−Si層17,p
+ a−Si層16及びアノード電極13はフォトダイオ
ードHDを構成する。図2中、L2はゲートライン、2
7は透明画素電極、28は薄膜トランジスタTFT1の
ソース電極、29は薄膜トランジスタTFT1のシリコ
ン半導体層、30は薄膜トランジスタTFT1のドレイ
ン電極である。
FIG. 2 is a plan view showing an electrode structure according to an embodiment of the liquid crystal display device of the present invention, and FIG. 3 is a sectional view taken along the line AA 'in FIG. It is formed by stacking. That is, the insulating film 12 is laminated and formed on the glass substrate 11, and the transparent anode electrode 13 and the insulating film 14 are formed on the insulating film 12.
1, 142 and the silicon semiconductor layer 15 are laminated and formed in a predetermined pattern. P on the anode electrode 13
+ a-Si layer 16, ia-Si layer 17 and n + a-Si
Layers 18 are formed by sequentially stacking. A source electrode 19, a drain electrode 20, and insulating films 21 and 22 are formed on the silicon semiconductor layer 15 in a predetermined pattern, and a gate electrode 23 is formed on the insulating film 21. N + A cathode electrode 24 is laminated and formed on the a-Si layer 18 and the insulating film 141, and the cathode electrode 24 and the source electrode 19 are connected. The insulating film 1
The data line L1 is formed in a stacked manner on 42, and the data line L1 and the drain electrode 20 are connected. An insulating film 25 is laminated on the cathode electrode 24, the source electrode 19, the data line L1 and the drain electrode 20, and a light shielding mask 26 such as Cr is laminated on the insulating film 25. It The insulating film 21, the gate electrode 23, the silicon semiconductor layer 15, the source electrode 19 and the drain electrode 2
0 constitutes the thin film transistor TFT4, and the cathode electrode 24, n + a-Si layer 18, ia-Si layer 17, p
+ The a-Si layer 16 and the anode electrode 13 form a photodiode HD. In FIG. 2, L2 is a gate line, 2
Reference numeral 7 is a transparent pixel electrode, 28 is a source electrode of the thin film transistor TFT1, 29 is a silicon semiconductor layer of the thin film transistor TFT1, and 30 is a drain electrode of the thin film transistor TFT1.

【0013】図4は図1〜図3の画像読取部を一体に形
成した液晶表示装置を用いた電子カメラの一例を示す構
成図である。即ち、入射光は集光レンズ31で集光され
て後、ハーフミラー32で反射されて図1〜図3の画像
読取部を一体に形成した液晶表示装置33に入力され
る。この液晶表示装置33では入射された画像を読取っ
てメモリに記憶する。前記ハーフミラー32の後部には
バックライト36が設けられる。又、液晶表示装置33
に表示された画像は反射板34で反射されて後、拡大用
接眼レンズ35を通して肉眼で見る事ができる。
FIG. 4 is a block diagram showing an example of an electronic camera using a liquid crystal display device in which the image reading units shown in FIGS. 1 to 3 are integrally formed. That is, the incident light is condensed by the condenser lens 31, is then reflected by the half mirror 32, and is input to the liquid crystal display device 33 in which the image reading unit of FIGS. 1 to 3 is integrally formed. The liquid crystal display device 33 reads the incident image and stores it in the memory. A backlight 36 is provided at the rear of the half mirror 32. In addition, the liquid crystal display device 33
After being reflected by the reflection plate 34, the image displayed in (1) can be viewed with the naked eye through the magnifying eyepiece 35.

【0014】図5は図1〜図3の画像読取部を一体に形
成した液晶表示装置を用いたテレビ電話の一例を示す構
成図である。即ち、通話者の画像は集光レンズ41で集
光されて後、反射板42及びハーフミラー46で反射さ
れて図1〜図3の画像読取部を一体に形成した液晶表示
装置431に入力される。この液晶表示装置431では
入射された画像を読取って相手側に送信すると共に表示
する。一方、相手側からの画像は液晶表示装置432に
表示される。44はバックライト、45は自在継手であ
る。
FIG. 5 is a block diagram showing an example of a videophone using a liquid crystal display device in which the image reading portions of FIGS. 1 to 3 are integrally formed. That is, the image of the caller is collected by the condenser lens 41, reflected by the reflector 42 and the half mirror 46, and input to the liquid crystal display device 431 in which the image reading unit of FIGS. 1 to 3 is integrally formed. It The liquid crystal display device 431 reads the incident image, transmits it to the other party, and displays it. On the other hand, the image from the other party is displayed on the liquid crystal display device 432. Reference numeral 44 is a backlight, and 45 is a universal joint.

【0015】図6は図1〜図3の画像読取部を一体に形
成した液晶表示装置を用いたハンディコピーの一例を示
す構成図である。即ち、原稿51は接紙ローラ52によ
り走行され、この接紙ローラ52の外周にはアイドラ5
3を介してスリット付円板54の回転軸が連結され、ス
リット付円板54は接紙ローラ52の回転に比例した回
転をする。このスリット付円板54の回転数はフォトカ
プラ55で検出されエンコーダ出力信号Sとして出力さ
れる。前記スリット付円板54及びフォトカプラ55は
エンコーダを構成する。前記原稿51にはLEDアレイ
56からの光が照射され、原稿51からの反射光は集光
レンズ57及び反射板58を介して図1〜図3の画像読
取部を一体に形成した液晶表示装置59のフォトダイオ
ードHD等よりなる画像読取部に入力される。液晶表示
装置59の駆動回路一体型のアクティブマトリクス液晶
表示パネルの後部には反射板60が設けられる。
FIG. 6 is a block diagram showing an example of a handy copy using a liquid crystal display device in which the image reading portions of FIGS. 1 to 3 are integrally formed. That is, the original 51 is moved by the paper contact roller 52, and the idler 5 is attached to the outer periphery of the paper contact roller 52.
The rotating shaft of the slitted disc 54 is connected via 3, and the slitted disc 54 rotates in proportion to the rotation of the paper contact roller 52. The rotation speed of the disk 54 with slits is detected by the photocoupler 55 and output as an encoder output signal S. The slitted disk 54 and the photocoupler 55 form an encoder. The original 51 is irradiated with the light from the LED array 56, and the reflected light from the original 51 is integrated with the image reading unit shown in FIGS. 1 to 3 via a condenser lens 57 and a reflector 58. The image is input to an image reading unit including a photodiode HD 59. A reflective plate 60 is provided at the rear of the active matrix liquid crystal display panel integrated with the drive circuit of the liquid crystal display device 59.

【0016】[0016]

【発明の効果】以上述べたように本発明によれば、マト
リクス型液晶表示パネルに光電変換素子等からなる画像
読取部を一体に形成することにより、装置を小形化する
ことができ、しかも取扱いが容易であり、また安価にす
ることができる。
As described above, according to the present invention, the device can be downsized by integrally forming the image reading section including the photoelectric conversion element and the like on the matrix type liquid crystal display panel, and the handling can be improved. It is easy and cheap.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る液晶表示装置の一実施例を示す回
路図である。
FIG. 1 is a circuit diagram showing an embodiment of a liquid crystal display device according to the present invention.

【図2】本発明に係る液晶表示装置の一実施例に係る電
極構成を示す平面図である。
FIG. 2 is a plan view showing an electrode configuration according to an embodiment of the liquid crystal display device of the present invention.

【図3】図2のA−A′線断面図である。FIG. 3 is a sectional view taken along the line AA ′ of FIG.

【図4】本発明に係る電子カメラの一例を示す構成図で
ある。
FIG. 4 is a configuration diagram showing an example of an electronic camera according to the present invention.

【図5】本発明に係るテレビ電話の一例を示す構成図で
ある。
FIG. 5 is a configuration diagram showing an example of a videophone according to the present invention.

【図6】本発明に係るハンディコピーの一例を示す構成
図である。
FIG. 6 is a configuration diagram showing an example of a handy copy according to the present invention.

【図7】図1に示された論理ゲートLGの真理値表であ
る。
FIG. 7 is a truth table of the logic gate LG shown in FIG.

【図8】論理ゲートLGの一例を示す回路図である。FIG. 8 is a circuit diagram showing an example of a logic gate LG.

【符号の説明】[Explanation of symbols]

1…垂直シフトレジスタ、2…水平シフトレジスタ、3
…ビデオ増幅器、4…抵抗、5…フォトダイオードプリ
チャージ用電源、TFT1〜TFT4…スイッチング用
薄膜トランジスタ、C1…容量素子、C2…表示データ
用容量素子、HD…フォトダイオード、D…ダイオー
ド。
1 ... Vertical shift register, 2 ... Horizontal shift register, 3
... Video amplifier, 4 ... Resistor, 5 ... Photodiode precharge power supply, TFT1 to TFT4 ... Switching thin film transistor, C1 ... Capacitance element, C2 ... Display data capacitance element, HD ... Photodiode, D ... Diode.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 G06F 15/64 320 A 9073−5L ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location G06F 15/64 320 A 9073-5L

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 複数のデータ線と複数のアドレス線が交
差する各交差部付近にスイッチング素子と容量素子を形
成すると共に前記データ線に光電流を供給する光電変換
素子を設け、かつ前記各データ線上に前記容量素子を充
電するための表示データ用容量素子と、前記光電変換素
子から供給される光電流によって前記表示データ用容量
素子が充電されるのを防止する充電防止素子を設けたこ
とを特徴とする液晶表示装置。
1. A switching element and a capacitive element are formed near each intersection where a plurality of data lines and a plurality of address lines intersect with each other, and a photoelectric conversion element for supplying a photocurrent to the data line is provided, and each data is provided. A display data capacitive element for charging the capacitive element on the line and a charge prevention element for preventing the display data capacitive element from being charged by the photocurrent supplied from the photoelectric conversion element are provided. Characteristic liquid crystal display device.
【請求項2】 請求項1記載の液晶表示装置を集光レン
ズを有する機器本体内に設け読取りおよび表示可能とな
したことを特徴とする液晶表示装置を用いた機器。
2. A device using a liquid crystal display device, wherein the liquid crystal display device according to claim 1 is provided in a device main body having a condenser lens and is readable and displayable.
JP17305492A 1992-06-30 1992-06-30 Liquid crystal display device and equipment using the same Expired - Lifetime JP3223383B2 (en)

Priority Applications (1)

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JP17305492A JP3223383B2 (en) 1992-06-30 1992-06-30 Liquid crystal display device and equipment using the same

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Application Number Priority Date Filing Date Title
JP17305492A JP3223383B2 (en) 1992-06-30 1992-06-30 Liquid crystal display device and equipment using the same

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JPH0622250A true JPH0622250A (en) 1994-01-28
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