JPH06205452A - Subscriber circuit of switchboard - Google Patents

Abstract

PURPOSE: To highly integrate a circuit and to improve the reliability by dividing a subscriber circuit by characteristics of respective elements to form them on a semiconductor chip. CONSTITUTION: An element which is to be an interface to a subscriber telephone set and is used with a high voltage as the operation power is formed in a bipolar process and is integrated in a first integrated circuit as a high voltage operation part 100. And an element which is to be an interface between the subscriber circuit and an exchange and is used with a voltage in the TTL level as the operation power is formed in a MOS process and is integrated in a second integrated circuit as a low voltage operation part 200. A codec is separated into an analog signal processing part and a digital signal processing part, and the analog part is integrated in the second integrated circuit as the low voltage operation part 200. The digital part is designed in a digital signal processing system and is integrated in a third integrated circuit as a digital codec 400, and a line concentration circuit 300 is provided between the second integrated circuit and the third integrated circuit to concentrate speech lines in a time division multiplexing systems.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a subscriber circuit of an exchange,
Among them, the present invention relates to a subscriber circuit using a semiconductor device, and in particular, to downsize and highly integrate a subscriber circuit composed of a subscriber line interface device and a codec, and to process many channels by one subscriber circuit. Semiconductor device and its method.

[0002]

2. Description of the Related Art Generally, a subscriber circuit (subscrib) of an exchange is used.
er Line Circuit) is composed of a subscriber line interface device and a codec (COder & DECoder: CODEC), and functions as an interface between the subscriber telephone and the exchange. For this reason, the subscriber circuit is
It is necessary to be able to perform the T function, the channel allocation and the concentrating function.

The BORSCHT function is a function in which the initials of the following functions are combined. That is,
A call current supply function (Ba) that supplies call current to the subscriber line and provides operating power when the subscriber performs the call function.
(Sterry feed), surge voltage (surg voltage) induced on the subscriber line when an abnormal condition such as lightning strike occurs outside the exchange.
e voltage) to protect the subscriber circuit by over voltage protection (Over Voltage Protection). When an incoming call occurs on the subscriber's telephone, a ring signal is sent to the subscriber's line to notify it of the incoming call. Function (Ringin
g), subscriber telephone hook on / off detection, dial pulse detection, subscriber status monitoring function (Supervison) to detect ring trip, ringing response status, etc., analog signal output from subscriber telephone is digital signal , A coding / decoding function for converting a digital signal provided from the other party's subscriber's telephone into an analog signal and outputting to the subscriber's telephone, a transmission signal generated from the subscriber's telephone And a 2-wire to 4-wire switching function (Hybrid) that forms a path of a reception signal generated from the subscriber's telephone on the other side, and a test pull-in function that connects the subscriber line to a test device to test the subscriber circuit This is a function that combines (Test).

The subscriber circuit is also adapted to perform a channel assignment function (time slot assignment). This is because a transmission channel (TX time slot) is assigned to a transmission signal transmitted from a subscriber telephone, and a reception channel (RX time slot) is separately assigned to a reception signal received through a highway. This means the function of separating and transmitting / receiving the signal of its own channel. In addition, the subscriber circuit has a line concentration for efficient use of the highway. This is a function of estimating the call frequency of the subscriber telephones and concentrating the subscriber lines at a fixed rate so that not all subscriber telephones talk simultaneously.

FIG. 8 shows a conventional example of a subscriber circuit of such an exchange, showing a structure having a BORSCHT function. As shown in FIG. 8, in order to perform the BORSCHT function, one subscriber line interface circuit (SLIC) is provided for each subscriber line connected to each subscriber telephone (1 to N). )
And 1 codec / filter (CODEC / filter)
And are designed to have respectively. Further, FIG. 9 shows the configuration of the SLIC of the subscriber circuit shown in FIG. As can be seen from FIGS. 8 and 9, in the conventional subscriber circuit, the subscriber line is served by using the semiconductor device in which the SLIC and the codec / filter are separately integrated.

However, the SLIC has, as shown in FIG. 9, a power supply unit for supplying a call current to a subscriber line and a ring drive unit for notifying the occurrence of an incoming call. Here, a high voltage signal is transmitted. I have to handle it. Therefore, considering the configuration for processing the high voltage signal,
It is necessary to integrate the entire structure with bipolar devices. That is, conventionally, elements having different configurations for processing a high voltage signal and a low voltage signal are integrated as one SLIC. In this case, each element must be integrated in a bipolar process so as to have a high withstand voltage characteristic. I had to do it. This means that the elements that process high voltage signals must have high withstand voltage characteristics, and accordingly, all circuit elements must be designed in a bipolar process.

However, when the SLIC is integrated by using the bipolar process as described above, the 5V class low voltage element that serves as a signal interface to the control unit of the subscriber circuit is also designed in the bipolar process. However, there are problems that the power consumption of the circuit increases, high integration design becomes difficult, and the chip area increases. Further, depending on the characteristics of the element, for example, even if the low voltage element part is to be formed by a MOS element, the bipolar process and the M
A large different manufacturing process called an OS process must be used, and the integration process becomes complicated. Moreover, since the high-voltage operating element having a high failure rate and a short average life is integrated with the low-voltage operating element having a relatively low failure rate and a long average life, it is difficult to efficiently use the semiconductor chip.

The codec / filter is SLIC.
Connected to the PCM highway and serves as an analog signal interface for the SLIC and a digital signal interface for the PCM highway. Therefore, the codec / filter is integrated with a part made up of analog elements and a part made up of digital elements to perform an A / D conversion function, a D / A conversion function, a filtering function, and a digital signal compression / expansion function. To do. However, when the analog element and the digital element are integrated together in this way, the area occupied by the analog element increases. As a result, there is a problem that the reliability of the portion of the digital element is reduced by the analog element and the area of the entire chip is increased.

Further, in order to increase the efficiency of the exchange, the subscriber circuit has a function of concentrating the subscriber line. That is, the subscriber telephone is not always in a call state, but randomly makes calls as needed. From the viewpoint of the exchange side, the subscriber's call line occupation time is extremely short and the call waiting time is longer. Therefore, it is necessary to collect subscriber lines in the subscriber circuit so that the exchange can be operated efficiently. At this time, the line collection rate is determined by the call frequency of the subscriber. When the call frequency is high, the line collection rate is low, and when the call frequency is low, the line collection rate is increased.
However, in the conventional subscriber circuit, the line concentrating function is operated in the latter stage of the exchange side than the codec / filter. Therefore, SLI dedicated to each subscriber line
It is necessary to have C and a codec / filter. That is, one codec / filter can only serve the subscriber line connected to it, and the subscriber circuit must have a large number of codecs / filters.

[0010]

SUMMARY OF THE INVENTION It is, therefore, an object of the present invention to provide a subscriber circuit of an exchange, which can be made more compact and highly integrated.

Second, it is to provide a subscriber circuit of an exchange capable of servicing a large number of channels by using one common digital codec.

A third object is to provide a subscriber circuit of an exchange in which a codec is separately integrated into an analog signal processing part and a digital signal processing part so that a large number of subscriber channels can be processed.

Fourth, when the SLIC is integrated, the high voltage signal processing element and the low voltage signal processing element can be separately integrated, and the high voltage signal processing element is used in the bipolar process and the low voltage signal processing element is used in the MOS process. The purpose is to provide a subscriber circuit of an exchange that can be highly integrated by designing.

Fifth, the high voltage signal processing element for processing the high voltage signal connected to each subscriber telephone in the exchange is processed in the bipolar process, and the low voltage signal processing element for processing the low voltage signal and the analog signal processing of the codec. MOS part
It is possible to design in the process, and the digital signal processing part of the codec is designed digitally, and a multiplexer / demultiplexer is provided between the analog codec and the digital codec, so that higher integration is possible. To provide a subscriber circuit of the exchange.

Sixth, to provide a subscriber circuit of the exchange capable of digitally removing an echo signal generated when a communication path is formed between the subscriber telephone and the exchange. It is in.

[0016]

In order to achieve such an object, the present invention relates to a subscriber circuit of an exchange to which a large number of subscriber lines are connected, the subscriber circuit being connected to the subscriber line and operating at a high voltage. And a first integrated circuit formed of a high-voltage element for performing an interface function with a subscriber telephone, the constituent element being formed in a bipolar process, and the first integrated circuit connected to the first integrated circuit to supply a digital level voltage as an operating power supply. And a second integrated circuit formed by a MOS process and connected to the highway, and the second integrated circuit and the highway are connected to each other. Is provided between the second integrated circuit and the third integrated circuit for digitally encoding and decoding data between the second integrated circuit and the third integrated circuit, and controls the subscriber circuit. Is the concentration circuit to form a speech path between the subscriber telephone set is selected is switched by switch, it characterized primarily in that consist accordance control unit.

In the third integrated circuit described above, the transmitter receives a decimator for reducing the oversampling frequency by removing the quantization noise of the quantized and received digital linear data, and an output of the decimator. A transmission filter that compensates for the loss that occurs during the decimation process, and a compressor that compresses the digital linear data from this transmission filter to encode it into nonlinear PCM data and then outputs it to the highway Section, which is connected to a highway, expands the encoded nonlinear digital data received from the highway, converts it to digital linear data, and outputs it, and a digital linear data is received from this expander. A receive filter that compensates for the loss and receives digital linear data from this receive filter, And a digital Σ-Δ modulator that receives and modulates digital linear data from the interpolator, converts the linear linear data into a 1-bit modulated signal, and outputs the modulated signal. And, a subtractor is provided between the decimator and the transmission filter,
Further, it is characterized in that a balance filter is connected to the output end of the reception filter so that the output of the balance filter is subtracted from the output of the decimator.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

FIG. 1 shows an example of the configuration of a subscriber circuit according to the present invention. The circuit shown in the same figure includes a power supply module (not shown), which is a high voltage level first circuit used in a subscriber circuit.
The power and the second power of the TTL level are supplied.

Each high voltage SLI of the high voltage SLIC section 100
C (1 to N) is formed by a bipolar process so as to withstand a high voltage, and uses the first power supply as an operating power supply. Each of these high voltage SLICs is connected to each subscriber line at a ratio of 1: 1 and performs an interface function between the subscriber telephone and the exchange. This high voltage SLI
The C section 100 is a high-voltage operating element that operates by the first power source in the SLIC, and is substantially connected to the subscriber's telephone and corresponds to a portion serving as an interface with the subscriber.

The low voltage operation unit 200 is formed by a MOS process and uses the second power supply as an operation power supply. Then, it is connected to the high voltage SLIC unit 100 and performs an interface function with the high voltage SLIC unit 100. The low voltage operating unit 200 is a high voltage SLIC unit 10.
It serves as an interface between the signal generated from 0 and the control unit (not shown) of the subscriber circuit, converts it into a digital signal for transmission through the highway, and converts the digital signal received through the highway into an analog signal. It is converted and output to the high voltage SLIC unit 100.
Therefore, the low-voltage operation unit 200 is a low-voltage SLIC that is an element that processes a low-voltage level signal in the SLIC.
It is composed of a unit 210 and an analog codec 220 which is an analog signal processing part of a codec / filter. The low-voltage SLIC unit 210 is composed of a CMOS device that interfaces with the control unit of the subscriber circuit, and the analog codec 220 converts an analog signal received from the subscriber line into a digital signal. It is composed of a converter and a D / A converter which converts a digital signal into an analog signal and outputs the analog signal to the subscriber line.

The line concentrator 300 is connected to the low voltage operation unit 200, multiplexes and outputs a plurality of digital signals received from the low voltage operation unit 200 under the control of the control unit of the subscriber circuit. In addition, the received digital signal is demultiplexed to be separated for each subscriber and applied to the low voltage operation unit 200. That is, the line concentrator 300 controls the overall operation of the subscriber circuit according to the subscriber's state, and controls the subscriber circuit controller to control the general operation of the subscriber circuit. Multiplexer unit 31 that connects with the mobile phone to form a communication path
0, which is switched under the control of the control unit of the subscriber circuit, and the specific subscriber of the low-voltage operation unit 200 is set as the receiving side.
And a demultiplexer unit 320 for relaying a received digital signal. Therefore, the concentrator 3
It can be seen that 00 performs the function of concentrating the subscriber line. Such an integration unit 300 is a time memory (time memory).
memory).

The digital codec 400 includes a concentrator 3
00 and the PCM highway, the digital signal received from the multiplexer unit 310 is encoded and output to the highway, and the digital signal received from the highway is decoded and output to the demultiplexer unit 320.

Next, the present invention will be described in more detail based on the above-mentioned structure.

Each high voltage SLI of the high voltage SLIC section 100
C is connected to the subscriber line 1: 1 respectively,
It receives the first power source as an operating power source and performs an interface function with the subscriber's telephone. This high voltage SLIC section 1
The elements that make up 00 are an interface with a high voltage signal to the subscriber line and are therefore formed by a bipolar process. That is, the high voltage SLIC unit 100 is composed of only elements that operate at a high voltage in the conventional SLIC.

On the other hand, the low-voltage SLIC section 210 is connected to the high-voltage SLIC section 100, and is constituted by an element that serves as an interface with the control section of the subscriber circuit. This low voltage S
The components of the LIC unit 210 are formed by a MOS process because they serve as an interface for signals of a low voltage level to the control unit of the subscriber circuit.

As described above, in the present invention, the SLIC
According to the characteristics of each element of, the high voltage signal processing portion and the low voltage signal processing portion is separated and used as separate semiconductor circuits, in particular, the high voltage signal processing portion is formed in a bipolar process, Since the low-voltage signal processing portion can be formed by the MOS process, the manufacturing process is not complicated, integration is facilitated, and higher integration is possible.

Further, in the prior art, the codec / analog processing section in which the analog processing section and the digital processing section coexisted.
For the filter, the analog processing portion can be separated and formed on the same chip as the low voltage SLIC 210.
That is, since the analog processing part of the codec / filter is formed by the MOS process, the low voltage SLI is used.
By using the C section 210 together, the manufacturing process of the subscriber circuit can be simplified and the circuit can be highly integrated. Then, the remaining part of the codec can be designed as another semiconductor circuit by the digital signal processing method to manufacture the digital codec 400. Therefore, it is possible to commonly use this digital codec 400 and process a large number of subscriber channels in a time division manner. That is,
In the present invention, the concentrating function can be performed before the subscriber side of the digital codec / filter.

FIG. 2 is a block diagram of the above SLIC. As shown in the figure, a portion for processing a high voltage signal and a portion for processing a low voltage signal in the SLIC are separated and embodied by separate semiconductor integrated circuits.
That is, an element is formed by selecting different manufacturing processes depending on the voltage level of the operating power supply (Vcc). In this example, each element is connected to a bipolar process and a MOS depending on the level of the operating power supply.
The process is divided into two steps, and the bipolar process is divided into a 90V class bipolar process and a 20V class bipolar process.

First, the first high voltage SLIC 110 formed by the 90V class bipolar process includes a line driver 111 including an element for supplying a ring signal to the subscriber line and an element for supplying a call current, and a subscriber line. A line sense unit 112, which is connected and includes an element for sensing the state of the subscriber's telephone, a relay driver 113 for controlling the communication path and communicating a status signal according to the state of the subscriber, and a power transistor for supplying power. 114, and these elements are designed by forming a high voltage bipolar transistor.

Next, the second high voltage SLIC 120 formed by the 20V class bipolar process controls the power supply of the call power (Battery Feed Controller).
) 121 is an interface between the subscriber line and
Hybrid unit that processes audio signals (Hybrid Trans-mis
son) 122, a loop unit (Longitudinal Loop) 123 forming a call loop with a subscriber line, a ring trip unit (Auto Ring Trip) 124, and other additional functions required by the subscriber's telephone set. Telemetering part (Telemetering) 125 and polarity reversing part (Polarity R)
eversal) 126 and. This second high voltage SL
A constituent element of the IC 120 is an element that processes an input signal using a power supply of 20 V class or less as an operating power supply, and is connected between the first high voltage SLIC 110 and the low voltage SLIC unit 210. Then, the second high-voltage SLIC 120 converts the high-voltage level signal received from the first high-voltage SLIC 110 into a low-voltage level signal that is the MOS power supply level, and outputs it to the low-voltage SLIC section 210 and the analog codec 220. Further, the signal received from the low voltage SLIC unit 210 or the analog codec 220 is converted and output to the first high voltage SLIC 110.

Further, the low voltage SLIC section 210 has a second
The status signal output from the second high voltage SLIC 120 and the analog codec 220 is connected between the high voltage SLIC 120 and the control unit of the subscriber circuit, and outputs the status signal to the control unit of the subscriber circuit. The control signal output from the control unit is applied to the second high voltage SLIC 120 or the analog codec 220. That is, the low voltage SL
The IC unit 210 performs an interface function with the control unit of the subscriber circuit and is designed by a MOS process. The low-voltage SLIC unit 210 outputs a control signal to the subscriber telephone and a decoder 211 for selecting a subscriber line under the control of the control unit of the subscriber circuit in order to receive the status signal of the subscriber telephone. To this end, a multiplexer 213 for selecting a subscriber line under the control of the control unit of the subscriber circuit, and a control interface serving as an interface for status signals and control signals between the selected subscriber line and the control unit of the subscriber circuit. And part 212.

As described above, since the high voltage SLIC portion 100 is formed in the high breakdown voltage bipolar process,
The reliability when the SLIC is integrated is increased. It is also possible to form such a high voltage circuit and a low voltage circuit such as a codec on the same semiconductor chip, but according to the present invention, a high voltage signal processing part having a relatively high defect rate is By configuring the chip independently from the low voltage signal processing part, even the low voltage signal processing part with a relatively low defect rate must be replaced at the same time as the high voltage signal processing part. Since waste can be eliminated and parts can be easily replaced, maintenance management can be performed more easily and cheaply. In addition, since the chips are configured independently according to the operating voltage level, it is possible to highly integrate each functional block, and when defective, only the relevant chip needs to be replaced. Therefore, it is possible to further reduce the maintenance cost.

Next, a configuration example of the codec / filter according to the present invention will be described.

The codec / filter is a filter, A /
The D conversion unit, the D / A conversion unit, the compressor for converting linear data into PCM data, the decompressor for converting PCM data into linear data, and the control means for controlling them.
The codec having such a configuration has an analog signal processing part and a digital signal processing part. Conventionally, these two parts are formed on one chip, in which case the codec / filter is formed by an analog method. On the other hand, in the present invention, the codec / filter is separated and integrated into the analog signal processing part and the digital signal processing part.

In this case, the analog signal processing portion of the codec / filter is combined with the low voltage SLIC 210,
It is formed on the same chip by a MOS process. The analog codec 220 that processes the analog signal in the codec / filter includes an A / D converter that converts the analog signal into a digital signal and a D / A converter that converts the digital signal into an analog signal. Then, the A / D conversion unit and the D / A conversion unit of the analog codec 220 perform a conversion function using an oversampling technique in order to minimize components. This oversampling technique performs quantization by sampling an original signal at a frequency corresponding to 2 ^N (N: natural number) of Nyquist rate, and by using this technique, a reproduction filter Also, an anti-aliasing filter (AAF) can be realized in a small area of the chip.

On the other hand, since the digital codec 400 can implement the voice band filter by a general-purpose digital signal processor, it is manufactured by digital signal processing. As a result, it becomes possible to easily add the echo signal removing function, which is difficult to be realized by the analog codec / filter. Then, by separating the digital element in the codec / filter from the analog signal processing part and integrating it by the digital signal processing method, it becomes possible to process a large number of subscriber channels simultaneously by the time division multiplexing method. , It becomes easy to adjust the characteristics of the whole system by the program. Therefore, the digital codec 400 can provide stability against temperature, aging, noise, etc., which are advantages of the digital system, and can contribute to high integration and downsizing of the entire system.

FIG. 3 is an overall block diagram of the codec / filter according to the present invention. As shown in FIG. 3, the codec / filter includes an analog codec 220 that processes an analog signal and a digital codec 400 that processes a digital signal, and also outputs a signal from a subscriber to the PCM highway. Transmitter and P
And a receiver for transmitting a signal received through the CM highway to the subscriber side.

The analog codec 220 is a part for processing an analog signal in the codec / filter, belongs to the low-voltage operation section 200, and has an A / D conversion section 2.
51 and the D / A converter 252.

The A / D conversion unit 251 is connected to the low voltage SLIC unit 210, and in order to prevent aliasing during oversampling, the low voltage SLIC unit 251 is used.
An anti-aliasing filter 221 that filters an analog signal received from the unit 210, and a transmission analog signal that is connected between the anti-aliasing filter 221 and the multiplexer unit 310 and is received from the anti-aliasing filter 221 are oversampled. Analog Σ− converted to digital linear data and output
And a Δ modulator (Analog Sigma-Delta Modulator) 222.

FIG. 4 shows a specific circuit example of the analog Σ-Δ modulator 222. In this example, the input analog signal is oversampled to 128 times the Nyquist rate. This analog Σ-Δ modulator 22
2 is a two-stage cascade configuration of integrators 231 and 232 using a switched capacitor (2nd
order cascade form) and then integrator 23
The output of 2 is applied to the comparator 233, and the analog signal to be transmitted is converted into digital linear data and output.

The D / A converter 252 is constructed by using a smoothing filter 223. The smoothing filter 223 is used by the demultiplexer unit 3
20 and the low voltage SLIC unit 210, the digital linear data received by the channel selected by the demultiplexer unit 320 is filtered and converted into an analog signal for output.

On the other hand, the digital codec 4 shown in FIG.
00 is a digital signal processing portion of the codec which is separated and independently integrated. The digital codec 400 of this example is roughly divided into an encoding unit 451 and a decoding unit 452.

The encoding unit 451 has a multiplexer unit 31.
A decimator 401 for receiving digital linear data from a subscriber selected by the multiplexer unit 310, removing quantization noise contained in the digital linear data, and reducing the sampling frequency; A transmission filter (Tx Band Pass Filter) 402 that filters a digital signal received from the decimator 401 to compensate for a loss generated in the decimation process, and is connected between the transmission filter 402 and the transmission PCM highway. The digital linear data output from is compressed by a preset encoding method and transmitted.
Compressor output to CM highway (compressor & PCM
interface) 403.

The decoding unit 452 is connected to the receiving PCM highway and expands the encoded data received from the receiving PCM highway by a preset method to decode it into digital linear data (expander & PCM interfac).
e) 411 and the expander 411 connected to the expander 4
Filtering the digital linear data received from 11
A reception filter (Rx Low Pass Filter) 412 for compensating for a loss signal generated at the time of decoding, and this reception filter 4
12, an interpolator 413 for increasing the sampling frequency of the digital linear data received from the reception filter 412, a connection between the interpolator 413 and the demultiplexer unit 320, and reception from the interpolator 413. A digital Σ-Δ modulator that converts digital linear data into 1-bit PDM data and outputs the 1-bit PDM data to the demultiplexer unit 320.
r) 414. This digital Σ
A block configuration diagram shows a configuration example of the -Δ modulator 414.

Thus, the digital codec 400
If the digital signal processing is realized, it becomes possible to prevent the generation of an undesired echo signal at the time of connection between the subscriber telephone and the exchange. To remove this echo signal, the encoding unit 451 and the decoding unit 45
An echo removing unit is provided between the two. The echo canceller is connected to the output end of the reception filter 412 of the decoding unit 452, balances the output of the reception filter 412 and outputs the balanced filter (Digital Hybrid Balance Filter) 421, and the decimator 401. Subtractor 42 that removes the unnecessary echo signal by subtracting the output of the balance filter 421 from the output
2 and.

The above-mentioned decimation, transmission filtering, reception filtering, interpolation, and echo removal processes are shown in detail in FIG. Further, FIG. 6 shows attenuation of gain caused by decimation and interpolation in the digital codec 400. Next, the operation of each unit will be described with reference to these drawings.

The concentrator unit 300 shown in FIG. 3 includes a multiplexer unit 310 and a demultiplexer unit 320 that perform a concentrating function. The multiplexer unit 310 has a large number of A / D conversion units 251 of the analog codec 220 connected to the input side, and the demultiplexer unit 320.
On the output side, a large number of D / A conversion units 252 of the analog codec 220 are connected. The output end of the multiplexer unit 310 is connected to the encoding unit 451 of the digital codec 400, and the input end of the demultiplexer unit 320 is the decoding unit 452 of the digital codec 400.
Connected with. The multiplexer unit 310 and the demultiplexer unit 320 switch to the subscriber line of the corresponding subscriber under the control of the control unit of the subscriber circuit,
Select the calling subscriber.

First, the analog codec 220 A /
The operation of the D conversion unit 251 will be described. The anti-aliasing filter 221 filters the analog signal. The anti-aliasing filter 221 performs a function of preventing aliasing of a signal generated in the process of oversampling when the analog Σ-Δ modulator 222 converts an analog signal into digital linear data. Then, the analog Σ-Δ modulator 222 that receives the output of the anti-aliasing filter 221 oversamples the received analog signal at a sampling frequency that is 2 ^N times the Nyquist rate. This analog Σ
The −Δ modulator 222 can be configured as shown in FIG. 4, and has a switched capacitor integrator 231, 23.
2 and the characteristics of the comparator 233, the A / D conversion performance can be adjusted.

Generally, in the PCM codec, 13 to 1 is used.
4-bit dynamic range and 1
An accuracy of about 2 bits is required. Therefore, in order to satisfy this condition, in the present embodiment, the analog Σ-Δ
The modulator 222 is embodied as a two-stage cascade type modulator. Furthermore, the sampling frequency for performing oversampling needs to be 2 ^N times 8 KHz, which is the Nyquist rate, so a frequency of 1.024 MHz, which is 128 times, is used as the sampling frequency. Therefore, a switched capacitor type integrator 2
31 and 232 are oversampling signals φ1 and φ2 (the signals φ1 and φ2 having a frequency of 1.024 MHz).
2 have the same frequency but do not overlap each other), the comparator 233 outputs the received analog signal at 1.024 MHz.
Oversample to z and modulate to digital linear data. As a result, the final output data of the analog Σ-Δ modulator 222 is PDM (Pulse Density Modulatio).
n) converted into a signal having a 1-bit resolution.

The digital linear data output through the A / D conversion unit 251 of the analog codec 220 is transmitted through the multiplexer unit 310 to the digital codec 4
00 decimator 401. Then, the decimator 401 removes the quantization noise in the high frequency band generated in the process of converting the analog signal into the digital linear data in the analog Σ-Δ modulator 222, and the oversampling frequency used in the conversion process. Carry out the action of lowering. Decimator 401 of this embodiment
As shown in FIG. 5, the operation of lowering the sampling frequency is performed in three stages.

The first decimation section DE shown in FIG.
An up / down counter is used for C1, and its transfer function is represented by the following mathematical expression (1). Then, the second decimation unit DEC2 has a triangular window (triangular w
indow), and its transfer function is expressed by the following equation (2).

[0053]

[Equation 1]

[Equation 2]

In this way, the decimation section DEC
1 and DEC2, the sampling frequency is 1.02
It goes from 4 MHz to 64 KHz. The output of the decimation unit DEC2 is the decimation unit DEC3.
The sampling frequency is lowered again.
The decimation unit DEC3 is also a triangular window, and its transfer function can be expressed by the following mathematical expression (3). By performing the decimation according to this mathematical expression (3), the sampling frequency is lowered from 64 KHz to 32 KHz.

[0055]

[Equation 3]

The decimation process of the decimator 401 is performed in three steps as shown in FIG. 5, and the oversampling frequency is 1.0
At the same time as being lowered from 24 MHz to 32 kHz, the quantization noise in the high frequency band generated during oversampling is removed. FIG. 6A shows the above equations (1) to (1).
The in-band frequency characteristics of the transfer function obtained by combining (3) are shown. Referring to this, it can be seen that the higher the frequency, the more the signal loss increases.

The transmission filter 402 that receives the output of the decimator 401 is CCITT Recommendation G. Based on 712, it filters the input signal and compensates for the signal loss that occurs during the decimation process. The transmission filter 402 uses a bandpass filter, and has a configuration in which a low-pass filter and a high-pass filter are connected in series as shown in FIG. The low-pass filter is a fifth-order elliptic filter (5th elliptic filter), and the high-pass filter is a third-order elliptic filter, which has a cascaded form of two-stage biquad.

The digital linear data output from the transmission filter 402 must be encoded into PCM data required by the system. Therefore, the compressor 403
Of the digital linear data output from the transmission filter 402 by A law or μ law.
Is converted into 8-bit PCM data and output. At this time, P
The A-law or the μ-law, which is the CM encoding method, is designed to be selected from the outside. Therefore,
The compressor 403 receives the digital linear data that has passed through the transmission filter 402, compresses the digital linear data according to the selected encoding method, encodes the nonlinear data, and outputs the nonlinear data to the transmission PCM highway. At that time, the compressor 403 operates at 8 KHz.
Compress the input signal using the sampling frequency of.

PCM compressed by the above process
The data is transmitted to the other subscriber through the exchange.
Then, on the other party's subscriber side, the received encoded data must be decoded and converted into an analog signal by the procedure reverse to this encoding process and applied to the corresponding subscriber. Next, the process will be described.

When the encoded data is received from the reception PCM highway, the decompressor 411 decompresses the 8-bit PCM data encoded into the non-linear data into the original quantized data. In this way, when the decompressor 411 decodes the received encoded data, the law used at the time of encoding is used. That is, the A-law or μ-law similar to that used at the time of encoding is used so that it can be selected from the outside. That is, the decompressor 411 converts the non-linear data received through the reception PCM highway into digital linear data which is the original quantized data form and outputs it.

The digital linear data output from the decompressor 411 is low-pass filtered by the reception filter 412 in order to compensate for the loss that occurs during interpolation. As shown in FIG. 5, the reception filter 412 is a fifth-order elliptic filter similar to the low-pass filter of the transmission filter 402, and has a two-stage biquad cascade configuration.

Here, since the received digital linear data is in a state in which the oversampling frequency is lowered through the decimation process on the transmitting side, the receiving side performs the interpolation process and the reduced sampling frequency is used as the basis. The oversampling frequency must be increased. At this time, even in this interpolation process, FIG.
As indicated by, the signal loss due to the increase in frequency is induced, and therefore the reception filter 412 is designed to compensate for the loss generated in the interpolation process.

The digital linear data compensated by the reception filter 412 is applied to an interpolator 413, and the interpolator 413 performs a two-stage interpolation process as shown in FIG. Restored to oversampling frequency. Such an interpolator 413
Have the same transfer function as the decimator 401. That is, the transfer function of the first interpolation unit INT1 is expressed by the following mathematical expression (4), and the sampling frequency is increased from 32 kHz to 64 kHz.

[0064]

[Equation 4]

The transfer function of the second interpolation unit INT2 is expressed by the following equation (5), and the sampling frequency is increased from 64 kHz to 1.024 MHz.

[0066]

[Equation 5]

When the sampling frequency is increased in this way, the sampling frequency output from the interpolator 413 returns to the original oversampled frequency.

The digital Σ-Δ modulator 414 receives the output of the interpolator 413 and converts it into 1-bit PDM data. This digital Σ-Δ modulator 414 can be configured as shown in FIG. 7 by a digital signal processing method. In the digital Σ-Δ modulator 414 of this example, X (z) is the output signal of the interpolator 413, and Y (z) is
(Z) is the output of the digital Σ-Δ modulator 414, which is 1-bit PDM data. Therefore, the data that has passed through the interpolator 413 is the digital Σ-Δ modulator 414.
Is converted into a 1-bit PDM signal, and this PDM signal is applied to the smoothing filter 223 via the demultiplexer unit 320. Then, the smoothing filter 223 removes the high frequency component contained in the modulation signal output from the digital Σ-Δ modulator 414, and converts the received PDM data into an analog signal and outputs it.

Digital codec 400 as described above
, The echo signal can be removed in the digital codec 400. That is, for example, 2-wire type 2
When a two-wire full-duplex subscriber telephone is connected to a four-wire, two-wire full-duplex switch, an undesired echo signal is generated. Such an echo signal is generated as noise during a call, which causes a problem that the quality of the call is deteriorated. Therefore, since it is necessary to remove the echo signal, the removal operation is performed in the digital codec 400 in the present invention.

In order to remove the echo signal in this way, a balance filter 421 is connected in parallel with the interpolator 413 at the output end of the reception filter 412, and the decimator 4
01 and the transmission filter 402, a subtractor 422 is connected between the output of the decimator 401 and the balance filter 4
The output of 21 is subtracted and output to the transmission filter 402. Thereby, the balance filter 421
Is connected between the reception filter 412 and the transmission filter 402 and performs a function of removing an echo signal generated when the exchange and the subscriber side are connected. In this example,
The balance filter 421 includes a 1-pole IIR filter (single-pole IIR filter) and a 7-tap FIR filter (7-tap FIR filter), and its operating frequency is 16 KHz.

When the codec / filter is designed separately for the analog codec 220 and the digital codec 400 as described above, the A / D conversion function is performed by the oversampling method and the filter is designed by the digital signal processing method. Then, the data generated from many analog codecs 200 can be processed by one digital codec 400. Therefore,
When the digital signal is multiplexed / demultiplexed by the time division multiplexing method, the line concentrating function of the subscriber line can be performed in the preceding stage on the subscriber side of the digital codec 400. As a result, the analog codec 220 connected to each subscriber line 1: 1
Can be commonly connected to the digital codec 400 by a time division method.

In order to perform such a concentrating function, in this embodiment, the concentrating section 300 is provided between the analog codec 220 and the digital codec 400. The concentrator 300 switches the data output from a number of subscriber lines by time division multiplexing and outputs the data to the transmission PCM highway, and the digital signal received through the reception PCM highway is demultiplexed by the time division method. The signals are multiplexed and applied to the corresponding subscriber line side.
In such a concentrator 300, the switching function of the time division multiplexing method can be realized by using a memory.
In this case, the concentrator 300 has a time memory form in which the data of each subscriber is switching-controlled by the controller of the subscriber circuit.

There are two types of calls, namely, an outgoing call in which the subscriber hooks off and tries to make a call, and an incoming call in which a call received from the outside is answered. First, the operation during an outgoing call will be described next.

The control section of the subscriber circuit controls the low voltage SLIC section 210 to monitor the status of the subscriber line, and
The multiplexer unit 310 is controlled by the time division multiplexing method, and the A / D conversion unit 251 of each analog codec 220 is controlled.
Are sequentially connected to the encoding unit 451 of the digital codec 400. Further, the control unit of the subscriber circuit controls the demultiplexer unit 320 by the time division multiplexing method to connect the output terminal of the decoding unit 452 of the digital codec 400 to the D / A conversion unit 252 of the analog codec 220. .

Therefore, the control section of the subscriber circuit controls the multiplexer section 310 to connect the analog codec 220 connected to a large number of subscriber lines to the digital codec 400 in a time division manner. That is, the analog voice signal generated from the subscriber line is converted into a digital signal by the A / D converter 251 of the corresponding analog codec 220, and the converted digital signal is
Time-division multiplexed, common digital codec 400
Applied to. Then, the digital codec 400
Encodes the digital linear data which is time-division multiplexed and received from the A / D converter 251 of the analog codec 220 and outputs the encoded digital linear data to the transmission PCM highway.

On the other hand, the control unit of the subscriber circuit controls the demultiplexer unit 320 by the time division multiplexing method,
The data received through the reception PCM highway is applied to the D / A conversion unit 252 of the analog codec 220 of the corresponding subscriber. That is, the demultiplexer unit 3
The demultiplexing unit 20 demultiplexes the output of the decoding unit 452 of the digital codec 400 by the time division multiplexing method under the control of the control unit of the subscriber circuit, and the D / A conversion unit 252 of the analog codec 220 of the corresponding subscriber. Then, the D / A converter 252 converts the received digital linear data into an analog audio signal and outputs it.

The operation when the line concentrator 300 has a 16: 1 line concentrating function will now be described. In this case, in the multiplexer unit 310, the A / D conversion units 251 of the analog codec 220 of the corresponding 16 subscriber lines are respectively connected to the first input terminal to the sixteenth input terminal, and the output terminal thereof is the digital codec 400. It is connected to the input end of the encoding unit 451. The input terminal of the demultiplexer unit 320 is
It is connected to the output terminal of the decoding unit 452 of the digital codec 400, and the first output terminal to the 16th output terminal correspond to the corresponding 16 terminals.
Are connected to the input terminals of the D / A converter 252 of the analog codec 220 of the subscriber line. Therefore,
The concentrator 300 having such a structure condenses 16 subscriber lines and controls the formation of a speech path between the subscriber telephone and the PCM highway of the exchange. Further, such a concentrator 300 can set the concentrating capacity according to the characteristics of the subscriber connected to the subscriber circuit. That is, when the call frequency of the subscriber connected to the subscriber circuit is high, the line concentrating ratio is lowered, and when the call frequency is low, the line concentrating ratio is increased, so that the subscriber line can be efficiently concentrated.

[0078]

As described above, according to the present invention,
First, by separating and integrating the high voltage operation part and the low voltage operation part of the SLIC, it is possible to minimize the part using the high voltage bipolar process, improve reliability, and reduce power consumption. Can be reduced.

Second, the low voltage operation part of the SLIC and the analog signal processing part of the codec are MOS-packaged on the same chip.
By using the process, the risk of power consumption and damage due to high voltage can be reduced, and the area of the chip can be made smaller.

Thirdly, the codec is divided into an analog signal processing part and a digital signal processing part so as to be integrated, so that the degree of integration can be easily increased according to the process technology. Since all signals can be digital signals, it is easy to test and the inspection cost can be reduced.

Fourth, since the analog signal processing part of the codec connected to each subscriber line can be connected to one common digital codec through the multiplexing means, many time division methods are used. It is possible to process subscribers with one digital codec.

Fifth, since the analog signal processing portion and the digital signal processing portion are completely separated in the codec, the influence of the digital signal processing portion and the analog signal processing portion can be eliminated, and the signal pair The characteristics of the noise ratio (SN ratio) become very good.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a subscriber circuit according to the present invention.

FIG. 2 is an internal configuration diagram showing a configuration example of the SLIC shown in FIG.

3 is an internal configuration diagram showing a configuration example of a codec / filter shown in FIG.

FIG. 4 is a circuit diagram showing a configuration example of an analog Σ-Δ modulator shown in FIG.

5 is a block diagram illustrating processing of a transmission / reception audio signal in the digital codec shown in FIG.

FIG. 6 is a characteristic diagram showing gain attenuation in the process of decimating or interpolating an audio signal.

7 is an internal configuration diagram showing a configuration example of the digital Σ-Δ modulator shown in FIG.

FIG. 8 is a configuration diagram showing a conventional example of a subscriber circuit.

FIG. 9 is an internal configuration diagram of the SLIC shown in FIG.

[Explanation of symbols]

 100 high-voltage SLIC section 200 low-voltage operation section 210 low-voltage SLIC section 220 analog codec 221 anti-aliasing filter 222 analog Σ-Δ modulator 223 smoothing filter 231, 232 integrator 233 comparator 251 A / D converter 252 D / A Conversion unit 300 Concentration unit 310 Multiplexer unit 320 Demultiplexer unit 400 Digital codec 401 Decimator 402 Transmission filter 403 Compressor 411 Expander 412 Reception filter 413 Interpolator 414 Digital Σ-Δ modulator 421 Balance filter 422 Subtractor 451 Encoding unit 452 Decoding section

Claims (34)

[Claims] 1. A subscriber circuit of a switchboard for connecting a large number of subscriber lines, each of which is connected to a large number of subscriber lines, and which converts the received analog signal into digital data and outputs the digital signal, said digital means. Coding means for receiving data, compensating for quantization noise contained in the digital data, coding and outputting to the highway, and provided between the converting means and the coding means, and controlling the subscriber circuit. A subscriber circuit for multiplexing the output of the conversion means according to the control unit and outputting the multiplexed output to the encoding means side. 2. The converting means receives an analog signal,
A filter for filtering so as to prevent aliasing of a signal generated at the time of sampling, and a modulator connected to this filter for oversampling the signal after filtering at a frequency ^2N times the sampling frequency and converting the signal into a digital signal are provided. The subscriber circuit according to claim 1, wherein 3. The modulator includes one or more stages of integrators using a switched capacitor and has a sampling frequency of 2 ^N
Sampling means for oversampling the signal received from the filter switched by double the frequency, and comparing means for receiving the output of this sampling means and comparing it to a predetermined level to generate a pulse modulated signal with 1-bit resolution The subscriber circuit according to claim 2, wherein the subscriber circuit is an analog Σ-Δ modulator. 4. The encoding means removes quantization noise of digital data received after being quantized and receives a decimator for lowering an oversampling frequency and an output of the decimator to compensate for a loss generated in a decimation process. 3. The subscriber circuit according to claim 2, further comprising: a transmission filter for transmitting the output of the transmission filter, a compressor for receiving and compressing an output of the transmission filter, encoding the nonlinear PCM data, and outputting the highway. 5. The compressor is adapted to select A-law or μ-law according to a selection from the outside, and compresses the number of bits of received digital data based on the selected law, 5. The subscriber circuit according to claim 4, which is adapted to be converted into encoded PCM data and output. 6. The subscriber circuit according to claim 2, wherein the multiplexing means is configured by using a memory having a time memory structure. 7. A subscriber circuit of a switchboard for connecting a number of subscriber lines, the decoder circuit being connected to a highway and decoding encoded digital data received from the highway into digital linear data. According to a control unit that is provided between the decoding unit and the conversion unit, which is connected to each line and converts the received digital linear data into an analog signal and provides the analog signal to the subscriber line, the control unit controls the subscriber circuit. A subscriber circuit, comprising: demultiplexing the output of the decoding means to output to the corresponding converting means side, and multiplexing means for performing a concentrating function. 8. The decoding means is connected to a highway, expands the encoded digital data received from the highway and converts the expanded digital data into digital linear data, and outputs the expanded digital linear data. Receiving a digital linear data from this receiving filter and compensating for the loss, and an interpolator for increasing the sampling frequency of the receiving linear filter, and receiving and modulating the digital linear data from this interpolator to modulate 1-bit 8. The subscriber circuit according to claim 7, further comprising a digital .SIGMA .-. DELTA. Modulator for converting and outputting the signal. 9. The highway is a PCM highway,
The decompressor is adapted to select the A-law or μ-law according to the selection from the outside, and based on the selected law, expands the number of bits of the received PCM data and converts it into digital linear data. 9. The subscriber circuit according to claim 8, wherein the subscriber circuit is configured to output the output. 10. The converting means according to claim 8, wherein the converting means is connected to an output end of the multiplexing means, and is configured by using a filter for converting a high frequency component contained in a received signal into an analog signal. Subscriber circuit. 11. The multiplexing means is constituted by using a memory having a time memory structure.
Subscriber circuit described. 12. In a subscriber circuit of an exchange to which a large number of subscriber lines are connected, a transmitter is connected to each subscriber line, and a first conversion unit converts a received analog signal into digital data and outputs the digital data. Means for receiving the digital data, compensating for the quantization noise contained in the digital data, encoding and outputting the encoded data to the highway, and provided between the first converting means and the encoding means. , A first multiplexing means for performing a concentrating function by multiplexing the output of the first converting means according to a control section for controlling the subscriber circuit and outputting the multiplexed output to the encoding means side. Are connected to the highway, decoding means for decoding encoded digital data received from the highway into digital linear data, subscriber lines and A second conversion means for connecting the received and received digital linear data to an analog signal and providing the analog signal to the subscriber line, and a control section provided between the decoding means and the second conversion means for controlling the subscriber circuit. A second multiplexing means for performing a concentrating function by demultiplexing the output of the decoding means according to the above and outputting it to the corresponding second converting means side. 13. The first conversion means is connected to an anti-aliasing filter that receives an analog signal and filters so as to prevent aliasing of the signal generated at the time of sampling, and is connected to the anti-aliasing filter.
13. The subscriber circuit according to claim 12, further comprising: a first modulator for oversampling the filtered signal at a frequency ^2N times as high as the sampling frequency for digital conversion. 14. The first modulator includes one or more stages of integrators using a switched capacitor, and sampling means for oversampling a signal received from an anti-aliasing filter by switching at a frequency ^2N times the sampling frequency. 14. An analog .SIGMA .-. DELTA. Modulator comprising: and a comparing means for receiving the output of the sampling means and comparing it with a predetermined level to generate digital linear data having a 1-bit resolution. Subscriber circuit. 15. The encoding means removes quantization noise of digital linear data that is quantized and received, and receives a decimator that lowers an oversampling frequency and an output of the decimator, and eliminates a loss generated in a decimation process. 14. The subscriber circuit according to claim 13, further comprising a transmission filter for compensation, and a compressor for compressing digital linear data from the transmission filter to encode it into non-linear PCM data and then outputting it to a highway. 16. The compressor is responsive to external selection of A
The law or μ law is selected, and based on the selected law, the number of bits of the received digital linear data is compressed, converted into encoded PCM data, and output. 16. The subscriber circuit according to claim 15, wherein: 17. The subscriber circuit according to claim 13, wherein the first multiplexing means is configured by using a memory having a time memory structure. 18. The decryption means is connected to a highway,
A decompressor that decompresses encoded nonlinear digital data received from the highway, converts the decompressed digital data into digital linear data and outputs the decompressed signal, and a reception filter that receives the digital linear data from the decompressor and compensates for the loss. An interpolator for receiving digital linear data from the reception filter and increasing its sampling frequency; and a second modulator for receiving and modulating the digital linear data from the interpolator, converting the digital linear data into a 1-bit modulated signal, and outputting the modulated signal. 13. The subscriber circuit of claim 12, comprising: 19. The highway is a PCM highway, and the expander is adapted to select A-law or μ-law according to a selection from the outside, and the received nonlinear digital signal is based on the selected law. 19. The subscriber circuit according to claim 18, wherein the number of bits of PCM data of data is expanded and converted into digital linear data for output. 20. The second conversion means is connected to the output terminal of the second multiplexing means, removes high frequency components included in the received signal, converts the analog signal into an analog signal, and outputs the analog signal to the corresponding subscriber line. 19. The subscriber circuit according to claim 18, which is configured using a filter. 21. The subscriber circuit according to claim 18, wherein the second multiplexing means is configured by using a memory having a time memory structure. 22. In a subscriber circuit of an exchange to which a large number of subscriber lines are connected, a high voltage element which is connected to the subscriber line and performs an interface function with a subscriber telephone using a high voltage as an operating power source. And its constituent elements are provided between a high voltage operating section formed by a bipolar process and a high voltage operating section and a control section of the subscriber circuit, and the low voltage is used as an operating power source for the high voltage operating section and the subscriber circuit. A low-voltage operating unit that is configured by a low-voltage element that performs an interface function with the control unit, and the constituent element is formed by a MOS process, and these high-voltage operating unit and low-voltage operating unit are provided. The subscriber circuit is characterized by being separated and integrated. 23. In a subscriber circuit of an exchange to which a large number of subscriber lines are connected, a high voltage element that is connected to the subscriber line and performs an interface function with a subscriber telephone using high voltage as an operating power source. A first integrated circuit whose constituent elements are formed by a bipolar process, and an element that is connected to the first integrated circuit and performs an interface function between the first integrated circuit and the exchange using a digital level voltage as an operating power supply. And its constituent elements are M
A second integrated circuit formed by the OS process, and a third integrated circuit provided between the second integrated circuit and the highway and encoding and decoding data by a digital method. Subscriber circuit. 24. The second integrated circuit converts an analog signal into digital linear data, and an element unit including an element for an interface function between the first integrated circuit and a control unit for controlling a subscriber circuit. 24. The subscriber circuit according to claim 23, further comprising: an analog codec section composed of an element for outputting and outputting the converted digital linear data into an analog signal for output. 25. The analog codec section, wherein the transmitting side receives an analog signal and filters it so as to prevent aliasing of the signal generated at the time of sampling, and a filter connected to this filter for sampling the filtered signal. A modulator for oversampling at a frequency 2 ^N times higher than that for digital conversion, and the receiving side has a filter for receiving digital linear data and converting high frequency noise to an analog signal. The subscriber circuit according to claim 24. 26. The modulator includes one or more stages of integrators using a switched capacitor and has a sampling frequency of 2 or more.
Sampling means for oversampling the signal from the filter by switching at a frequency of ^N times, and comparing means for receiving the output of the sampling means and comparing it with a predetermined level to generate a pulse modulated signal having a 1-bit resolution. 26. The subscriber circuit according to claim 25, which is an analog .SIGMA .-. DELTA. 27. A third integrated circuit, wherein a transmitter receives a decimator for reducing an oversampling frequency by removing quantization noise of digital linear data which is quantized and received, and an output of the decimator,
The reception filter comprises a transmission filter for compensating for the loss generated in the decimation process, and a compressor for compressing the digital linear data from the transmission filter to encode it into nonlinear PCM data and then outputting it to the highway. Side is connected to a highway, expands the encoded nonlinear digital data received from the highway, converts it to digital linear data, and outputs it, and digital linear data is received from this expander and lost. For compensating the received signal, an interpolator for receiving the digital linear data from the receive filter and increasing the sampling frequency thereof, and for receiving the digital linear data from the interpolator for modulation and converting it into a 1-bit modulated signal. The subscriber circuit according to claim 23, further comprising a digital Σ-Δ modulator for outputting. 28. A subtracter is provided between the decimator and the transmission filter, and a balance filter is connected to the output end of the reception filter so that the output of the balance filter is subtracted from the output of the decimator. 28. The subscriber circuit according to claim 27. 29. In a subscriber circuit of an exchange to which a large number of subscriber lines are connected, a high voltage element which is connected to the subscriber line and performs an interface function with a subscriber telephone using a high voltage as an operating power source. A first integrated circuit whose constituent elements are formed in a bipolar process, and an element that is connected to the first integrated circuit and performs an interface function between the first integrated circuit and the exchange using a digital level voltage as an operating power supply. And its constituent elements are M
A second integrated circuit formed by an OS process, a third integrated circuit connected to the highway and encoding and decoding data between the second integrated circuit and the highway by a digital method, the second integrated circuit and the third integrated circuit. And a concentrator circuit that is provided between the integrated circuit and a switching unit that is switched according to a control unit that controls the subscriber circuit and that forms a speech path between the subscriber telephone and the exchange. Subscriber circuit to do. 30. The second integrated circuit converts an analog signal into digital linear data, and an element unit including an element for an interface function between the first integrated circuit and the control unit of the subscriber circuit. 30. The subscriber circuit according to claim 29, comprising: an analog codec section composed of an element which outputs and converts the digital linear data into an analog signal and outputs the analog signal. 31. The analog codec section, wherein the transmitting side receives an analog signal and filters it so as to prevent aliasing of the signal generated at the time of sampling, and a filter connected to this filter for sampling the filtered signal. A modulator that performs oversampling at a frequency of 2 ^N times and performs digital conversion, and the receiving unit includes a filter that receives digital linear data and removes high frequency noise and converts the analog signal into an analog signal. The subscriber circuit according to claim 30. 32. A third integrated circuit, wherein a transmitter receives a decimator for reducing an oversampling frequency by removing quantization noise of digital linear data which is quantized and received, and an output of the decimator,
The reception filter comprises a transmission filter for compensating for the loss generated in the decimation process, and a compressor for compressing the digital linear data from the transmission filter to encode it into nonlinear PCM data and then outputting it to the highway. And a decompressor that is connected to the highway, decompresses the encoded nonlinear digital data received from the highway, converts the decompressed nonlinear digital data into digital linear data, and outputs the decompressed digital linear data. A reception filter that compensates for loss, an interpolator that receives digital linear data from this reception filter and increases the sampling frequency, and a digital linear data that is received from this interpolator and modulated to convert it to a 1-bit modulated signal. 30. The subscriber circuit according to claim 29, further comprising a digital .SIGMA .-. DELTA. 33. A subtracter is provided between the decimator and the transmission filter, and a balance filter is connected to the output end of the reception filter so that the output of the balance filter is subtracted from the output of the decimator. 33. The subscriber circuit according to claim 32. 34. The concentrator circuit is provided between the plurality of second integrated circuits and one third integrated circuit, and selects the output end of the second integrated circuit by the control of the control unit of the subscriber circuit. A first multiplexing unit that is connected to the input terminal of the third integrated circuit and performs time-division multiplexing, and is provided between one third integrated circuit and a large number of second integrated circuits. A second multiplexer that selectively connects the output terminal of the third integrated circuit to the input terminal of the second integrated circuit under the control of the control unit and performs demultiplexing in a time division manner. The subscriber circuit according to any one of 29 to 34.