GB2225516A - Speech codec - Google Patents

Abstract

A speech codec arrangement has a plurality of encoding/decoding units 12-14 for implementing different encoding/decoding algorithms, eg for cordless telephones or mobile radios. Means 15 select one of units 12-14 in response to an algorithm selection signal and analogue-to-digital converter 11 digitises analogue speech signals to be applied to the selected encoding units. Digital-to-analogue converter 21 receives digital signals from the selected decoding units. The converters both have a sampling frequency which is a common multiple of the sampling frequencies required by the different encoding/decoding units 12-14. <IMAGE>

Description

SPEECH CODEC ARRANGEMENT.

This invention relates to a speech codec (coder/decoder) arrangement suitable for use in cordless telephone, mobile radio and other applications where multi-standard equipments are expected to operate.

There is currently under development a generation of cordless telephone equipments in which portable subscribers handsets can be used in conjunction with fixed terminals accessible in public places, provided the subscriber is located within a predetermined distance of a terminal. Common radio link standards are being developed for the subscriber handset/fixed terminal links but as yet no common standard for speech coding has been agreed by the various manufactures of the portable equipments. Hence to make full use of this type of system the fixed terminals will have to work with a variety of speech coding standards. At the present time some of the coding algorithms being used by different manufacturers include two versions of Adaptive Differential PCM (ADPCM1 and ADPCM2) and Continuously Variable Slope Delta Modulation (CVSD).ADPCM1 and ADPCM2 are wholly digital in implementation and utilise a comparatively low signal sample rate of 8 kHz. CVSD is conventionally part analogue /part digitally implemented with an analogue input. The relevant decoders are complementary. If a fixed terminal is required to interface with different manufacturers handsets then it should be able to work with the different algorithms favoured by the manufacturers.

According to the present invention there is provided a speech codec arrangement having a plurality of encoding/decoding means for implementing different encoding/decoding algorithms, means for selecting one of the encoding/decoding means in response to an algorithm selection signal received from an external equipment, analogue-to-digital conversion means for digitising analogue speech signals to be applied to the selected encoding means and digital-to-analogue conversion means to which digital signals from the selected decoding means are applied, said conversion means both having a sampling frequency which is a common multiple of the sampling frequencies required by the different encoding/decoding means.

According to another aspect of the invention there is provided a method of transmitting signals between a calling subscriber and a called party via a speech codec arrangement having a plurality of encoding/decoding means for implementing different encoding/decoding algorithms, comprising the steps of selecting one of the encoding/decoding means by sending to the codec an algorithm selection signal, converting analogue speech signals into digital signals to be applied to the selected encoding means and converting the digital signals from the selected decoding means to analogue signals, each conversion employing a sampling frequency which is a common multiple of the sampling frequencies required by the different encoding/decoding means.

Advantageously the codec circuitry in the terminal function entirely in the digital domain, enabling all the alternative codec functions to the implemented by microprocessors.

Embodiments of the invention will now be described with reference to the accompanying drawings, in which: Figure 1 illustrates schematically a multi-standard speech codec arrangement, Figure 2 illustrates an alternative multi-standard speech codec arrangement, Figure 3 illustrates an implementation of a multi-standard speech codec, Figure 4 illustrates the functional elements of a CVSD coder and decoder, and Figure 5 illustrates the functional elements of an ADPCM coder and decoder.

The arrangement shown in Figures 1 includes, in the coder, an anti-alias filter 10 in the analogue input followed by an analogue-to-digital converter, in effect a sampling circuit 11 which provides a digitised analogue signal at a sampling rate which is the lowest common multiple of the speech sampling frequency required by the set of encoding algorithms, to be provided in the fixed terminal. The bit-rate reduction encoders can be implemented as a programmable coder function. In the particular example chosen the sampling frequency of circuit 11 is 32 kHz to allow the use of ADPCM or other algorithms requiring a comparatively low sampling rate, as well as algorithms such as CVSD which require the higher sampling rate to achieve the same overall bit rate for encoded speech, e.g. 32 kbit/s.For the lower sample rate algorithms the sample rate is reduced, e.g. to 8 kHz, by down sampling of the digitised signal. The sample rate reduction and the bit-rate reduction encoding are performed on one or more programmable digital signalling processing (DSP) micro-processors 12-14, which can be easily switched between various algorithms in external ROM. The particular algorithm to be used is selected by a switch 15 under the control of an "algorithm select" signal received from the subscriber's handset. Likewise the encoded speech signal is selected from the appropriate encoder by a second switch 16. The decoder is functionally the complement of the coder, the incoming encoded speech is fed to the appropriate decoder microprocessor 17, 18, or 19.Where necessary the sample rate is increased to 32 kHz and switch 20 selects the required signal to feed to the digital-to-analogue converter 21. Finally the analogue signal is passed through the anti-alias filter 22. Because a high sampling rate is used the CSVD implementation can be all digital where the signal processing is performed in the sampled data domain at the high e.g. 32kHz, frequency and the first order analogue filters normally found in a conventional CVSD codec are performed by their sampled data equivalents with the same time constants.

The same arrangement can be used for applications where a diverse range of digital transmission rates need to be supported. For example, using the sample rate above (e.g. 32 kHz intermediate sampling rate) such a codec could provide algorithms for reduced bit-rate (e.g. 32kHz ADPCM to CCITT G721), normal rate (64 kbit/s PCM to CCITT G711), and wide-band coding (e.g. 7 kHz bandwidth to CCITT G722).

The above example uses conventional analogue-to-digital (ADC) and digital-to-analogue (DAC) conversion.

Figure 2 shows a codec with the same functions as that of Figure 1 but using over-sampling ADC and DAC.

This enables the bulk of the anti-alias filtering to be performed in effect after the ADC and before the DAC.

This is particularly convenient as the anti-alias filters can be implemented digitally at a sampling frequency of 32 kHz. Again the range of algorithms and fixed sampling rates can be flexible as in Figure 1. As shown in Figure 2 the coder includes a single audio pre-filter 23, e.g. a 2nd order filter, before the ADC 24, which can be a pulse density modulator (PDM) with a sampling rate of F5 = N x 32 kHz where N is a whole number greater than 1. The over-sampling ADC is followed by a conversion filter 25 in which the very high rate l-bit samples are converted to multi-bit words at 32 kHz sample rate. The 32 kHz samples are passed through a digital anti-alias filter 26 and the filtered signals are fed to the appropriate encoder by the selector switch 27.The three, in this example, encoders 28-30 with any necessary down sampling to 8 kHz are the same as in Figure 1, as is the selector 31. Again, the decoder in Figure 2 is substantially the complement of the coder. The algorithm select switch 32, decoders 33-35, up-sampling and output selection switch 36 are the same as in Figure 1. The decoded signal then goes through the digital anti-alias filter 37, up-sampling frequency circuit 38 and one-bit DAC 39 operating at the N x32kHz sampling rate. The DAC output is applied to a pulse forming circuit 40 and finally to an analogue low-pass filter 41.

One implementation of the arrangement of Figure 2 is shown in Figure 3. A custom integrated circuit 42 implements the digital signal processing (DSP) required for the ADC, DAC and anti-alias filtering functions for both transmission and reception. The circuit 42 also controls the flow of signals to one or nore DSP microprocessors 43 via a DSP-microprocessor interface 44 in response to the algorithm select signal received from the handset. The microprocessors implement the speech coding algorithms which are held in program memories 45.

A further 4integrated circuit 46 provides this one bit audio/digital ADC and DAC interface to the exchange line, and also provides the clock for the DSP circuit.

Figure 4 illustrates a known arrangement for implementing a CVSD coder and decoder and Figure 5 illustrates a known arrangement for implementing an ADPCM coder and decoder suitable for use in the arrangement of Figure 3.

Claims (6)

CLAIMS.

1. A speech codec arrangement having a plurality of encoding/decoding means for implementing different encoding/decoding algorithms, means for selecting one of the encoding/decoding means in response to an algorithm selection signal received from an external equipment, analogue-to-digital conversion means for digitising analogue speech signals to be applied to the selected encoding means and digital-to-analogue conversion means to which digital signals from the selected decoding means are applied, said conversion means both having a sampling frequency which is a common multiple of the sampling frequencies required by the different encoding/decoding means.

2. A speech codec arrangement according to claim 1 wherein the sampling frequency of the analogue-to-digital and digital-to-analogue conversion means is N times the lowest common multiple of the sampling frequencies required by the different encoding/decoding means, where N is a whole number greater than 1, the arrangement further including sample frequency conversion means wherein the sampling frequency of the digitised signal is converted to (from) the sampling frequency at the lowest common multiple of the sample frequency required by the different encoding (decoding) means.

3. A speech codec arrangement according to claim 2 further including digitally implemented anti-alias filter means to which the digital signals at the lowest common multiple sample frequency are applied prior to being encoded or after being decoded.

4. A speech codec arrangement according to claim 1, 2 or 3 wherein the plurality of encoding/decoding means are implemented as microprocessors with the different algorithms being held in associated programme memories.

5. A speech codec arrangement substantially as described with reference to the accompanying drawings.

6. A method of transmitting signals between a calling subscriber and a called party via a speech codec arrangement having a plurality of encoding/decoding means for implementing different encoding/decoding algorithms, comprising the steps of selecting one of the encoding/decoding means by sending to the codec an algorithm selection signal, converting analogue speech signals into digital signals to be applied to the selected encoding means and converting the digital signals from the selected decoding means to analogue signals, each conversion employing a sampling frequency which is a common multiple of the sampling frequencies required by the different encoding/decoding means.