JPH0620156B2 - Solar cell manufacturing equipment - Google Patents
Solar cell manufacturing equipmentInfo
- Publication number
- JPH0620156B2 JPH0620156B2 JP58100828A JP10082883A JPH0620156B2 JP H0620156 B2 JPH0620156 B2 JP H0620156B2 JP 58100828 A JP58100828 A JP 58100828A JP 10082883 A JP10082883 A JP 10082883A JP H0620156 B2 JPH0620156 B2 JP H0620156B2
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- solar cell
- electrode
- cell manufacturing
- manufacturing equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000000758 substrate Substances 0.000 claims description 11
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 7
- 239000010408 film Substances 0.000 description 20
- 239000010409 thin film Substances 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000012495 reaction gas Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000013081 microcrystal Substances 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
- Control Of Electrical Variables (AREA)
- Chemical Vapour Deposition (AREA)
Description
【発明の詳細な説明】 〔発明の利用分野〕 本発明は太陽電池製造装置に関し詳しくは、プラズマC
VD(Chemical Vapor Deposition)による太陽電池製
造装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Use of the Invention] The present invention relates to a solar cell manufacturing apparatus.
The present invention relates to a solar cell manufacturing apparatus by VD (Chemical Vapor Deposition).
従来のプラズマCVD装置は、通常第1図(a)に示した
ような電極構造を有していたので、対向する電極上に形
成される薄膜は膜質が異なることがあった。すなわち反
応容器1内に対向する2つの電極として、高電圧印加電
極2と接地電極3が配置され、両者の間に交流電圧4に
より交流電圧を印加し、原料ガスをプラズマ放電させて
基板5、あるいは6に堆積するものである。この場合真
空容器は設置されているのが通常である。Since the conventional plasma CVD apparatus usually has an electrode structure as shown in FIG. 1 (a), the thin film formed on the opposing electrode may have different film quality. That is, a high voltage applying electrode 2 and a ground electrode 3 are arranged as two electrodes facing each other in the reaction vessel 1, and an alternating voltage is applied between them by an alternating voltage 4 to cause plasma discharge of a raw material gas to cause a substrate 5, Alternatively, it is deposited on 6. In this case, a vacuum container is usually installed.
また電極2は直流時に浮遊形となっており負のセルフバ
イアス電圧が生ずるのが普通である。このため、基板5
と6は電極2と3の電位の違いにより、堆積膜の膜質や
膜厚が異なるため、同時に両方の基板に良好な特性をも
つ薄膜を堆積することはできなかった。さらに最近、最
産性及び均質性向上のために第1図(b)に示した構造の
プラズマCVD装置が作られている。すなわち、反応容
器7を石英ガラス管で作製し、その外部から全体を均一
に加熱するものである。また高電圧印加電極81〜84
と接地電極91〜94を交互に多数配置することにより
量産性を向上させるものである。しかし、この場合にお
いても、基板11は高電圧印加電極81〜84かあるい
は接地電極91〜94のいずれ一方にしか装着できなか
った。高電圧印加電極81〜84と接地電極91〜94
のそれぞれに基板を接着し、モノシランガラスを用いて
非晶質シリコン膜を形成したところ、第1表に示すよう
に電極によって膜厚が大きく異なり、同時にすべての電
極に同等な薄膜を形成できないことが明らかであった。Further, the electrode 2 is of a floating type at the time of direct current, and normally a negative self-bias voltage is generated. Therefore, the substrate 5
Since Nos. 6 and 6 differ in the quality and thickness of the deposited film due to the potential difference between the electrodes 2 and 3, it was not possible to deposit a thin film having good characteristics on both substrates at the same time. More recently, a plasma CVD apparatus having the structure shown in FIG. 1 (b) has been produced in order to improve the productivity and homogeneity. That is, the reaction vessel 7 is made of a quartz glass tube and the whole is heated uniformly from the outside. Further, the high voltage applying electrodes 81 to 84
By arranging a large number of and ground electrodes 91 to 94 alternately, mass productivity is improved. However, even in this case, the substrate 11 could be mounted on only one of the high voltage application electrodes 81 to 84 or the ground electrodes 91 to 94. High voltage application electrodes 81-84 and ground electrodes 91-94
When a substrate was bonded to each of them and an amorphous silicon film was formed using monosilane glass, the film thickness varied greatly depending on the electrodes as shown in Table 1, and it was not possible to form an equivalent thin film on all electrodes at the same time. Was clear.
〔発明の目的〕 本発明の目的は、上記電極電位の相違による膜質等の違
いをなくし、すべての基板上で等質な薄膜を形成できる
プラズマCVDによる太陽電池製造装置を提供すること
にある。またすべての基板上で得られる等質な薄膜の膜
厚の均一度や平滑度膜の光学的電気的特性の向上を可能
にする太陽電池製造装置を提供することにある。 [Object of the Invention] An object of the present invention is to provide a solar cell manufacturing apparatus by plasma CVD capable of forming a uniform thin film on all substrates by eliminating the difference in film quality due to the difference in electrode potential. Another object of the present invention is to provide a solar cell manufacturing apparatus capable of improving the film thickness uniformity of uniform thin films obtained on all substrates and improving the optical and electrical characteristics of smooth films.
上記目的達成のために、本発明は、反応容器内の電極は
すべて交流的には等価とするものである。このために
は、電極構造や配置ができるだけ対称的であると必要で
ある。さらに、電極入力は2つの電極は直流的には等電
位であり、かつ交流的には逆位相で入力される。In order to achieve the above object, the present invention makes all electrodes in a reaction vessel AC equivalent. For this purpose, the electrode structure and arrangement must be as symmetrical as possible. Further, the electrode inputs are such that the two electrodes are equipotential in terms of direct current and opposite in terms of alternating current.
参考例 第2図を用いて本発明に関連する参考例を示す。石英製
の反応容器12に反応ガス供給系13からモノシランの
10%水素混合気体を導入し、真空ポンプ14で排気す
る。反応容器12はその外側からヒーター15で250
℃に加熱した。反応容器12内に電極A161,16
2,163と電極B171,172,173を導入し、
図のように結線を行った。電極Aと電極Bは同じ形状と
し、電極間隔はすべて同じにした。電極上に基板18と
してガラス板を装着した。両電極からの配線はバランス
型のマッチング・ボックス19に接続し、マッチング・
ボックス19には交流電源20を接続した。交流電源2
0には50KHzの電源を用いた。反応ガスを流し1Torr
の圧力のもとで、電源電力20Wで10分間、非晶質シ
リコンの堆積を行った。試料18のうち反応ガス供給系
の方向を向いた位置の試料について測定した膜厚を第2
表に示す。Reference Example A reference example related to the present invention will be shown with reference to FIG. A 10% hydrogen mixed gas of monosilane is introduced into the reaction vessel 12 made of quartz from the reaction gas supply system 13 and exhausted by the vacuum pump 14. The reaction vessel 12 is heated by 250 from the outside by a heater 15.
Heated to ° C. Electrodes A161, 16 in the reaction vessel 12
2,163 and electrodes B171,172,173 are introduced,
Wiring was performed as shown in the figure. The electrodes A and B had the same shape, and the electrode intervals were all the same. A glass plate was mounted as the substrate 18 on the electrode. Connect the wiring from both electrodes to the balanced matching box 19
An AC power supply 20 was connected to the box 19. AC power supply 2
A power source of 50 KHz was used for 0. Pour reaction gas to 1 Torr
Amorphous silicon was deposited at a power of 20 W for 10 minutes under the above pressure. The film thickness measured on the sample of the sample 18 at the position facing the direction of the reaction gas supply system is
Shown in the table.
試料No.は排気側からガス供給側に向って1から5とし
た。試料間でバラツキは若干あるが、電極Aと電極Bの
間での差はなかった。また、屈折率やフッ酸・硝酸系エ
ッチング液によるエッチング速度にも差はなかった。さ
らに、マッチング・ボックス19と電極の間にコンデン
サ21を入れた構造での堆積も行ったところ、電極端部
での膜圧の均一度が向上した。 Sample No. was set from 1 to 5 from the exhaust side toward the gas supply side. Although there was some variation between the samples, there was no difference between electrode A and electrode B. There was also no difference in the refractive index or the etching rate with the hydrofluoric acid / nitric acid-based etching solution. Further, when deposition was performed with a structure in which a capacitor 21 was inserted between the matching box 19 and the electrode, the uniformity of the film pressure at the electrode end was improved.
実施例1 本発明の第1の実施例を図3を用いて示す。バランス型
のマッチング・ボックス21以後の反応装置部分は参考
例とまったく同じであることから図示を省略した。参考
例においては電極部分は電気的にフローティングになっ
ており、電位が定まらず膜質、膜厚にロット内、ロット
間バラツキが少しあった。この電位を一定に保つために
DC電源22により正または負の電圧を印加、あるいは
接地電位23とした。この状態で非晶質シリコンを参考
例と同一条件で堆積した。接地した場合の膜厚分布を中
央の4つの電極162,163,172上の試料18に
ついて測定した結果を第3表に示す。Example 1 A first example of the present invention will be described with reference to FIG. Illustration of the reaction device after the balance type matching box 21 is omitted because it is exactly the same as that of the reference example. In the reference example, the electrode portion was electrically floating, and the potential was not fixed, and there was little variation in film quality and film thickness within and between lots. In order to keep this potential constant, a positive or negative voltage was applied by the DC power source 22 or the ground potential 23 was set. In this state, amorphous silicon was deposited under the same conditions as in the reference example. Table 3 shows the results of measuring the film thickness distribution when grounded for the sample 18 on the four central electrodes 162, 163, 172.
膜厚のバラツキが参考例より小さく、接地により電位を
一定とした効果が明らかである。正または負のDC電圧
を100V以内で印加した場合も、接地の場合と同様に
膜厚バラツキを低減できた。さらに負バイアス下で堆積
した場合には、電極端部での膜厚の均一度が向上しフッ
酸・硝酸混液によるエッチング速度が減少し、膜質改善
の効果も認められた。 The variation in film thickness is smaller than in the reference example, and the effect of making the potential constant by grounding is clear. Even when a positive or negative DC voltage was applied within 100 V, the variation in film thickness could be reduced as in the case of grounding. Further, when deposited under a negative bias, the uniformity of the film thickness at the electrode edge was improved, the etching rate by the hydrofluoric acid / nitric acid mixture was decreased, and the effect of improving the film quality was also observed.
実施例2 本発明の第2の実施例を第4図に従って示す。バランス
型マッチング・ボックス24以後の反応装置部分は参考
例とまったく同じであるので省略した。参考例1で示し
たように電極はすべて同一形状としたが、すべての電極
の配置を完全に対称にすることは不可能である。このた
め、バランス型といえども電極A161,162,16
3と電極B171,172,173の間にはわずかに電
位差を生じることがさけられない。これを補償するため
に第4図に示したようにマッチング・ボックス24を用
いた。すなわち、2つの電極161,162,163と
171,172,173のそれぞれに対して適当なDC
電源25と26を用いてDC電圧を印加し、膜厚、膜質
の均等化を行った。この結果すべての電極上の試料18
について、堆積された非晶質シリコンの膜厚のバラツキ
は±5%以内とすることができた。Embodiment 2 A second embodiment of the present invention will be shown according to FIG. The parts of the reactor after the balance type matching box 24 are the same as those of the reference example, and are therefore omitted. As shown in Reference Example 1, all the electrodes have the same shape, but it is impossible to arrange all the electrodes completely symmetrically. Therefore, even though the balance type is used, the electrodes A161, 162, 16
A slight electric potential difference is unavoidable between the No. 3 and the electrodes B171, 172, 173. To compensate for this, a matching box 24 was used as shown in FIG. That is, for each of the two electrodes 161, 162, 163 and 171, 172, 173 a suitable DC
DC voltage was applied using the power supplies 25 and 26 to equalize the film thickness and film quality. As a result, sample 18 on all electrodes
As for the above, the variation in the film thickness of the deposited amorphous silicon could be within ± 5%.
なお、以上の実施例において、堆積物質は非晶質シリコ
ンのみについて示したが、もちろん微結晶や微結晶を含
む膜の窒化シリコン、酸化シリコン、窒化ボロンなど、
プラズマCVD反応によって形成できるいずれの物質に
ついても本装置を使用できることはいうまでもない。Note that in the above examples, the deposition material is shown only for amorphous silicon, but of course, silicon nitride, silicon oxide, boron nitride, etc. of a film containing microcrystals or microcrystals
It goes without saying that the present apparatus can be used for any substance that can be formed by the plasma CVD reaction.
本発明によれば、2つの電極は交流位相が逆である以外
は電気的にまったく等価であるので、プラズマ放電に必
要な2つの電極のいずれに基板を装置しても等質な薄膜
が形成できる。According to the present invention, since the two electrodes are completely electrically equivalent except that the AC phases are opposite, a uniform thin film is formed even if the substrate is mounted on either of the two electrodes required for plasma discharge. it can.
さらに、2つの電極間に電位差がないことから、通常の
プラズマCVD法で見られる、電極間の電位差によって
生じるプラズマ・ダメージがまったくないという効果も
ある。Further, since there is no potential difference between the two electrodes, there is also an effect that there is no plasma damage caused by the potential difference between the electrodes, which is seen in a normal plasma CVD method.
第1図(a),(b)は従来のプラズマCVD装置を示す模式
図、第2図は本発明に関連する参考例を示す図、第3図
乃至第4図はそれぞれ本発明の異なる実施例を示す図で
ある。 1,7,12,……反応容器、2,81,82,83,
84……高電圧印加電極、3,91,92,93,94
……接地電極、4,10,20,……交流電源、5,
6,11,18,……基板、13,……反応ガス供給
系、14,……真空ポンプ、15,……ヒーター、16
1,162,163,……電極A、171,172,1
73,……電極B、19,21,24,……マッチング
・ボックス、22,25,26……DC電源、23……
接地。1 (a) and 1 (b) are schematic views showing a conventional plasma CVD apparatus, FIG. 2 is a view showing a reference example related to the present invention, and FIGS. 3 to 4 are different embodiments of the present invention. It is a figure which shows an example. 1, 7, 12, ... Reaction vessels, 2, 81, 82, 83,
84 ... High-voltage applying electrode, 3, 91, 92, 93, 94
...... Grounding electrode, 4, 10, 20, ...... AC power supply, 5,
6, 11, 18, ... Substrate, 13, ... Reaction gas supply system, 14, ... Vacuum pump, 15, ... Heater, 16
1, 162, 163, ... Electrode A, 171, 172, 1
73, ... Electrode B, 19, 21, 24, ... Matching box, 22, 25, 26 ... DC power supply, 23 ...
ground.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 右高 正俊 東京都国分寺市東恋ケ窪1丁目280番地 株式会社日立製作所中央研究所内 審判の合議体 審判長 遠藤 政明 審判官 左村 義弘 審判官 河合 章 (56)参考文献 特開 昭58−125821(JP,A) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masatoshi Utaka Masatoshi Utaka 1-280, Higashi Koigokubo, Kokubunji, Tokyo Metropolitan Research Laboratories, Hitachi, Ltd. ) Reference JP-A-58-125821 (JP, A)
Claims (1)
次コイルと、一対のプラズマ対向電極に接続される二次
コイルとを有するプラズマCVD法を用いた太陽電池製
造装置において、上記対向電極は、実質的に同じ形状を
有し、交流的に逆位相の電圧が印加され、かつ該二次コ
イルの中点が接地され或いは該中点に直流外部バイアス
が印加され若しくは該中点が直流的に絶縁されると共に
上記対向電極の各々に直流外部バイアスが印加されて直
流的には実質的に等電位であり、かつ上記対向電極の各
々に対応するように成長基板を設けることを特徴とする
太陽電池製造装置。1. A solar cell manufacturing apparatus using a plasma CVD method, comprising: a primary coil connected to a high-frequency power source, one end of which is grounded; and a secondary coil connected to a pair of plasma counter electrodes. , Which have substantially the same shape, AC voltages of opposite phases are applied, and the midpoint of the secondary coil is grounded or a DC external bias is applied to the midpoint or the midpoint is DC And a DC external bias is applied to each of the counter electrodes so as to be substantially equipotential in terms of DC, and a growth substrate is provided so as to correspond to each of the counter electrodes. Solar cell manufacturing equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58100828A JPH0620156B2 (en) | 1983-06-08 | 1983-06-08 | Solar cell manufacturing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58100828A JPH0620156B2 (en) | 1983-06-08 | 1983-06-08 | Solar cell manufacturing equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59226913A JPS59226913A (en) | 1984-12-20 |
JPH0620156B2 true JPH0620156B2 (en) | 1994-03-16 |
Family
ID=14284180
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58100828A Expired - Lifetime JPH0620156B2 (en) | 1983-06-08 | 1983-06-08 | Solar cell manufacturing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0620156B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0732127B2 (en) * | 1984-04-20 | 1995-04-10 | 株式会社半導体エネルギ−研究所 | Plasma gas phase reactor |
JP4870608B2 (en) * | 2007-04-12 | 2012-02-08 | 株式会社アルバック | Deposition equipment |
JP2014125651A (en) * | 2012-12-26 | 2014-07-07 | Kobe Steel Ltd | Inline-type plasma CVD apparatus |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58125821A (en) * | 1982-01-22 | 1983-07-27 | Seiko Epson Corp | Manufacturing device for semiconductor |
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1983
- 1983-06-08 JP JP58100828A patent/JPH0620156B2/en not_active Expired - Lifetime
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Publication number | Publication date |
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JPS59226913A (en) | 1984-12-20 |
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