JPH06197300A - Video tape recorder - Google Patents

Abstract

PURPOSE:To attain long time recording while keeping compatibility of reproduction in matching with a VTR of the VHS system even from a magnetic tape in which frame interleave recording is executed by executing frame interleave recording once per three fields at 1/9 of the standardized standard speed as the registered VHS system. CONSTITUTION:Speed data of three kinds of standard speeds of a conventional VTR standardized as the so-called VHS system are stored in advance in a ROM 14 being a component of a speed control section and a selection circuit 15 selects any of the speed data and the selected data are given to a comparator circuit 18. The speed data entered from the circuit 15 are used for reference speed data and a difference resulting from comparing latch data of a latch circuit 13 as current speed data with the reference data is outputted as a speed error signal and it is fed to a motor driver 19 so as to control a speed of a capstan motor 20 so that an error signal is zero, that is, the current speed data are coincident with the reference speed data. Thus, the speed is set to a multiple of 1/9 and the compatibility with the VHS system is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called time-lapse video tape recorder (VTR) capable of recording a video signal for a long time by skipping a frame.

[0002]

2. Description of the Related Art An example of a so-called time-lapse VTR for recording a video signal without frame is disclosed in Japanese Patent Application Laid-Open No. 62-166671 (H04N5 / 782).
In this conventional example, a video signal is extracted at a period of the first field, the fourth field, and the seventh field and recorded on a magnetic tape, and as a result, a recording pattern is repeated between an odd number field and an even number field. The tracks to be recorded can be recorded by heads having different azimuth angles.

[0003]

In the above-mentioned prior art, the video signal can be recorded for a long time by extracting the video signal at a cycle of 3 fields, but the running speed of the tape is only defined as a constant speed. However, if the recording is performed in the normal VTR standard mode, the information is recorded only three times as long as in the case where the frame-out recording is not performed.

[0004]

SUMMARY OF THE INVENTION The present invention uses three video signals.
Field recording only once in the field (Recording time interval 1
/ 20SEC) and the tape running speed is 1/9 or 1 / of the normal VHS standard mode (SP mode).
It is characterized in that it is set to 12.

[0005]

Since the present invention is configured as described above, the tape speed of the standard mode (SP mode) of VHS at the time of reproduction is maintained while maintaining the situation that the odd field and the even field are repeatedly recorded at different azimuth angles. 1/9, 1/1
It is possible to set to 2, and it is possible to maintain the maximum reproduction compatibility in the VTR capable of reproducing at the speed of the triple mode (EP mode) of the VHS system.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A VTR which is an embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a circuit block diagram for explaining the supply of the video signal to the head.
The video signal input to is input to the sync separation circuit 4, amplified by the recording amplifier 2, and then supplied to the gate circuit 3.

The sync separation circuit 4 extracts a vertical sync signal from the input video signal, and the obtained vertical sync signal is input to the cylinder drive circuit 5 and the gate control circuit 6.
The cylinder drive circuit 5 uses the vertical synchronizing signal as a phase reference signal to rotate the rotating cylinder 7 at a constant speed.

On the other hand, in the gate control circuit 6, the gate control signal is created using the vertical synchronizing signal. As shown in FIG. 3, the gate control signal is at the H level for one field period every three fields, and the gate circuit 3 receives the gate control signal and is input only during the period when the gate control signal is at the H level. The video signal is allowed to pass through, and as a result, the gate circuit 3 outputs a video signal for one field in a cycle of three fields. In the example of FIG. 3, when the video signal V1 of the first field is output, the video signal V1 of the fourth field is next, and the video signal V of the seventh field is next.
4, V7 are output every 3 fields.

The video signal thus output is sent to the video heads A + 40 and A-41 built in the rotary cylinder 7 by one.
It is supplied alternately for each field. Video head A + 4
0 and A-41 are a pair of heads arranged opposite to each other on the circumference of the cylinder by 180 degrees and have opposite azimuths. As shown in FIG. 3, the output from the gate circuit 3 is the video head 40 for each field. , 41. That is, the video signal V1 of the first field is supplied to the video head A + 40 to form a track pattern such as T1 in FIG. 4 on the tape, and the video signal V2 of the next second field is blocked by the gate circuit 3. At the same time, the current of the video head A-41 is turned off. As a result, the track pattern of T2 should originally be formed, but T2 is not formed due to the current off state. Similarly, the video signal V3 of the third field is cut off by the gate circuit 3 and the current of the video head A + 40 is turned off. As a result, the track pattern T3 is not formed either. In this way, since T2 and T3 are not substantially formed on T1, the track pattern T1 having the track pitch Tp remains as it is, and the video signal V1 is recorded there.

Further, the next fourth field video signal V4
Is supplied to the video head A-41 to form a track pattern T4, and the video signals V5 and V6 of the fifth and sixth fields are cut off and the currents of both video heads are turned off as described above. T5 and T6 are not formed, and the track pattern T4 having the track pitch Tp is formed.
Remains, and the video signal of the fourth field is recorded here.

Similarly, the video signal V7 of the seventh field and the video signal V10 of the track pattern T10 formed by the video head A-41 are sequentially recorded on the track pattern T7 formed by the video track A + 40. To be done. As a result, the video signals of the first, seventh, thirteenth, ... Fields are supplied to the video head A + 40, and the video signals of the fourth, tenth, 16th, ... At 41, frame-by-frame recording is intermittently performed.

FIG. 4 shows a track pattern formed on the magnetic tape. The chain line is a track pattern formed when the video signal is sequentially recorded field by field without the frame skip recording, and the solid line is the above-mentioned. Similarly, the track pattern is formed when the frame-out recording is performed. The track T1 when the frame-out recording is formed is formed in the portion where the first to third tracks are formed during the continuous recording.
The track T4 at the time of frame skip recording is formed at the portion where the sixth track is formed, and the track T7 at the time of frame skip recording is formed at the portion where the seventh to ninth tracks are formed at the time of continuous recording. Here, the azimuth angles of adjacent tracks are different from each other.

Further, of the circuit shown in FIG. 1, the recording system of the control signal to the control track extending in the longitudinal direction of the magnetic tape will be described later.

Next, the drive control of the capstan that drives the tape will be described with reference to the circuit block diagram of FIG. FIG. 1 shows a servo circuit of a capstan motor 20 for driving a capstan for tape running,
The rotation state of the capstan motor is detected by the FG detector 10, and the FG signal whose frequency is proportional to this rotation speed is divided by the frequency dividing circuit 11 at a predetermined frequency division ratio, and the frequency of this frequency division output is set to the speed. Detect with a detector. Specifically, this speed detector counts a clock of a predetermined frequency and is reset at the rising edge of the divided FG signal, and a latch circuit 13 that latches the count value of the counter in synchronization with the rising edge. Consists of and divided FG
The cycle of the signal is output as the count value.

The ROM 14 has three standard speeds of a normal VTR standardized as a so-called VHS system (SP mode with tape speed of 33.4 mm / s, LP with tape speed of 1/2 of SP mode). Mode, the speed data for realizing the tape speed in the SP mode in the tape speed 1/3 of the SP mode), that is, the data indicating the cycle of the FG signal when realizing the tape speed in the SP mode is stored. Has been done.

This speed data is output to the movable contact piece 15a of the selection circuit 15. Here, the fixed contact 15b of the selection circuit is directly connected to the comparison circuit 18 so that the input speed data can be directly output to the comparison circuit 18 in the subsequent stage, and the fixed contact 15c is the first operation for multiplying the input data by 9 times. The comparator 16 is passed through the comparator 16, and the fixed contact 15d is passed through the second calculator 17 which multiplies the input data by 12 and the comparator 18 is passed.
Connected to each. The switching of the movable contact piece 15a in the selection circuit 15 is executed by the tape speed switching signal S1. The tape speed switching signal is output from the system controller (syscon) 21 according to the speed arbitrarily selected by the user.

The comparator circuit 18 compares both input data. The speed data input from the selection circuit 15 is used as the reference speed data, the latch data of the latch circuit 13 is used as the current speed data, and the current speed corresponding to the reference speed data is used. The difference between the speed data is output as a speed error signal. This speed error signal is supplied to the motor driver 19, and the driver 19 controls the speed of the capstan motor 20 so that the speed error signal becomes zero, that is, the current speed data matches the reference speed data.

Although only the speed servo is shown in the above-mentioned capstan servo circuit, the phase servo is indispensable like a normal VTR, and the FG signal from the FG detector 10 is predetermined at the time of recording. A phase error signal corresponding to the phase difference between the signal divided by the frequency division ratio and the reference signal, and a signal corresponding to the phase difference between the reproduction control signal and the reference signal during reproduction are added to the speed error signal The drive control of the stun motor 20 is performed.

By the way, as described above, in the normal VHS system VTR, the tape speed is 33.4 mm / s (= Vs
p) SP (so-called standard mode), LP mode with tape speed Vsp × 1/2 (= Vlp), EP mode (so-called 3) with tape speed Vsp × 1/3 (= Vep) in addition to this SP mode. There are three types: double mode).

On the premise of this, the compatibility of the magnetic tape on which the frame skip recording is performed with the VHS system by setting the tape running speed to 1/9 times the speed Vsp in the SP mode will be described. .

First, the H arrangement of track patterns will be described. Here, nh = 262.5 where nh is the number of scanning lines per field, where Vt is the tape speed, θ is the video track angle when the tape is stopped, fv is the field frequency, and φ is the cylinder diameter. Equation 1 holds.

[0022]

[Equation 1]

Since θ is a minute angle, cos θ≈
1 and πφ >> Vt / fv, the formula 1 is α
H = 2nh · Vt / (fv · π · φ), and αH is V
It will be proportional to t. Therefore, αH in EP mode
The tape speed is Vsp ×
When 1/9 is recorded in the entire field without the frame skip recording, the tape speed Vsp is 1/9 of that in the EP mode.
Since it corresponds to 3, αH = 0.5 × 1 / 3H. Further, if frame-free recording of three fields is performed, αH becomes three times as large as that of continuous recording and αH = (0.5 / 3) × 3H = 0.5H, as can be seen from the track pattern of FIG. This coincides with αH (deviation of the start horizontal synchronization signal H) in the VHS type EP mode, which proves that the H arrangement can be obtained.

Next, the track pitch will be described.
Here, when the track pitch is represented by Tp, the equation 2 is established, and the track pitch is proportional to the tape speed.

[0025]

[Equation 2]

When all fields are recorded in the above-mentioned format, Tp = Ts / 9 (Ts: 58 μm in track pitch in SP mode), but in the case of 3-field frame skip recording, it is three times this, that is, , Tp = Ts / 3, which is equal to the track pitch in EP mode.

Next, the recording pitch (Tc) of the control (CTL) signal will be described. Normally, the CTL signal is recorded in synchronization with the timing at which the video signal is recorded by the same azimuth video head. Therefore, if tracks are formed one field at a time, the CTL signal will be recorded in a two-field cycle. , Recording pitch is tape speed x 2
It can be expressed in × 1 field cycle, and in the case of EP mode, T
c = Vep × 1/30 = Vsp × 1/3 × 1/30 = V
It becomes sp / 90 mm.

On the other hand, in the case of performing frame skip recording with the circuit of FIG. 2, recording is performed by the head having the same azimuth angle at 6 field intervals. That is, referring to FIG. 2, the gate control signal (see FIG. 3) which is supplied from the gate control circuit 6 and becomes H level at a ratio of one field to three fields is as shown in FIG. 3 by the signal processing circuit 52. Every other pulse, one pulse is extracted, that is, it is given to the gate circuit 51 as a signal which becomes H level at a rate of one field in six fields. As a specific example of the signal processing circuit 52, a frequency dividing circuit that divides the gate control signal from the gate control circuit 6 by 1/2 and an AND circuit that logically ANDs the frequency division output and the gate control signal are used. The AND circuit output is provided to the gate circuit 51.

The vertical synchronizing signal output from the sync separation circuit 4 is given to the gate circuit 51 after being delayed by the delay circuit 50 for a certain period of time.
In response to the gate control signal processed as described above, the output of the delay circuit 50 is passed only during the H level period, that is, in 6 field cycles. The vertical synchronizing signal thus passing through the delay circuit 50 is recorded as a control signal on the control track of the magnetic tape by the control head 53 at a cycle of 6 fields. That is, the recording pitch of the control signal when the 1/3 frame-free recording is performed is Tc = Vsp × (1/9) × 6 × (1/60) =
Vsp / 90 mm, which is equal to the recording pitch in the EP mode. Therefore, the recording pitch of the control signal is 1/3 at the speed of Vsp × (1/9).
It is proved that the compatibility is established between the time-lapse recorded tape and the VHS EP mode of the VTR.

In a normal VHS VTR, the control signal recorded on the control track has a duty ratio set to 60% or 50%. In this case, it is necessary as the timing of the control signal. Is only the rising edge, and the duty ratio does not matter. However, if it is particularly desired to match the duty ratios, a signal generation circuit is separately inserted between the gate circuit 51 and the control head 53, and the gate circuit 5
The signal which is synchronized with the falling edge of the vertical synchronizing signal obtained from 1 and has the duty ratio set to 60% or 50% is recorded by the control head 53 as a control (CTL) signal. It may be configured as follows.

As described above, if the frame skip recording is performed once in three fields at the tape speed of 1/9 of the SP mode, the recording pitch of αH, the track pitch, and the control signal are all in the VHS system. A magnetic tape that matches each value of the EP mode and is recorded with frame skipping under the above conditions can be reproduced by selecting the EP mode in the VHS of the VHS system, and reproduction compatibility can be obtained. Incidentally, the reproduced video at the time of reproduction is a picture at triple speed because recording is performed once in three fields.

Next, the compatibility of the magnetic tape on which the frame running recording is performed with the tape running speed set to 1/12 of the speed Vsp in the SP mode with respect to the VHS system will be described below. Since the tape speed 1/12 of the speed Vsp in the SP mode corresponds to 1/4 of the speed Vsp in the EP mode, αH can be calculated as (0.5H / 4) × 3 = 0.375H. Further, the track pitch Tp is Tp = 3 × Ts /
It can be calculated as 12 = Ts / 4 = 14.5 μm. Furthermore, C
The recording pitch Tc of the TL signal is Tc = Vsp × (1/1
2) × 6 × (1/60) = Vsp / 120 = Vep / 4
It can be calculated as 0 mm. Each of these values does not match any of the three formats of the VHS system, and there is no reproduction compatibility.

By the way, this reproduction compatibility is premised on the normal reproduction time, and by devising the reproduction state, Vs of 1
Even when set to / 12, the predetermined mode of the VHS system can be used to the maximum extent. The idea at this time is
It is possible by setting the tape feed amount during frame feed during intermittent slow playback of one field or field still playback to 1/2 of the tape feed amount Ll during intermittent slow playback and field still playback in the LP mode. .

Next, the reason for this will be described in detail. In a normal VTR, C is used in the mode in which the CTL signal is detected and the frame is advanced.
There is no problem on the track on which the TL signal is recorded,
When moving from the track in which the CTL signal is recorded to the track in which it is not recorded, the FG detector 10 detects the rotation amount of the capstan as the FG signal as shown in FIG. 5, and the pulse number of this FG signal is determined. When the counter 31 counts and reaches a predetermined value, that is, after a predetermined tape amount has been sent, a pseudo CTL signal is generated to reproduce the CTL.
Similar to the signal detection, capstan control such as applying a brake pulse to the driver of the capstan motor is performed when the capstan control circuit 32 detects the pseudo CTL signal. That is, in the SP mode, the recording pitch of the CTL signal is Vsp × 2 × 1/60 = Vsp / 30 m
m, the Vsp / 60 mm tape is fed, and the recording pitch of the CTL signal is V in the EP mode.
Since it is ep / 30 mm, the pseudo CTL signal is generated at the position of Vep / 60 mm.

In the case of frame-free recording, the recording pitch of the CTL signal is Vep / 40 mm, so Vep / 80 mm
It is necessary to generate the pseudo CTL signal at the position where the tape is fed. In order to realize this, it is possible to feed the tape by Vlp / 2 mm per field. That is, Equation 3 holds.

[0036]

[Equation 3]

Here, the feed amount is controlled by counting the pulse number of the FG signal by the counter 31, as shown in FIG. 6, and the pulse counted in the preceding stage of this counter is multiplied by the multiplication circuit 30. It becomes possible by multiplying by 2, that is, by doubling the frequency and counting, and by monitoring whether or not the count value at the time of sending one field is reached in the normal LP mode.

Therefore, 1 / the speed Vsp in the SP mode
At the tape speed of 12, when playing back a magnetic tape that has been recorded once in 3 fields with frame skipping with a normal VHS system VTR, compatibility cannot be maintained, but 1 field intermittent slow playback and field still playback When the frame feeding is performed, it is possible to use the frame feeding control for the LP mode as it is, by making some improvements such as adding one multiplication circuit in advance.

As described above, one in every three fields at a tape speed of 1/9 or 1/12 of the SP mode speed Vsp.
When performing frame-out recording once, the user selects which tape speed to perform frame-out recording with the operation button, and if the speed of 1/9 of Vsp is selected, the tape is transferred from the syscon 21. A speed switching signal is output, the movable segment 15a is switched to the fixed contact 15c, the speed data corresponding to the tape speed Vsp in the SP mode is multiplied by 9 in the first arithmetic circuit 16, and then the comparison circuit 18 is supplied with the reference speed. Supplied as data. Similarly, when the speed of 1/12 of Vsp is selected, the movable contact piece 15a is switched to the fixed contact 15d, and the speed data of Vsp is 1 in the second arithmetic circuit 17.
It is doubled and supplied as reference speed data.

Based on the reference speed data thus determined, the speed servo of the capstan motor 20 is executed, and the tape speed is 3 at a tape speed of 1/9 or 1/12 of Vsp.
One frame-out recording will be made in the field.

[0041]

As described above, according to the present invention, the frame skip recording is performed once in three fields at 1/9 of the standard speed standardized as the so-called VHS system, so that the frame skip recording is performed. The magnetic tape made is a VHS VTR
In EP mode, normal reproduction can be performed, and recording can be performed for a long time while maintaining reproduction compatibility with the VHS system. Also, by executing at 1/12 of the standard speed, the VH system LP mode can be used in the VH system with a slight modification to the special reproduction circuit.
It becomes possible to have compatibility with the S system, and it is possible to simultaneously realize high efficiency associated with long-time recording on a tape and reproduction compatibility of a normal VTR.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of a speed control unit according to an embodiment of the present invention.

FIG. 2 is a circuit block diagram of a main part of an embodiment of the present invention.

FIG. 3 is a timing chart of an example of the present invention.

FIG. 4 is a recording track pattern according to an embodiment of the present invention.

FIG. 5 is an explanatory diagram of a conventional example.

FIG. 6 is a circuit block diagram of a main part of an embodiment of the present invention.

[Explanation of Codes] 3 Gate Circuit 40 Video Head A + 41 Video Head A-20 Capstan Motor

Claims (1)

[Claims] 1. A gate means for extracting a video signal for one field at a three-field cycle, a head for recording the output of the gate means on a magnetic tape at a different azimuth angle for each field at the time of frame advance recording, and a frame advance recording. Sometimes, a video tape recorder is provided with a tape drive means for driving the magnetic tape at a running speed of 1/9 or 1/12 of the standard running speed at the time of normal recording without performing frame-by-frame recording.