JPH06196705A - Reverse-current carrying type insulated gate bipolar transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a reverse-current carrying type IGBT in which an IGBT and a diode are formed into one body and at the same time a current is not concentrated into the IGBT. CONSTITUTION:An IGBT comprise a substrate 1, a base layer 2 provided in the first main surface of the substrate 1, a source layer 3 provided therein, a collector layer 4 provided in the second main surface of the substrate 1, an insulated gate electrode 5 bridgingly arranged between the adjacent layers 3, the source layer 3 and the base 2 being in contact with each other, and a diode comprise an emitter layer 9 provided between adjacent base layers 2, a collector short-circuiting layer 10 provided between collector layers 4, a source electrode 7 provided in the surface of an emitter layer 4 and a collector electrode 8 provided in the surface of the collector short-circuiting layer 10. A unit cell is constituted of the IGBT and the diode, and the unit cell is so formed as to be sequentially arranged within the substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reverse conduction type insulated gate bipolar transistor and a manufacturing method thereof, and in particular, an insulated gate bipolar transistor (hereinafter referred to as an IGBT) and an antiparallel connection diode are integrated in a cell unit. And a method for manufacturing the same.

[0002]

2. Description of the Related Art Generally, a bipolar transistor or an insulated gate field effect transistor (hereinafter referred to as a semiconductor switching device) capable of turning on / off a load current in accordance with the polarity of a switching control signal supplied to a control terminal. Is called a MOSFET). However, these switching elements each have advantages and disadvantages in operation when performing switching operation. For example, when performing switching control of high voltage and large current, the resistance at the time of turning on the switching element is high. A bipolar transistor having a relatively small loss is suitable, while a MOSFET having a high switching speed is suitable when performing high frequency switching operation.

Further, in recent years, an IGBT has been developed as one having both a low resistance characteristic of a bipolar transistor at the time of ON and a high speed switching operation characteristic of a MOSFET, and the IGBT is expected to be used rapidly in various fields. Has become.

When this IGBT is used in an inverter circuit or the like, it is usually used in combination with an antiparallel connection diode, a so-called free wheel diode, and the IGBT and the antiparallel connection diode are the same semiconductor chip. It has a structure formed inside. In this case, a reverse conduction type insulated gate bipolar transistor (hereinafter,
This is referred to as a reverse conduction type IGBT), which is disclosed in
2-109365 (referred to as the former).
A structure in which a MOSFET and a diode are integrated in antiparallel is disclosed in, for example, Japanese Patent Laid-Open No. 2-45434 (the latter).

By the way, the reverse conduction type IGBT disclosed in the former case.
In the configuration, the IGBT portion is composed of two layer portions of n and p + and three layer portions of p, n + and p + provided below the insulated gate electrode, and the collector layer is not formed on the entire lower surface of the base layer. In addition, it is provided only below the insulated gate electrode, and an n + short-circuit layer is formed in the other portion. Further, the diode portion uses the p layer of the IGBT (p well layer) as the p emitter layer of the diode, (P +)-(n)-(n consisting of p emitter layer, n base layer, and n + emitter layer
+) Has a three-layer structure. On the other hand, the configuration of the reverse conduction type MOSFET disclosed in the latter is structurally similar to the reverse conduction type IGBT disclosed in the former, but is different from the reverse conduction type IGBT disclosed in the former in that the p-layer of the MOSFET is different. This is that the (p well layer) is not used as the p emitter layer of the diode, and a p emitter layer having a low impurity concentration which is thinner than the p layer (p well layer) is newly provided.

[0006]

However, in the reverse conduction type IGBT disclosed above, the diode portion is
The structure is widely known as a so-called PIN diode. Since this PIN diode has a pn junction with a high impurity concentration, heavy metal doping such as gold (Au) or radiation irradiation is performed to shorten the carrier lifetime in order to speed up the operation. There is a need. However, if the PIN diode is speeded up by using a lifetime killer, the turn-on voltage will increase and the leakage current will increase due to high temperature, resulting in inconvenience in operation.

Further, the reverse conduction type IGBT according to the above disclosure.
Since it is difficult to satisfy the characteristics of the IGBT and the diode at the same time because the optimum values of the lifetime of the IGBT and the diode therein are not necessarily the same, moreover, it is applied to the reverse conduction type IGBT after the diode is made conductive. The polarity of the voltage
When a negative voltage is applied to the cathode side, the n + source layer, the p base layer, the n− drift layer, the p + emitter are generated by the carriers remaining inside the reverse conduction type IGBT even when the gate voltage is not applied. The possibility that the parasitic thyristor composed of layers malfunctions, that is, latch-up increases.

Thus, the reverse conduction type IG according to the above disclosure
BT has a diode that can operate at high speed
The problem is that it is difficult to integrate T and the diode.

On the other hand, a structure in which an IGBT and a diode are separately formed and arranged in the same chip in respective regions and the IGBT and the diode are integrated is disclosed in, for example, Japanese Patent Laid-Open No. 61-15.
Although already proposed by No. 370, this structure also has not solved the following points.

That is, a bipolar element such as a GTO (gate turn-off thyristor) has a negative on-voltage temperature coefficient,
That is, the higher the temperature, the lower the on-voltage. On the other hand, the unipolar element such as a power MOSFET has a positive on-voltage temperature coefficient, that is, the higher the temperature, the higher the on-voltage. Has the property of becoming higher. Due to these differences in characteristics, current concentration is likely to occur in a bipolar element and it is difficult to operate the elements in parallel, whereas current concentration is unlikely to occur in a unipolar element and it is easy to operate the elements in parallel. It has the characteristic of being In this case, I
The GBT has a characteristic intermediate between that of a bipolar element and a unipolar element. However, depending on the structure of the IGBT and the current density during use, the current concentration may become too large to be ignored, and the above-mentioned proposal also For each of the cells of the IGBT, there is a concern that current concentration may occur between the cells due to the reason described above.

The present invention is intended to eliminate the above-mentioned problems, and an object thereof is to provide a reverse conduction type IGBT in which the IGBT and the diode are integrated and the current concentration occurring in the IGBT is eliminated. To do.

Another object of the present invention is to integrate a IGBT and a diode and to manufacture a reverse conduction type IGBT which does not cause current concentration in the IGBT easily by using a usual means. It is to provide a manufacturing method of.

[0013]

In order to achieve the above object, the present invention provides a first conductivity type substrate having a pair of main surfaces and having a low impurity concentration, and a first main surface of the substrate. A second conductive type base layer, a first conductive type source layer formed in the base layer, a second conductive type collector layer formed on the second main surface of the base, and adjacent to each other. And an insulating gate electrode that is bridge-arranged between two source layers and is insulated from the surroundings, and contacts the source layer and the base layer,
An IGBT including a source electrode disposed outside the insulated gate electrode and a collector electrode formed on the surface of the collector layer, and between two base layers adjacent to each other in a region where the insulated gate electrode is not provided. A second conductivity type emitter layer having a lower impurity concentration and thinner than the base layer; a first conductivity type collector short-circuit layer formed between the collector layers on the second main surface; and a surface of the emitter layer. A unit cell is constituted by a diode composed of a source electrode formed on the substrate and a collector electrode formed on the surface of the collector short-circuit layer, and the unit cell is arranged and formed in order in the base. Prepare

Further, in order to achieve the above-mentioned other objects, the present invention provides: A first conductivity type impurity is partially introduced into the second major surface of the first conductivity type substrate having the first and second major surfaces and a low impurity concentration to form a collector short circuit layer having a high impurity concentration. Step of doing, 2. 2. a step of introducing a second conductivity type impurity into the second main surface to form a collector layer; The first
3. A step of partially forming a gate electrode on the main surface via an insulator. 4. a step of selectively implanting a first conductivity type impurity into the first main surface to form a base layer having a high impurity concentration; 5. forming a high-concentration first-conductivity-type source layer in the base layer; 6. A step of depositing an insulating film on the first main surface, and then opening the insulating film in a portion in contact with the base layer and the source layer; 7. A step of depositing a source electrode on the first main surface, and forming an emitter layer in a substrate which is in direct contact with the source electrode during its thermal deposition. A second means for obtaining a reverse conducting type IGBT is provided by sequentially performing a step of depositing a collector electrode on the second main surface.

[0015]

According to the first means, the reverse conduction type IGBT is provided.
Since T can set the respective configurations of the IGBT and the diode independently of each other, it is possible to provide the IGBT and the diode with optimum operating characteristics. Further, this reverse conducting type IGBT can reduce the carrier concentration when the diode is conducting, as compared with the conventional diode of this type, so that mutual interference between the IGBT and the diode can be extremely reduced. Furthermore, this reverse conduction type IGBT is
Since the diode and the diode are integrated in each unit cell, the area utilization factor as an element can be increased, and the diode having a uniform current distribution has a function of alleviating the current concentration of the IGBT. Therefore, the temperature distribution in the element surface is made uniform, and element destruction due to current concentration can be suppressed. In addition, this reverse conduction type I
In the IGBT, the collector short-circuit layer in the IGBT also serves as the emitter layer of the diode. Therefore, the element area can be reduced as compared with a structure in which the IGBT and the diode are separately configured and combined.

According to the second means, the reverse conduction type I
When obtaining a GBT, only ordinary means are used in order, the IGBT and the diode are integrated, and I
It is possible to easily manufacture a reverse conduction type IGBT that does not cause current concentration in the GBT.

[0017]

Embodiments of the present invention will now be described in detail with reference to the drawings.

1A and 1B are structural views showing a first embodiment of a reverse conducting type IGBT according to the present invention. FIG. 1A is a longitudinal sectional view thereof and FIG. 1B is a plan view thereof.

In FIGS. 1A and 1B, 1 is one conductivity type (for example, n type) low impurity concentration substrate (n-drift layer), and 2 is the other conductivity type (for example, p type). Base layer 3 is a source layer of one conductivity type (for example, n type) with a high impurity concentration, 4 is a collector layer with a high conductivity concentration of the other conductivity type (for example, p type), 5 is an insulated gate electrode, 6 is a gate An electrode insulating layer, 7 is a source electrode, 8 is a collector electrode, 9 is an emitter layer of the other conductivity type (for example, p-type) with a low impurity concentration, and 10 is an impurity layer of one conductivity type (for example, n-type) with a high impurity concentration. Collector short-circuit layer, 11 is an IGBT channel, 12 is a diode channel, and 13 is a MOS region channel.

The substrate 1 has first and second main surfaces, a base layer 2 is formed on the first main surface at a predetermined interval, and a central portion of the base layers 2 is formed. The source layer 3 is formed. An insulated gate electrode 5 is provided so as to bridge one base layer 2 and another base layer 2 adjacent thereto, and the periphery of this insulated gate electrode 5 is electrically insulated from an adjacent member by a gate electrode insulating layer 6. ing. A source electrode 7 is formed outside the insulated gate electrode 5, and both ends of the source electrode 7 are in conductive contact with the base layer 2 and the source layer 3. I on the surface of the substrate 1 below the insulated gate electrode 5
A GBT channel 11 is formed, and a MOS region channel 13 is formed in a portion extending from the base layer 2 through the source layer 3 to the IGBT channel 11. A collector layer 4 is provided on the second main surface of the substrate 1 at a position substantially opposite to the insulated gate electrode 5, and a collector electrode 8 is formed outside the collector layer 4. The IGBT is formed by the above configuration.

Further, an emitter layer 9 is formed between one unbridged base layer 2 of the insulated gate electrode 5 on the first main surface of the substrate 1 and another base layer 2 adjacent thereto, and The source electrode 7 is formed outside the emitter layer 9, and the diode channel 12 is formed on the substrate 1 side of the emitter layer 9.
Is formed. A collector short-circuit layer 10 is formed between the collector layers 4 on the second main surface of the substrate 1, and a collector electrode 8 is formed outside the collector short-circuit layer 10. The diode is formed by the above configuration.

Further, in plan view, as shown in FIG. 1B, the MOS region channel 13 is formed to have an elongated elliptical shape, and the source layer 3 is provided in the MOS region channel 13. One MOS region channel 13
Between the MOS region channel 13 adjacent to the emitter layer 9
(And the diode channel 12) are formed, and the portion composed of the two MOS region channels 13 and the emitter layer 9 (and the diode channel 12) constitutes a unit cell composed of one IGBT and a diode. These unit cells are formed in stripes in the base 1 in order.

In the above-mentioned structure, the collector short-circuit layer 10 is formed and arranged at the projection portion on the anode side in the lateral diffusion region of the emitter layer 9 and the base layer 2, and the line connecting both emitter layers of the diode and the direction of the electric field are formed. Since they are configured to match, the ON voltage of the diode can be minimized. Further, in the above structure, the diode emitter layer 9 and the IGBT channel 11 are separated from each other. In particular, since the emitter layer 9 and the IGBT channel 11 are separated by the source layer 3, the diode and the IGBT are separated from each other.
Mutual interference with BT can be greatly reduced as compared with the conventional device of this type. Furthermore, since the total amount of impurities in the emitter layer 9 of the diode can be made smaller than that of a device of this type up to now, the concentration of excess carriers existing in the base body 1 is reduced, and the diode and the IGBT are reduced.
Mutual interference with can be further reduced. In addition to this, the area utilization rate when the IGBT and the diode are integrated can be maximized.

By the way, the unit cells are arranged side by side in the substrate 1 as described above. The base layer 2 serves as a base layer for forming the MOS region channel 13 of the IGBT, and Diode channel 1
2 acts as a deep high impurity concentration layer forming 2. The high-impurity-collector short-circuit layer 10 also functions as an emitter layer on the collector side of the diode together with the p-emitter layer 9, and the pn junction formed by the collector layer 4 of the IGBT and the substrate 1 is on the collector electrode 8 side. It has a function to electrically short-circuit. Therefore, the area of the entire element can be reduced as compared with the case where the IGBT and the diode are independently formed.

Here, an example of the dimensions and characteristics of each part of the IGBT and the diode in this embodiment will be described.
The width of the BT channel 11 is 17 μm and the width of the diode channel 12 is 5 μm. The base 1 has a resistivity of 30 Ω · cm and a thickness of 50 μm.
Has a surface concentration of 5 × 10 ¹⁸ pieces / cm ³ and a thickness of 5 μm, and the source layer 3 has a surface concentration of 5 × 10 ²⁰ pieces / cm 3.
³ , the thickness is 1.5 μm, the collector layer 4 has a surface concentration of 3 × 10 ¹⁸ pieces / cm ³ , the thickness is 20 μm, and the collector short-circuit layer 10 has a surface concentration of 5 × 10 ²⁰ pieces / cm ³ . cm
³ , the thickness is 25 μm. Further, regarding the dimensions of the plane pattern, the gate length 1 shown in FIG. 1B is 25 μm, and the gate width w is 2000 μm.

Next, FIGS. 2 to 6 are configuration diagrams showing an embodiment of a method of manufacturing a reverse conducting type IGBT according to the present invention.

2 to 6, the same components as those shown in FIG. 1 are designated by the same reference numerals.

Hereinafter, a method of manufacturing the reverse conducting type IGBT will be described with reference to FIGS.

First, as shown in FIG. 2, a low impurity concentration substrate (n-drift layer) 1 containing n-type impurities such as phosphorus is prepared, and n is further formed on the second main surface of the substrate 1.
The collector short-circuit layer 10 is formed by using a known selective diffusion technique with a type impurity such as phosphorus.

Next, as shown in FIG. 3, a p-type impurity, for example, boron is projected and inserted into the second main surface of the base body 1, and the impurity concentration lower than that of the collector short-circuit layer 10 is obtained by using the same known selective diffusion technique. A collector layer 4 having a high concentration is formed. in this case,
Even if a p-type impurity such as boron is projected and inserted into the entire second main surface, the collector short-circuit layer 10 formed earlier does not have the collector short-circuit layer 10 because the collector short-circuit layer 10 formed earlier has a higher impurity concentration. It is selectively formed in the region.

Then, as shown in FIG.
Insulating gate electrodes 5 made of polycrystalline silicon are formed on the main surface of the insulating film 6 with a proper interval therebetween, and after the formation of the insulating gate electrodes 5, p-type impurities are formed on the first main surface. For example, boron is selectively implanted into both ends of the insulated gate electrode 5 to form the base layer 2.

Then, as shown in FIG. 5, n is formed in the base layer 2 using the insulated gate electrode 5 and the resist as a mask.
A source impurity 3 having a high impurity concentration is selectively formed by implanting a type impurity such as phosphorus.

Next, as shown in FIG. 6, a gate electrode insulating layer 6 is deposited on the peripheral portion of the insulated gate electrode 5, and the contact portions of the source layer 3 and the base layer 2 in the gate electrode insulating layer 6 are opened. After that, aluminum containing silicon is deposited on the entire first main surface by, for example, a sputtering method, and the deposited portion is further covered with 430.
The source electrode 7 is formed by heat treatment in the range of 577 ° C. to 577 ° C. At this time, the source electrode 7 makes ohmic contact with the source layer 3 and the base layer 2 having a high impurity concentration, and aluminum diffuses into a portion of the diode channel 12 where the source electrode 7 comes into contact with the base body 1 to form 100 n.
An extremely thin p-type conductive layer of about m, that is, an emitter layer 9 having a low impurity concentration is formed, and the source electrode 7 and the emitter layer 9 are formed.
A Schottky barrier is formed at the interface. On the other hand, as in the case described above, an aluminum film containing silicon is deposited on the entire second main surface by a sputtering method or the like, and the deposited portion is heat treated in the range of 430 to 577 ° C. to collect the collector electrode. 8 is formed. When the collector electrode 8 is formed, since the surface of the collector layer 4 has a high impurity concentration, the collector electrode 8 and the collector layer 4 are in ohmic contact.

Here, the low impurity concentration emitter layer 9 preferably has a carrier concentration of 1 × 10 ¹⁴ / cm ² or less and a thickness of 100 Å to 100 nm.

The reason is that the carrier concentration is 1 × 10 ¹⁴ c.
When m ² or more, the emitter layer 9 and the source electrode 7 approach ohmic contact, and since the emitter layer 9 has a high impurity concentration, holes are easily injected from the emitter layer 9 to the base body 1 and are minority carriers. Due to the hole accumulation effect, the high speed operation characteristic of the recovery characteristic of the diode is impaired.

When a defect in wire bonding, for example, occurs at the Schottky barrier interface, electrons flow into the recombination center generated in the defect at the time of reverse bias, the leak current increases, and the breakdown voltage decreases as a result. Become. In this case, if the thickness of the emitter layer 9 is selected to be thick to some extent, the probability that electrons will transit to the defect due to a tunnel current or the like will be significantly reduced. At this time, the minimum limit of the thickness of the emitter layer 9 is about 100Å. Therefore, if the thickness of the emitter layer 9 is selected to be 100Å or more, the leakage current is reduced and the breakdown voltage of the diode can be increased. . Moreover, since the Schottky barrier is formed between the emitter layer 9 and the source electrode 7, there is an advantage that the breakdown voltage does not deteriorate even if the depletion layer due to the pn junction punches up to the source electrode 7. on the other hand,
If the thickness of the emitter layer 9 is made thicker than necessary, the total amount of impurities in the emitter layer 9 increases and the injection of holes into the base body 1 increases, so that the high speed operation characteristics of the diode are impaired. At this time, the thickness of the emitter layer 9 obtained by the heat treatment in the above temperature range of 430 to 577 ° C. is
It is about 100 nm, and if it is 100 nm or less,
The high speed operation characteristics of the diode are not impaired.

Next, FIG. 7 is a structural view showing a second embodiment of the reverse conductivity type IGBT according to the present invention.
(A) is a cross-sectional perspective view thereof, and (b) is a top view thereof.

In FIGS. 7A and 7B, reference numeral 14 is a collector buffer layer of one conductivity type (for example, n type) with a high impurity concentration, and other components are the same as those shown in FIG. The elements are given the same symbols.

The difference between this embodiment and the first embodiment described above is that the first embodiment has an elongated elliptical MOS region channel 13 and the unit cells are formed in stripes. On the other hand, in the present embodiment, the circular MO
The S-region channel 13 (the hatched portion in FIG. 7) is provided, and the unit cells are also formed in the same circular shape, and in the first embodiment, the collector shorting layer 10 is provided between the collector layers 4. In contrast to the present embodiment, the present embodiment is different only in that the collector buffer layer 14 is formed between the collector layers 4 and on the back surface of the collector layer 4 on the substrate 1 side. There is no structural difference between the example and the first embodiment.

The function of this embodiment is essentially the same as that of the above-mentioned first embodiment, but in the circular unit cell of this embodiment, the portions other than the MOS region channel 13 are diode-formed. Since the MOS region channel 13 has a circular shape, the resistance of the MOS region channel 13 can be reduced.
There is an advantage that the current per unit area can be increased as compared with the striped one in the above embodiment.

Next, FIG. 8 is a structural view showing a third embodiment of the reverse conductivity type IGBT according to the present invention.
(A) is a cross-sectional perspective view thereof, and (b) is a top view thereof.

In FIGS. 8A and 8B, the same components as those shown in FIG. 7 are designated by the same reference numerals.

The difference between this embodiment and the above-mentioned second embodiment is that, while the second embodiment has a diode region formed on the outer portion of a circular unit cell, this embodiment is different from the second embodiment. On the contrary, the example is only that the diode region is formed in the central portion of the circular unit cell, and other difference in the configuration between the present embodiment and the second embodiment is Absent.

The structure of this embodiment has the advantage that the resistance of the MOS region channel 13 can be made smaller than that of the second embodiment described above. In this case, what shape to select as the structure of the unit cell can be determined by use conditions such as the ratio of the currents flowing in the IGBT and the anti-parallel diode.

FIG. 9 shows the reverse conductivity type I according to the present invention.
It is a structural diagram which shows the 4th Example of GBT.

In FIG. 9, the same components as those shown in FIG. 1 are designated by the same reference numerals.

In this embodiment, when the emitter layer 9 of the diode is formed, it is not formed by using the means such as the implantation of impurities alone as in the first embodiment, but they are adjacent to each other. The only difference is that they are formed by utilizing the lateral impurity diffusion in the two base layers 2, and there are no other structural differences between this embodiment and the first embodiment.

According to the structure of this embodiment, the impurity layers are overlapped by the lateral impurity diffusion to form a low concentration junction, and the pinch-off effect of the depletion layer ensures a sufficient reverse breakdown voltage. be able to.

Further, FIG. 10 is a structural view showing a fifth embodiment of the reverse conductivity type IGBT according to the present invention.

In FIG. 10, reference numeral 15 is a Schottky barrier, and other components that are the same as those shown in FIG. 1 are given the same reference numerals.

In this embodiment, when the emitter layer 9 of the diode is formed, it is not formed by using a method such as implantation of impurities alone as in the first embodiment, but the base layer 1 is formed. The only difference is that only the Schottky barrier 15 is formed between the source electrodes 7, and there are no other structural differences between this embodiment and the first embodiment.

According to the structure of this embodiment, the high speed operation characteristics of the diode can be enhanced, and the distance between the base layers 2 adjacent to each other can be reduced to reduce the leak current. is there.

In each of the above embodiments, the n-channel reverse conduction type IGBT having the n-type as the first conductivity type and the p-type as the second conductivity type has been described. However, it is obvious that the same characteristics as those described above can be obtained in a p-channel reverse conduction type IGBT in which the first conductivity type is p-type and the second conductivity type is n-type. is there.

[0054]

As described above, according to the present invention,
Base 1 in the form of a unit cell comprising an IGBT and an antiparallel diode
Since it is integrated into the inside, the current concentration due to the variation in the characteristics between the cells in the base body 1 is alleviated,
The breakdown resistance of the device can be improved and
There is an effect that the area utilization factor of the element is improved and a reverse conduction type insulated gate bipolar transistor capable of flowing a larger current in the same area can be obtained.

Further, according to the present invention, the reverse conduction type IGBT in which the IGBT and the diode are integrated and the current concentration in the IGBT does not occur can be easily manufactured by using the usual means. is there.

[Brief description of drawings]

FIG. 1 is a cross-sectional structural view and a plan view showing a first embodiment of a reverse conductivity type IGBT according to the present invention.

2 is a configuration diagram showing an embodiment of a method of manufacturing the reverse conductivity type IGBT shown in FIG. 1, and is a configuration diagram showing a first step thereof. FIG.

FIG. 3 is a configuration diagram showing a second step in the embodiment of the manufacturing method of FIG.

FIG. 4 is a configuration diagram showing a third step in the embodiment of the manufacturing method of FIG.

5 is a configuration diagram showing a fourth step in the embodiment of the manufacturing method of FIG.

FIG. 6 is a configuration diagram showing a final step in the embodiment of the manufacturing method of FIG.

FIG. 7 is a cross-sectional perspective view and a plan view showing a second embodiment of the reverse conductivity type IGBT according to the present invention.

FIG. 8 is a cross-sectional perspective view and a plan view showing a third embodiment of the reverse conductivity type IGBT according to the present invention.

FIG. 9 is a sectional structural view showing a fourth embodiment of the reverse conductivity type IGBT according to the present invention.

FIG. 10 is a sectional structural view showing a fifth embodiment of the reverse conductivity type IGBT according to the present invention.

[Explanation of symbols]

 1 Base (n-Drift Layer) 2 Base Layer 3 Source Layer 4 Collector Layer 5 Insulated Gate Electrode 6 Gate Electrode Insulating Layer 7 Source Electrode 8 Collector Electrode 9 Emitter Layer 10 Collector Shorting Layer 11 IGBT Channel 12 Diode Channel 13 MOS Region Channel 14 Collector buffer layer 15 Schottky barrier

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Aki Nakano 7-1-1 Omika-cho, Hitachi-shi, Ibaraki Hitachi Ltd. Hitachi Research Laboratory

Claims (7)

[Claims] 1. A low-concentration first-conductivity-type base having a pair of main surfaces, a second-conductivity-type base layer formed on the first main surface of the base, and a base layer in the base layer. The formed source layer of the first conductivity type, the collector layer of the second conductivity type formed on the second main surface of the base, and the two source layers adjacent to each other are arranged in a bridging manner and insulated from the surroundings. While contacting the insulated gate electrode, the source layer and the base layer,
An insulated gate bipolar transistor comprising a source electrode disposed outside the insulated gate electrode and a collector electrode formed on the surface of the collector layer, and two adjacent insulated gate bipolar transistors in a region where the insulated gate electrode is not provided. A second conductivity type emitter layer formed between base layers and having a lower impurity concentration than the base layer; a first conductivity type collector short-circuit layer formed between the collector layers on the second main surface; A unit cell is formed by a diode composed of a source electrode formed on the surface of the layer and a collector electrode formed on the surface of the collector short-circuit layer, and the unit cell is sequentially arranged and formed in the base. Reverse conduction type insulated gate bipolar transistor. 2. The reverse conduction type insulated gate bipolar transistor according to claim 1, wherein the emitter layer is formed by overlapping lateral diffusions of the two adjacent base layers. 3. The reverse conduction type insulation according to claim 1, wherein, instead of forming the emitter layer, a source electrode of the emitter layer forming portion is brought into contact with the substrate and a Schottky barrier is formed there. Gate bipolar transistor. 4. The reverse conduction type according to claim 1, wherein a collector buffer layer of the first conductivity type having an impurity concentration higher than that of the substrate is provided between the substrate and the collector layer. Insulated gate bipolar transistor. 5. The emitter layer has a carrier concentration of 1 ×
The reverse conduction type insulated gate bipolar transistor according to claim 1, wherein the reverse conduction type insulated gate bipolar transistor has a thickness of 10 ¹⁴ / cm ² or less and a thickness in the range of 100 Å to 100 nm. 6. A method of manufacturing a reverse conduction type insulated gate bipolar transistor, comprising the following steps. 1. A first conductivity type impurity is partially introduced into the second major surface of the first conductivity type substrate having the first and second major surfaces and a low impurity concentration to form a collector short circuit layer having a high impurity concentration. Step to do, 2. 2. a step of introducing a second conductivity type impurity into the second main surface to form a collector layer; 3. A step of partially forming a gate electrode on the first main surface via an insulator. 4. A step of selectively implanting an impurity of the first conductivity type into the first main surface to form a base layer having a high impurity concentration, 5. forming a high-concentration first-conductivity-type source layer in the base layer; 6. A step of depositing an insulating film on the first main surface, and then opening the insulating film in a portion in contact with the base layer and the source layer. 7. A step of heat-depositing the source electrode on the first main surface and forming an emitter layer in the substrate which is in direct contact with the source electrode during the heat-deposition. Depositing a collector electrode on the second main surface. 7. The carrier concentration of the emitter layer is 1 × 1.
7. The method for producing a reverse conduction type insulated gate bipolar transistor according to claim 6, wherein the thickness is set to 0 ¹⁴ / cm ² or less and the thickness thereof is set in the range of 100 Å to 100 nm.