JPH06196534A - Chip position display method in semiconductor wafer - Google Patents

Abstract

PURPOSE:To make it possible to specify the position of a chip in a semiconductor wafer without providing a different pattern for each chip. CONSTITUTION:Crosswise recessed parts 14A and 14B are formed on the surface of each chip 12 at the same position in a semiconductor wafer where metal particles are deposited in a sputtering process. A coverage shape of the metal particles by sputtering varies with the distance and direction from the center of the semiconductor wafer, which makes it possible to specify the position of the chips 12 in the semiconductor wafer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of displaying the position of each chip on a semiconductor wafer.

[0002]

2. Description of the Related Art When analyzing a semiconductor device failure, it is difficult to investigate the cause of the failure and to estimate the failure range (distribution within wafer and quantity) if the position of the defective chip is not known. Therefore, there is a problem in that measures against defects cannot be taken.

On the other hand, for example, Japanese Patent Laid-Open No. 58-515.
As disclosed in Japanese Patent No. 13 publication, when step-and-repeat exposure is performed on a semiconductor wafer to transfer a clear pattern, a symbol specifying a chip is transferred to all chips or arbitrary chips in the wafer. There is a wafer exposure method.

Further, as disclosed in Japanese Patent Application Laid-Open No. 2-101729, in a pattern transfer process of a semiconductor device, a scanning by a polygon mirror and a shutter are interlocked on a wafer by utilizing an optical system of an exposure device, There is a chip identification code drawing method in which a chip identification code is drawn with laser light.

[0005]

[Means for Solving the Problems] Japanese Patent Application Laid-Open No. 58-515
According to the method disclosed in Japanese Patent No. 13, when the chip specifying symbol is transferred to the wafer during the step-and-repeat exposure,
Each chip must have a different pattern, which makes the pattern forming process complicated.

Further, in the chip identification symbol drawing method disclosed in Japanese Patent Laid-Open No. 2-101729, the process of writing an identification symbol different for each chip using the optical system of the exposure apparatus is complicated, and the operation efficiency of the exposure apparatus is reduced. There is a problem that it does.

The present invention has been made in view of the above-mentioned problems of the prior art.
A method for displaying the chip position on a semiconductor wafer that does not need to be filled in with a marker or the like and can display each chip position within the semiconductor wafer without lowering the operation efficiency of the exposure apparatus. The purpose is to provide.

[0008]

According to the present invention, at least a part of a chip surface of a semiconductor wafer is provided with vertical and horizontal recesses at the same position, and a metal is sputtered on the surface of the chip. The above object is achieved by a method of displaying a chip position on a semiconductor wafer, which is characterized in that metal is simultaneously sputtered in the recesses.

[0009]

According to the present invention, the vertical and horizontal recesses are formed on the surface of each chip in the semiconductor wafer, and when sputtering is performed on the chips, the metal to the recesses depends on the distance and direction from the center position of the sputtering position. The position of the chip in the semiconductor wafer can be specified by utilizing the fact that the deposition state is different.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

In this embodiment, a portion of the semiconductor wafer 10 which is covered by a mask (not shown) on the outer periphery of each chip 12 is used to make recesses 14A in the vertical and horizontal directions at the same position in each chip. 14B is formed and metal particles are also deposited on the recesses 14A and 14B during sputtering.

The recesses 14A and 14B are formed between a pair of metal rectangular islands 15, respectively.

As described above, as shown in FIG. 3, the metal particles sputtered from the sputter target 16 at the time of sputtering cover the recesses 14A and 14B in each chip 12 on the semiconductor wafer 10, but at this time, The metal particles are scattered at a large angle and are incident on the semiconductor wafer 10.

Therefore, the number of metal particles reaching the peripheral portion of the semiconductor wafer 10 is smaller than that of the central portion of the semiconductor wafer 10, and the metal particles are less likely to attach to the shadow of the pattern of the recesses 14A and 14B. The shape of the coverage of the particles will differ depending on the position and direction from the center.

For example, in FIGS. 1 and 3, the thickness of the metal particles deposited in the recesses 14A and 14B at the central position of the semiconductor wafer 10, that is, the coverage shape (in the IV-IV line cross section of FIG. 2) is as shown in FIG. As shown in FIG. 4 (A), it is symmetrical, but in the concave portion located on the left side from the center, the coverage shape is thicker on the left side and thinner on the opposite side as shown in FIG. The recessed portion at the right side has a coverage shape opposite to that on the left side as shown in FIG.

From the above, as shown in the enlarged view of FIG. 2, vertical and horizontal recesses 14 are formed at the same position in each chip 12.
If A and 14B are formed, the coverage shape of the metal particles by sputtering will be different in the horizontal direction and the vertical direction of the semiconductor wafer 10. For example, there is also an example in which when a 6-inch wafer and an 8-inch sputter target are used, the amount of metal in the peripheral portion is 5% smaller than that in the center of the semiconductor wafer.

Therefore, the concave portion 14 of the chip which is regarded as a defective product
By observing the coverage shape of the cross sections of A and 14B, it is possible to roughly detect the position of the chip in the semiconductor wafer 10.

In this embodiment, the recess 14A,
Since 14B does not need to be changed depending on the circuit formed on the chip 12, the cost can be significantly reduced as compared with the case where an identification symbol or the like is formed in the pattern.

The difference between the left and right and up and down directions of the coverage of metal particles due to the above-mentioned sputtering becomes more remarkable as the depth of the recess becomes larger and steeper and narrower. Further, the warp of the semiconductor wafer 10, the difference in resist thickness, the edging speed, etc. By undergoing the step of producing the difference between the central portion and the peripheral portion of the wafer, the coverage shape of the metal particles by sputtering further increases the difference due to the difference in the horizontal and vertical positions on the semiconductor wafer 10.

In the above embodiment, the vertical and horizontal recesses 1
4A and 14B have the same shape, the present invention is not limited to this. For example, as shown in FIG. 5, the islands 15 and 18 forming the recesses may have an asymmetric pattern.

[Brief description of drawings]

FIG. 1 is a plan view showing a semiconductor wafer for carrying out a chip position display method according to the present invention.

FIG. 2 is an enlarged plan view showing one chip in the semiconductor wafer of FIG.

FIG. 3 is a schematic side view showing a semiconductor wafer sputtering process.

4 is an IV-I of FIG. 2 at each position of A, B, and C of FIG.
Enlarged sectional view of the portion corresponding to line V

FIG. 5 is a plan view showing a main part of a chip according to another embodiment of the present invention.

[Explanation of symbols]

 10 ... Semiconductor wafer 12 ... Chip 14A, 14B ... Recessed portion 15 ... Island 16 ... Sputter target

Claims (1)

[Claims] 1. A step of forming vertical and horizontal recesses at the same position on at least a part of a chip surface of a semiconductor wafer and sputtering metal on the surface of the chip, and simultaneously sputtering metal on the recesses. A method for displaying a chip position on a semiconductor wafer, comprising: