JPH06189236A - Projection image correction circuit of liquid crystal projector - Google Patents

Abstract

PURPOSE:To provide the projection image correction circuit of a liquid crystal projector where the distortion of an image on a screen generated due to the tilt and shift angle of the projector against the screen of a liquid crystal projector is possible to be corrected also in a vertical direction at the same time of a conventional horizontal direction correction, the aspect ratio of the image itself is maintained and a vertical linearity is excellent. CONSTITUTION:This circuit has a first ROM 26 preliminarily storing data of scanning line numbers to be thinned and/or scanning lines to be overlapped corresponding to the tilt and shift angle for the screen of a liquid crystal projector and a first counter 27 counting the clock of a horizontal synchronizing signal (HD) 19 by being reset by a vertical synchronizing signal (VD), and is provided with a correction data processing circuit controlling the writing of the scanning line to a frame memory and/or the reading of the scanning line from the frame memory in accordance with the count value and the data stored in the first ROM 26.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal projector for enlarging and displaying a television screen, and more particularly to a trapezoidal distortion of an image generated when the liquid crystal projector is installed in an improper state with respect to the screen. It relates to a circuit that corrects.

[0002]

2. Description of the Related Art A liquid crystal projector is a device for displaying an image displayed on a liquid crystal display panel by projecting it onto a screen through a lens with a projection lamp, and is relatively inexpensive without using an expensive large cathode ray tube. It is used for the purpose of responding to the needs of consumers in recent years who want to listen to a television screen on a large screen, or for the purpose of projecting a video tape in a relatively small movie theater called a mini theater.

By the way, in a liquid crystal projector, an image without distortion is usually obtained according to the conditions set by the manufacturer, specifically, if the optical axis of the lens of the projector is installed at right angles to the screen. The projector is often moved and used except the case where it is permanently installed for commercial use in the above-mentioned mini theater. For this reason, it is often not installed according to the installation conditions expected by the manufacturer, and as a result, there is a possibility that a very hard-to-see image in which the screen is distorted into a trapezoid is projected.

Specifically, it is relatively easy to install the projector in the horizontal center of the screen, but it is often difficult to install the projector in the vertical center of the screen. On the other hand, the projector is often installed at a relatively low position.

FIGS. 5 and 6 are schematic diagrams for explaining the installation state of such a liquid crystal projector and the state of the image projected on the screen. As shown in the side view of FIG. 5 (a), the liquid crystal projector 51 normally has a screen 52 with respect to the optical axis 50 of the lens of the projector 51, for example.
When is installed at a right angle, a normal image 53 without distortion is displayed on the screen 52 as shown by the solid line in FIG.

However, as shown in FIG. 5 (b), for example, the projector 51 is installed at a position relatively low with respect to the screen 52, and the screen is placed with respect to the optical axis 50 of the lens of the projector 51. If it is installed in a state where it is tilted by an angle θ instead of being a right angle and is looking up, as shown by the broken line in FIG. 6 (a), the image 54 displayed on the screen 52 is displayed. Causes trapezoidal distortion with its upper side expanding.

The above-mentioned angle θ is referred to as a tilt angle, and when the projector 51 is installed in a state of overlooking the screen 52 contrary to FIG. 5B, a trapezoidal distortion that spreads downward is generated on the screen 52. Occurs.

Such a problem can occur even in a CRT type projector. However, in a CRT type projector, the deflection current of the CRT is adjusted so that an image that is distorted, which is the opposite of the distortion that occurs on the screen, is displayed on the CRT. It is possible to easily display the image.
However, in the case of a liquid crystal projector, the pixels of the liquid crystal display panel are fixed in advance according to the aspect ratio of the image, and therefore, it is not easily solved as in the CRT method.

By the way, in the liquid crystal projector 51 using the conventional liquid crystal display panel, image compression or image thinning is sequentially performed in the horizontal direction according to the trapezoidal distortion, thereby performing the inverse correction on the liquid crystal display panel. Screen 52
It is possible to correct the trapezoidal distortion above. However, in the correction only in the horizontal direction, as shown by the broken line in FIG. 6B, the corrected image 55 projected on the screen 52 is stretched in the vertical direction, which is the original image. It will be different from the aspect ratio.

As shown in FIG. 5B, when the liquid crystal projector 51 has a tilt angle with respect to the screen 52, and when the tilt angle is smaller than the calculated value, FIG. The image 54 on the screen 52 contracts on the lower side and expands on the upper side, as indicated by the broken line in (). Further, when the tilt angle θ becomes large, the ratio of the upper and lower end portions of the image on the screen 52 is different, but the image tends to stretch and the linearity in the vertical direction deteriorates.

[0011]

As described above, when the conventional liquid crystal projector is used, trapezoidal distortion is likely to occur in the image projected on the screen, and the correction can be performed only in the horizontal direction. There is a problem in that in this case only an image extending in the vertical direction can be obtained as much as possible.

The present invention has been made in view of such circumstances, and the distortion of the image on the screen caused by the tilt angle with respect to the screen of the liquid crystal projector is corrected in the vertical direction simultaneously with the conventional correction in the horizontal direction. It is also an object of the present invention to provide a projection image correction circuit for a liquid crystal projector that enables correction of the above, maintains the original aspect ratio of the image, and has good vertical linearity.

[0013]

The present invention is basically
A frame memory that stores the image data of each scanning line forming one screen in synchronization with each clock of the horizontal synchronization signal during the period of the vertical synchronization signal, and a liquid crystal display panel that displays the image data stored in the frame memory. , A lens for projecting an image displayed on the liquid crystal display panel onto a screen, and sequentially compressing image data of each scanning line when the optical axis of the lens has a vertical tilt angle with respect to the screen. To correct horizontal distortion, correct vertical distortion by thinning and inserting scanning lines, and correct vertical distortion when correcting trapezoidal distortion that occurs in the image projected on the screen. In the projection image correction circuit of the liquid crystal projector, the number of scanning lines to be thinned out and / or the data relating to the scanning lines to be overlapped is stored in advance. Storage means, counting means that is reset by the vertical synchronization signal and counts the clock of the horizontal synchronization signal, and writing of the scanning line to the frame memory according to the count value of this counting means and the data stored in the storage means And / or control means for controlling the reading of the scanning lines from the frame memory.

[0014]

In the projection image correction circuit of the liquid crystal projector of the present invention, the scanning line number to be thinned out and / or the data regarding the scanning line to be overlapped and read out from the storage means corresponding to the tilt angle and the count value of the counting means. Scan lines at the time of coincidence with each other are not written to the frame memory, are written in duplicate, or are not read from the frame memory, or are read in duplicate. Overwriting is performed to correct vertical distortion of the image projected on the screen.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings showing the embodiments thereof.

FIG. 1 is a block diagram showing the basic construction of an embodiment of a projection image correction circuit of a liquid crystal projector according to the present invention. Note that FIG. 1 shows a circuit configuration relating to only one of the R, G, B signals, or the Y-color difference signal, and in reality, each signal is provided with the same configuration circuit.

The analog video signal 16 is a low pass filter.
After passing through (LPF) 1, the high frequency components that cause aliasing noise during sampling are attenuated, and then the A / D
The converter 2 converts the digital signal, that is, digital image data. The image data digitally converted by the A / D converter 2 is written from the selector 5 to the frame memory 6 via the data bus.

The selector 5 is connected to the selector 5 via a data bus.
Although the D / A converter 3 is connected, the D / A converter 3 converts the image data read from the frame memory 6 into an analog video signal and outputs it through a low pass filter (LPF) 4.

As a method of correcting the image distortion, thinning of lines (scanning lines) of the video signal 16 and insertion of lines by duplication are performed. The thinning of lines is performed when the video signal 16 is written in the frame memory 6. The line insertion is performed when the video signal 16 is read from the frame memory 6.

The clock generation circuit 10 uses a horizontal synchronization signal (HD) 19
A clock synchronized with is generated and supplied to the horizontal write counter circuit 11 and the horizontal read counter circuit 12. The horizontal write counter circuit 11 generates a write address signal for the frame memory 6 in synchronization with the clock supplied from the clock generation circuit 10, and the vertical write counter circuit 13 generates a write address signal for the frame memory 6 in synchronization with the horizontal synchronization signal (HD) 19. Output to the selector 8. The horizontal read counter circuit 12 generates the read address signal of the frame memory 6 in synchronization with the clock supplied from the clock generation circuit 10 and the vertical read counter circuit 14 in synchronization with the horizontal synchronization signal (HD) 19. Output to the selector 9.

The clocks generated by the horizontal write counter circuit 11 and the horizontal read counter circuit 12 are the image data forming each horizontal line, in other words, the clock corresponding to each pixel of the liquid crystal display panel forming each horizontal line. The clock generated by the vertical write counter circuit 13 and the vertical read counter circuit 14 is a clock corresponding to each horizontal line that constitutes one vertical cycle.

The selectors 5, 8 and 9 switch the address bus and the data bus in response to reading and writing of the frame memory 6. Specifically, the selector 5 is a video signal output from the A / D converter 2 when writing to the frame memory 6.
The data bus is switched so that the 16 digitally converted image data is input to the frame memory 6, and when reading from the frame memory 6, the frame memory 6 is sent to the D / A converter 3.
The data bus is switched so that the digital data is output from the.

The selector 8 switches the address bus so that the address signal output from the horizontal write counter circuit 11 is input to the frame memory 6 when writing to the frame memory 6, and the horizontal read counter is used to read from the frame memory 6. The address bus is switched so that the address signal output from the circuit 12 is input to the frame memory 6.

The selector 9 switches the address bus so that the address signal output from the vertical write counter circuit 13 is input to the frame memory 6 when writing to the frame memory 6, and the vertical read counter is used to read from the frame memory 6. The address bus is switched so that the address signal output from the circuit 14 is input to the frame memory 6.

The reset circuit 7 generates a vertical blanking signal from the vertical synchronizing signal (VD) 18 and supplies it to the vertical write counter circuit 13 and the vertical read counter circuit 14 as a V reset signal 25 for resetting them. The vertical write counter circuit 13 and the vertical read counter circuit 14 are V
It is a counter that counts up the horizontal synchronizing signal (HD) 19 reset by the reset signal 25 as a clock to be counted, and counts up the address according to the video signal start line.

Further, the reset circuit 7 has a horizontal synchronizing signal (H
A reset signal for the horizontal write counter circuit 11 and the horizontal read counter circuit 12 is generated from D) 19 and the vertical synchronizing signal (VD) 18 and given to them.

Trapezoidal distortion correction setting means for horizontal and vertical directions
The correction data 20 output from (not shown) generates line thinning data (first VEN) 23 and line insertion data (second VEN) 24 in the correction data processing circuit 15. The horizontal thinning data (HEN) 22 is a signal for performing horizontal thinning processing, and is generated by the horizontal correction processing circuit 32 by a conventionally known method.

Here, for convenience of description, it is assumed that the thinning-out process is performed at the time of writing data to the frame memory 6 and the line insertion is performed at the time of reading out the data from the frame memory 6, but the thinning-out process is performed at the frame memory. It is also possible to perform this at the time of reading the data to 6. Further, the correction of the trapezoidal distortion by the image compression in the horizontal direction is known as a conventional technique, and therefore its explanation is omitted.

FIG. 2 is a block diagram showing a detailed configuration of the correction data processing circuit 15 shown in FIG. 1, in which the image projected on the screen is lined at regular intervals according to the amount of vertical extension. The circuit as the first invention of the projection image correction circuit of the liquid crystal projector of the present invention for performing the thinning process is shown. 3A and 3B are timing charts for explaining the operation of the correction data processing circuit 15. FIG. 3A is a V reset signal 25, and FIG.
D) 19, (c) line thinning data (1st VEN) 23,
(d) shows the WE signal 21, and (e) shows the load signal (LOAD) 31, respectively.

Vertical correction data corresponding to the tilt angle θ is stored in advance in the first ROM 26. The first counter 27 is a presettable 8-bit binary counter that uses the horizontal synchronizing signal (HD) 19 as a clock to be counted, and is reset by the V reset signal 25. Also, V reset signal 25
Is also input to the one-shot multivibrator 29 through the AND gate 28.

The one-shot multivibrator 29 generates a load signal (LOAD) 31 which is a pulse having a short width with reference to the rising edge of the V reset signal 25. This load signal (L
The OAD) 31 is a signal for causing the first counter 27 to preset the data of the first ROM 26.

Considering, for example, that one line is thinned out every m lines in the correction data processing circuit 15, if "255-m" is preset in the presettable first counter 27, the first counter 27 counts. A carry is generated each time the horizontal synchronizing signal (HD) 19 which is the target clock is counted m times. This carry signal is used as the line thinning data (first VEN) 23. This line thinning data
The (first VEN) 23 is given to the vertical write counter circuit 13 as an enable signal, and stops counting up of the mth line of the vertical write counter circuit 13.

The gate circuit 30 is an inverting circuit, which inverts the polarity of the line thinning-out data (first VEN) 23 and outputs the WE signal.
Generates 21. The WE signal 21 is given to the frame memory 6 as a write enable signal, and writing in the frame memory 6 is prohibited. As a result, the frame memory 6 stops writing the video signal of the m-th line, and the vertical write counter circuit 13 does not count up the m-th line. By such operation, the next m + 1
The data of the line is written in the address of the m line of the frame memory 6, and the data of the m line is not written in the frame memory 6.

On the other hand, the vertical read counter circuit
Since 14 sequentially reads the frame memory 6, the data of the video signal which is not written in the frame memory 6 is thinned out, and the video signal data in which the m + 1 line comes after the m-1 line is read.

The WE signal 21 is also input to the one-shot multivibrator 29 through the AND gate 28.
One-shot multivibrator 29 is V reset signal 25
Similarly, the load signal (LOAD) 31, which is a pulse with a short width, is generated based on the falling edge of the WE signal 21, and the first counter 27
The data of the first ROM26 is preset again. By repeating this, one thinning can be performed every m lines.

However, with such a method, the aspect ratio can be corrected, but the vertical linearity cannot be corrected. Therefore, a block diagram of FIG. 4 shows a configuration example of the correction data processing circuit 15 capable of correcting the vertical linearity as the second invention of the projection image correction circuit of the liquid crystal projector of the present invention.

The third ROM 34 in FIG. 4 is a memory for storing the thinned-out line numbers, and the fourth ROM 38 is a memory for storing the insertion line numbers. Specifically, the relationship between the change in the aspect ratio and the change in the vertical linearity for each tilt angle θ is calculated, and the data in which the thinned line number and the inserted line number are designated in advance are stored in the third ROM 34 and the fourth ROM 38. I will let you. Further, the second ROM 33 stores the address where the first data of the group of data regarding each tilt angle θ written in advance in the third ROM 34 and the fourth ROM 38 is stored.

The third counter 37 is a counter that is reset by the V reset signal 25 and counts up the horizontal synchronizing signal (HD) 19 as a clock to be counted, and counts the line number. The second counter 36 is an address counter of the third ROM 34, the fourth counter 40 is an address counter of the fourth ROM 38,
Both are reset by the V reset signal 25 and at the same time
2 Preset the ROM data. At this time, the third ROM 34 outputs the data of the first thinning line corresponding to the tilt angle θ. Similarly, the fourth ROM 38 outputs the data of the first insertion line. In addition, these counters 36 and 40 are line thinning data (first VEN) 23, line insertion data (second VEN).
It is a counter that counts up with 24 as the clocks to be counted.

The first coincidence detection circuit 35 is a circuit for comparing the data of the third ROM 34 and the data of the third counter 37 to detect the coincidence of the data, and the second coincidence detection circuit 39 is the fourth ROM 38.
Is a circuit for detecting the coincidence of the data by comparing the data of the third counter 37 with the data of the third counter 37, and the respective coincidence detection outputs generate the line thinning data (first VEN) 23 and the line insertion data (second VEN) 24. .

The line thinning-out data (first VEN) 23 is used to stop the count-up of the vertical write counter circuit 13 and the writing of the frame memory 6 similarly to the line thinning-out data (first VEN) 23 described with reference to FIG. Let me do it first
3 The thinning process of the line that matches the data of the ROM 34 is performed.

Similarly, the line insertion data (second VEN) 24 is the insertion line data of the fourth ROM 38 and the coincidence signal of the third counter 37, and indicates the insertion line. Also, the line insertion data
(Second VEN) 24 is an enable signal for the vertical read counter circuit 14 shown in FIG. 1, and stops counting up of the vertical read counter circuit 14. When the count-up of the vertical read counter circuit 14 is stopped, the frame memory 6 inserts a line by continuously reading out two lines of data before the count-up is stopped.

When the respective coincidences are detected, the second counter 36 or the third counter 40 is counted up by the line thinning data (first VEN) 23 or the line insertion data (second VEN) 24 and the next thinning or insertion line is detected. Is output from the third ROM 34 or the fourth ROM 38. By repeating this operation, line thinning and insertion for one vertical period are performed.

Here, for the sake of convenience of description, some image deterioration occurs because simple line thinning and insertion are performed. To improve this, horizontal and vertical filters can be used to minimize the deterioration of image quality.

[0044]

As described above in detail, according to the present invention, in addition to the conventional correction, it is possible to correct the elongation and linearity of the image in the vertical direction to reproduce the original image, Therefore anyone makes it possible to easily install a liquid crystal projector in any place because no longer will require a severe installation conditions.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of an embodiment of a projection image correction circuit of a liquid crystal projector according to the present invention.

FIG. 2 is a block diagram showing the configuration of the first embodiment of the projection image correction circuit of the liquid crystal projector according to the present invention.

FIG. 3 is a timing chart for explaining the operation of the first invention of the projection image correction circuit of the liquid crystal projector according to the present invention.

FIG. 4 is a block diagram showing the configuration of a second embodiment of the projection image correction circuit of the liquid crystal projector according to the present invention.

FIG. 5 is a schematic diagram illustrating an installation state of a liquid crystal projector and a state of an image projected on a screen.

FIG. 6 is a schematic diagram illustrating an installation state of a liquid crystal projector and a state of an image projected on a screen.

[Explanation of symbols]

 15 Correction data processing circuit 26 1st ROM 27 1st counter 34 3rd ROM 35 1st match detection circuit 36 2nd counter 38 4th ROM 39 2nd match detection circuit 40 4th counter

Claims (3)

[Claims] 1. A frame memory for storing image data of each scanning line constituting one screen in synchronization with each clock of a horizontal synchronizing signal in a period of one vertical synchronizing signal, and an image data stored in the frame memory. LCD panel to display,
A lens for projecting an image displayed on the liquid crystal display panel onto a screen, and sequentially compressing image data of each scanning line when the optical axis of the lens has a vertical tilt angle with respect to the screen. To correct horizontal distortion, and to correct vertical distortion by thinning and inserting scan lines to correct vertical distortion when correcting trapezoidal distortion that occurs in the image projected on the screen. In a projection image correction circuit of a liquid crystal projector for storing, a storage unit that stores in advance data regarding scanning line numbers to be thinned out and / or scanning lines to be overlapped corresponding to the tilt angle, and horizontal synchronization that is reset by a vertical synchronization signal. Counting means for counting the clock of the signal, and the counter according to the count value of the counting means and the data stored in the storage means. Projected image correction circuit for a liquid crystal projector characterized by comprising a control means for controlling reading of the scanning line from the writing and / or the frame memory of the scanning lines to Mumemori. 2. A frame memory for storing the image data of each scanning line constituting one screen in synchronization with each clock of the horizontal synchronizing signal in the period of one vertical synchronizing signal, and the image data stored in the frame memory. LCD panel to display,
A lens for projecting an image displayed on the liquid crystal display panel onto a screen, and sequentially compressing image data of each scanning line when the optical axis of the lens has a vertical tilt angle with respect to the screen. To correct horizontal distortion, and to correct vertical distortion by thinning and inserting scan lines to correct vertical distortion when correcting trapezoidal distortion that occurs in the image projected on the screen. In a projection image correction circuit for a liquid crystal projector, a storage unit that stores in advance data of the number of scanning lines in which one scanning line is thinned corresponding to the tilt angle; and a storage unit that is reset by a vertical synchronization signal and stored in the storage unit. Means for loading the loaded data, counting the clock of the horizontal synchronizing signal, and repeating counting up to the loaded value; It projected image correction circuit for a liquid crystal projector, characterized in that stage and a control means for controlling to stop writing of the data of one scan line to the frame memory when counting up. 3. A frame memory for storing image data of each scanning line constituting one screen in synchronization with each clock of a horizontal synchronizing signal in a period of one vertical synchronizing signal, and an image data stored in the frame memory. LCD panel to display,
A lens for projecting an image displayed on the liquid crystal display panel onto a screen, and sequentially compressing image data of each scanning line when the optical axis of the lens has a vertical tilt angle with respect to the screen. To correct horizontal distortion, and to correct vertical distortion by thinning and inserting scan lines to correct vertical distortion when correcting trapezoidal distortion that occurs in the image projected on the screen. In the projection image correction circuit of the liquid crystal projector for this purpose, thinning-out scanning line number storage means for storing in advance the data of the scanning line numbers to be thinned out corresponding to the tilt angle, and to be inserted redundantly corresponding to the tilt angle. Insertion scanning line number storage means that stores the scanning line number data in advance; counting means that is reset by the vertical synchronization signal and counts the clock of the horizontal synchronization signal; A first coincidence detection circuit for comparing the count value of the counting means with the storage data of the thinned-out scanning line number storage means; and a first coincidence detection circuit for comparing the count value of the counting means with the storage data of the insertion scanning line number storage means. 2 coincidence detection circuits, and when the first coincidence detection circuit detects a coincidence, stop writing data of one scanning line to the frame memory,
The projection image correction of the liquid crystal projector, further comprising: a control unit that controls so that the data of one scanning line is overwritten in the frame memory when the second match detection circuit detects a match. circuit.