JPH06189096A - Facsimile equipment - Google Patents

Abstract

PURPOSE:To provide the facsimile equipment which can transmit image data within optimum transmission time and can surely read an original on the other party by automatically selecting linear density optimum for the original when transmitting the original. CONSTITUTION:The original is partitioned in prescribed areas to form a window, the black/white change points of line data inside the window are counted by a change point counter 11, and the change point count value is compared with a prescribed set change point value by a digital comparator 13. Based on the compared result, the state of characters on the original is judged and when it is judged that there are only simple characters, the image data are transmitted on a normal mode. When it is judged there are fine and complicated characters, the image data are transmitted on a fine mode. As a result, the image data can be transmitted within optimum transmission time and the original can be surely read on the reception side.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a facsimile apparatus capable of automatically selecting a linear density in the sub scanning direction.

[0002]

2. Description of the Related Art In this type of facsimile apparatus, an image quality mode (scanning line density mode) is selected in advance by the user before reading a document. That is, when the characters and images on the document are simple, the user selects the standard mode (normal mode). If the characters and images on the original are fine and complicated, the high image quality mode (fine mode) is used. If the characters and images are finer and complex, the super high image quality mode (super fine mode) is used by the user. Choose.

When the user selects the normal mode, the reading linear density in the sub-scanning direction is set to 3.85 lines / mm, and the original is read at that linear density. When the user selects the fine mode, the read line density in the sub-scanning direction is set to 7.7 lines / mm, which is double the read mode. Further, when the super fine mode is selected, the read line density in the sub-scanning direction is set to 15.4 lines / mm which is twice the read mode.

As described above, the character state on the original is determined each time before the image information is transmitted by the user, and the image quality mode corresponding to the character state is switched and selected.

[0005]

However, in the above-mentioned facsimile apparatus, since the user subjectively and sensibly determines the state of the character or image on the original and sets the character reading mode, it is appropriate. Often the mode is not selected. Therefore, for example, when the user selects the normal mode and transmits image data, the receiving side may not be able to read the image data. That is, even though the characters on the original document to be transmitted are fine and complicated, the user determines that the characters are simple characters, and thus the image data of the read original document is thinned and transmitted. The following problems occur.

On the contrary, although the characters can be sufficiently read in the normal mode, when the original is read in the fine mode or the super fine mode, the transmission time becomes long and there is a problem in terms of economy. is there.

The present invention has been made to solve the above problems, and its purpose is to automatically select an optimum linear density for an original at the time of transmitting the original and to transmit image data at an optimum transmission time. Another object of the present invention is to provide a facsimile device that can be read by the other party without fail.

[0008]

In order to achieve the above object, the present invention comprises a reading means for reading characters on a document,
Storage means for storing the characters read by the reading means as image data, counting means for counting the number of black / white change points in a predetermined area on the original from the image data in the storage means, and counting by the counting means Based on the value
The gist of the invention is to provide a line density setting means for setting the line density of the image data in the sub-scanning direction.

[0009]

With the above arrangement, the character on the original is read by the reading means. Then, the read characters are stored in the storage means as image data. Further, the counting means counts the number of black / white change points of characters in a predetermined area on the document. Then, the linear density of the image data is set by the scanning linear density setting means based on the count value of the counting means.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 is a schematic circuit diagram of a facsimile apparatus according to this embodiment. CCD (Charge as a reading means
The image sensor 1 including a Coupled Devices) reads a character on a document and then outputs the read signal to the analog processing circuit 2. In this embodiment, the constant reading mode is the fine mode, that is, the line density in the sub-scanning direction is always set to 7.7 lines / mm. The analog processing circuit 2 analog-processes the read signal (black / white signal) input from the image sensor 1, and then outputs the processed signal to the binarization circuit 3. The binarization circuit 3 binarizes the input signal from the analog processing circuit 2 and outputs it to the image memory 4 as image data. That is, the binarization circuit 3 converts the analog signal input from the analog processing circuit 2 into a digital signal.

The binarization circuit 3 also outputs the same image data to the buffer memory 5 as a storage means in parallel line by line (hereinafter, the image data of each line is referred to as line data). The buffer memory 5 is a memory capable of storing line data of a predetermined line (four lines in this embodiment).

The clock generation circuit 6 generates a clock pulse and outputs the clock pulse to the X-adic counter 7 and the parallel / serial conversion circuit 8. The X-adic counter 7 counts based on a clock pulse, and its count-up capacity is a predetermined count (7 counts in this embodiment). Therefore, the X-adic counter 7 is reset when 7 clock pulses are counted. When the X-adic counter 7 is reset, it outputs a carry signal to the parallel / serial conversion circuit 8 and the Y-adic counter 9 and also outputs a count value to the address generating circuit 10.

The Y-adic counter 9 has a count-up capacity for a predetermined count (4 counts in this embodiment).
Thus, each time a carry signal is input from the X-adic counter 7, the count value is incremented by one and the count value is output to the address generation circuit 10. And
The Y-adic counter 9 is reset when the carry signal output from the X-adic counter 7 is counted four times. When the Y-adic counter 9 is reset, it outputs a window end signal, which will be described later, to the change point counter 11 as the counting means and the AND circuit 12. That is, the X-adic counter 7 is a counter for counting the number of pixels in the main scanning direction, and the Y-adic counter 9 is a counter for counting the number of lines in the sub-scanning direction.

The address generation circuit 10 outputs an address signal to the buffer memory 5 based on the count value from the X-adic counter 7 and the count value from the Y-adic counter 9. The buffer memory 5 is the address generation circuit 1
Based on the address signal from 0, the line data is stored in a predetermined address, and the line data is output to the parallel-serial conversion circuit 8.

The address signal output from the address generating circuit 10 to the buffer memory 5 is a signal corresponding to 7-bit line data in each line from the first line to the fourth line. In this embodiment, FIG.
As shown in (a), the 7-bit line data area in each of the first to fourth lines is called a "window".

The first window in FIG. 2 (a) is the line data "L.H.H.L.L.L.H" for the first line and the line data "H.H.L. L ・ L ・ L ・ L
], And the line data of the third line "H ・ H ・ H ・ L ・ L
・ H ・ H 」and the line data of the 4th line「 L ・ L ・ L
・ H ・ L ・ H ・ H 」.

The buffer memory 5 sequentially outputs the 7-bit line data corresponding to the address signal output from the address generation circuit 10 to the parallel-serial conversion circuit 8 for the first to fourth lines. The parallel-to-serial conversion circuit 8 includes a clock pulse from the clock transmission circuit 6 and an X-adic counter 7
The buffer memory 5 based on the carry signal from
To 7-bit line data for each of the first to fourth lines are input in parallel. That is, line data for one window is input in parallel for each line. Therefore, the aforementioned window end signal output from the Y-adic counter 9 is output every time the line-to-line conversion circuit 8 outputs all the line data of the fourth line in each window. It is a signal.

The parallel-to-serial conversion circuit 8 serially converts one window of line data input in parallel from the buffer memory 5 (see FIG. 2B), and then the change points in the order of input of the line data. Output to the counter 11. Therefore, when the line data of the first window is output to the change point counter 11, as shown in FIG.
L, H, H, L, L, L, H, H, H, L, L, L, L
・ L ・ H ・ H ・ H ・ L ・ L ・ H ・ H ・ L ・ L ・ L ・ H ・ L
・ H ・ H 」

The change point counter 11 receives the window end signal from the Y-adic counter 9 every time when the window end signal is input, that is, as shown in FIGS. When the line data of is completed, the number of change points of the line data for one window is counted. In other words, this change point is H (black) → L (white)
Alternatively, it is a point where L (white) → H (black) is switched, and the change point counter 11 counts the number of change points. Therefore, as shown in FIGS. 2B and 2F, the change point count value IN _B of the first window is “11”.
Becomes The change point counter 11 outputs the count value to the digital comparator 13 after completing counting the number of change points for one window.

The digital comparator 13 has a change point count value IN _B output from the change point counter 11, and
Setting change point value IN _A output from the judgment value register 14
Compare with. When the set change point value IN _A is less than the change point count value IN _B (IN _B > IN _A ), the signal output from the output terminal of the digital comparator 13 is set to “high (H)”. On the other hand, if the change point count value IN _B is less than or equal to the set change point value IN _A (IN _B
≦ IN _A ), the signal output from the output terminal is “low (L)”. The setting change point value IN _A stored in the judgment value register 14 is a numerical value obtained in advance by experiments or the like.

That is, when the change point count value IN _B exceeds the set change point value IN _A (when the output signal of the digital comparator 13 is "H"), the number of change points is large, so that the value within 1 window It is determined that the image character is fine and complicated.

If the change point count value IN _B is less than or equal to the set change point value IN _A (when the output signal of the digital comparator 13 is "L"), the number of change points is small, so the image within one window is displayed. Characters are determined to be simple.

Here, for example, the set change point value IN _A
2 is set to “6”, the change point count value IN _B is “11”, so that the signal output from the digital comparator 13 is “11” as shown in FIG. H "signal. Therefore, it is determined that the image character in the first window is fine and complicated.

The determination result signal output from the digital comparator 13 is the flip-flop circuit 1
5, the flip-flop circuit 15 stores and holds the “H” signal. Here, the flip-flop circuit 15
Once the "H" signal is stored, the "H" signal is inverted by the NOT circuit 16, and the signal becomes "L" and is applied to the AND circuit 12. Therefore, the window end signal as the clock signal (F / F clock) of the flip-flop is not applied to the flip-flop circuit 15 through the AND circuit 12, and even if the output of the digital comparator 13 becomes "L", this " The L ”is not stored and held in the flip-flop circuit 15.

When the reading of the document is completed,
A page end signal is output from a controller (not shown) to the flip-flop circuit 15 and the linear density conversion circuit 17 as the linear density setting means. Flip-flop circuit 15
Is reset when the page end signal is input, and the determination result signal stored and held is reset to "L". When the page end signal is input, the line density conversion circuit 17 converts the line density of the line data stored in the image memory 4 to normal based on the final signal from the flip-flop circuit 15. Select whether to encode or to encode as it is (fine).

That is, in the linear density conversion circuit 17, the determination result signal input from the flip-flop circuit 15 is "H".
In the case of a signal, the linear density of the image data in the image memory 4 is held in the current fine mode (7.7 lines / mm) and the image data is encoded by the encoding circuit 18. . On the other hand, when the determination result signal input from the flip-flop circuit 15 is the “L” signal, the linear density conversion circuit 17 changes the linear density of the image data in the image memory 4 from the fine mode to the normal mode (3.85). Line / mm)
After being converted into, the image data is encoded by the encoding circuit 18. Then, the image data encoded by the encoding circuit 18 is output to the communication line via the modem 19.

Next, the operation of the facsimile apparatus configured as described above will be described. First, the image sensor 1 reads a character on a document in a fine mode. The read character is subjected to analog processing, converted into a digital signal, and stored in the image memory 4 and the buffer memory 5 in parallel. When the line data for four lines is stored in the buffer memory 5, the line data in the buffer memory 5 designated by the address generation circuit 10 is output to the parallel-to-serial conversion circuit 8 line by line. The line data output to the parallel-serial conversion circuit 8 is serial-converted by the parallel-serial conversion circuit 8, and the change point counter 1
At 1, the number of change points of H (black) and L (white) is counted.

When the Y-adic counter 9 outputs a window end signal to the parallel-serial conversion circuit 8, that is, when the change point counter 11 finishes counting the number of change points for one window, the change point counter 11 From the digital comparator 13 to the count value (change point count value I
N _B ) is output. At the same time, the change point counter 1
At 1, the counting of the change points of the next window is started.

In the digital comparator 13,
From the judgment value register 14 that stores the set number of change points
Setting change point value IN_AFrom the change point counter 11
Output change point count value IN_BAnd are compared. This
Here, change point count value IN _BIs the setting change point value IN_ASince
When it is determined that it is below, the digital comparator 1
3 outputs an “L” signal to the flip-flop circuit 15.
Be done.

If the "H" signal is not output from the digital comparator 13 thereafter (while the page end signal is input) while the "L" signal is stored and held in the flip-flop circuit 15, the image memory The image data in 4 is subjected to linear density conversion. That is, the image data stored in the image memory 4 at a linear density of 7.7 lines / mm is converted into a linear density of 3.85 lines / mm, and then encoded by the encoding circuit 18. , Is transmitted from the communication line to the other party via the modem 19. The linear density conversion method includes a simple thinning method, a method of taking a corresponding OR between two lines before and after, and further, JP-A-2-104.
There is a method described in Japanese Patent No. 171.

On the other hand, when the "H" signal is output from the digital comparator 13, the image data in the image memory 4 is not subjected to the linear density conversion and is 7.7 lines / mm.
In the state where the linear density is maintained, the data is encoded by the encoding circuit 18 and transmitted from the communication line to the other party via the modem 19.

As described above, according to the facsimile apparatus of this embodiment, the line density in the sub-scanning direction is always 7.7 lines /
Image data is temporarily stored in the image memory 4 in the fine mode of mm.
Memorized in. In parallel with this, the image data is divided for each window, and the number of change points of black (H) and white (L) is counted for each window.

Then, at the time when the counting of the change points of all the windows for one page is completed (the count of the change points of one page is completed), even one change point count value IN _B greater than the set change point value IN _A is set. If there is, there is a complicated character in the read document, so the image data in the image memory 4 is left as it is, that is, the image data is transmitted to the other party in the fine mode.

Further, when the count value of the number of change points of all windows is smaller than the set change point value IN _A at the time when the count of the number of change points of all windows is completed, the read original document has fine and complicated characters. Because there is no
The image data in the image memory 4 is converted into a linear density of 3.85 lines / mm and transmitted to the other party.

In other words, in the present embodiment, the user does not sensuously judge the character state on the original, but the apparatus divides the original into predetermined areas to form a window, and based on the number of change points in the window. Determine the character status on the original. Then, the optimum linear density of the image data to be transmitted is selected according to the determination result. As a result, in the present embodiment, unlike the prior art, the image data can be transmitted at the optimum transmission time, which is excellent in terms of economics and the document can be reliably read on the receiving side.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIG. In the present embodiment, the same members as those in the first embodiment will be described with the same member numbers, and the detailed configuration thereof will be omitted for convenience of description.

Even in this embodiment, the reading mode is always set to the fine mode of 7.7 lines / mm. Image data from the analog processing circuit 2 is binarized circuit 3
After being digitized in, the image data is output to the image memory 4 as in the first embodiment. At the same time, each line data is transferred from the first shift register 21a to the Yth shift register.
It is sequentially output to the shift register 21y.

Each of the shift registers 21a to 21y is set to 1
Image data for a line, that is, line data for one main scanning line is stored. That is, the line data of 7.7 lines / mm width output from the binarization circuit 3 is the first
Shift register 21a to Y-th shift register 21y
Will be stored in sequence. Then, when the line data is stored in the last Y-th shift register 21y, the clock signal designating the first shift register 21a is output from the clock control circuit 22 to the first shift register 21a.

When the clock signal is input from the clock control circuit 22, the first shift register 21a outputs the stored line data to the data selector 23. The data selector 23 outputs the line data input from the first shift register 21a to the change point counter 11 based on the count value output from the Y-adic counter 9.
The change point counter 11 counts the number of black / white change points in the input line data.

When the X-adic counter 7 completes counting, the clock control circuit 22 increments the Y-adic counter 9 by the carry signal of the X-adic counter 7 and outputs the output of the second shift register 21b to the data selector 23. A clock signal for selecting and shifting the second shift register 21b is output to the second shift register 21b. Similarly to the first shift register 21a, when the second shift register 21b receives a clock signal from the clock control circuit 22, the second shift register 21b outputs the stored line data to the data selector 23. Then, the line data is output from the data selector 23 to the change point counter 11, and the number of black / white change points is counted.

After that, the clock control circuit 22 repeatedly outputs the clock signal designating each shift register up to the Yth shift register 21y, as in the case of the first and second shift registers 21a and 21b. The clock control circuit 22 is reset when the output of the clock signal to the Y-th shift register 21y is completed, and the clock control circuit 22 is reset to the first
The above operation is repeated from the shift register 21a.

Then, the line data of the Y-th shift register 21y is input from the data selector 23 to the change point counter 11, and the number of change points of the line data is counted. The change point counter 11 counts the number of change points of the line data of the Y-th shift register 21y, and then changes the number of change points from the first shift register 21a to the Y-th shift register 21y.
A change point count value (change point count value IN _B ) obtained by adding up the respective change points up to y is output to the digital comparator 13.

In the digital comparator 13, the set change point value IN _A stored in the judgment value register 14 and the change point count value IN _B output from the change point counter 11 are compared, and the comparison result is obtained. Is output to the flip-flop circuit 15. Since the operation thereafter is the same as that of the first embodiment, the description thereof is omitted.

In this embodiment as well, as in the first embodiment, the user does not judge the character state on the original, but the character state is judged by the apparatus itself, and the optimum linear density at the time of transmitting the original is selected. It Therefore, the same effect as that of the first embodiment can be obtained.

The present invention is not limited to the above-described embodiments, but may be configured as follows, for example, within the scope of the invention. (1) In the above-described first embodiment, one window is an area composed of 7 pixels in the main scanning direction and 4 lines in the sub-scanning direction, but this 1 window area may be appropriately modified and embodied.

(2) In the first and second embodiments, the image data is displayed in the normal mode (3.85 lines / mm) or
The device selects whether to transmit in the fine mode (7.7 lines / mm) based on the count value of the change points. For example, by setting the judgment value register 14 in two stages, the super fine mode (15.4 lines / m
m) may also be selected. That is, the line density in the sub-scanning direction when the image sensor 1 reads a document may be 15.4 lines / mm.

[0048]

As described in detail above, according to the present invention,
When a document is transmitted, the optimum linear density for the document is automatically selected, image data can be transmitted in an optimum transmission time, and the document can be reliably read by the other party.

[Brief description of drawings]

FIG. 1 is a schematic circuit diagram of a facsimile apparatus according to a first embodiment of the present invention.

FIG. 2A is a table showing contents of image data of an original read by an image sensor, and FIG. 2B is a diagram showing a state in which image data of a first window is serially converted.
(C) is a timing chart of a clock pulse generated from the clock transmission circuit, (d) is a diagram showing a line interval for one window, and (e) is a diagram showing a region of the first window. (F) is a figure which shows a change point count value.

FIG. 3 is a schematic circuit diagram of a facsimile apparatus according to a second embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Image sensor as reading means, 5 ... Buffer memory as storage means, 11 ... Change point counter as counting means, 17 ... Linear density conversion circuit as linear density setting means

Claims (1)

[Claims] 1. A reading means for reading characters on a document, a storage means for storing the characters read by the reading means as image data, and a black / white image in a predetermined area on the document from the image data in the storage means. And a linear density setting means for setting the linear density of the image data in the sub-scanning direction based on the count value of the counting means.