JPH06188561A - Via forming method for thick film printed board - Google Patents

Via forming method for thick film printed board

Info

Publication number
JPH06188561A
JPH06188561A JP34086792A JP34086792A JPH06188561A JP H06188561 A JPH06188561 A JP H06188561A JP 34086792 A JP34086792 A JP 34086792A JP 34086792 A JP34086792 A JP 34086792A JP H06188561 A JPH06188561 A JP H06188561A
Authority
JP
Japan
Prior art keywords
powder
thick film
copper
conductor powder
filling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP34086792A
Other languages
Japanese (ja)
Other versions
JP2629543B2 (en
Inventor
Masato Naruse
正人 成瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP34086792A priority Critical patent/JP2629543B2/en
Publication of JPH06188561A publication Critical patent/JPH06188561A/en
Application granted granted Critical
Publication of JP2629543B2 publication Critical patent/JP2629543B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To improve the fillability of the thick film copper via hole to be formed in an ultra multilayer glass-ceramic wiring board which is widely used for large type electric machines, and to form a highly minute conductive via hole under an intrinsic baking condition by a method wherein the characteristics of conductor powder are properly controlled. CONSTITUTION:In the manufacture of a low-temperature-baked glass-ceramic wiring board having copper as conductive material, conductive powder 2, consisting of copper powder having area/weight ratio of 0.3 to 0.6m<2>/g, 50% value of particle-size distribution of 5.0 to 7.0mum in particle diameter, liquidity index of 70 to 79 and coating amount of oxidation preventing agent of 12 to 17wt.%, is put in the via hole 1a provided on a green sheet 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、大型電子機器の構成に
広く使用される超多層ガラスセラミック配線基板の厚膜
銅ビアの形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a thick film copper via of an ultra-multilayer glass ceramic wiring board which is widely used in the construction of large electronic equipment.

【0002】最近、大型汎用コンピューター等の大型電
子機器に使用されるプリント配線基板は、ガラスセラミ
ック等の無機材料の特徴を生かしつつ回路規模の増大と
高速化の要求に伴い、そのガラスセラミック基板に形成
される配線パターンと層間接続用のビアは微細化と高密
度化が行われるとともに多層化が要求されている。
Recently, a printed wiring board used for a large-scale electronic device such as a large-scale general-purpose computer has been required for an increase in circuit scale and a high speed while utilizing the characteristics of inorganic materials such as glass ceramic. The formed wiring patterns and interlayer connection vias are required to be miniaturized and densified and to be multilayered.

【0003】そのため、プリント配線基板はダウンサイ
ジングにより二次元方向への拡張は限界があるので厚さ
方向への層数アップが避けられず、この層数アップによ
る三次元方向の接続数の増加に伴って、断線の無いより
高度な接続の信頼性が要求される。これを達成するため
に層間接続用の厚膜銅ビアは熱ストレスのみならず各種
応力等に対し充分な安定性を有する必要があるから、導
体粉末の充填性を向上させて接続信頼性の高いビアを形
成することができる新しい厚膜プリント板のビア形成方
法が要求されている。
Therefore, since the printed wiring board is limited in expansion in the two-dimensional direction due to downsizing, it is inevitable to increase the number of layers in the thickness direction, and the increase in the number of layers increases the number of connections in the three-dimensional direction. Accordingly, higher reliability of connection without breakage is required. In order to achieve this, the thick film copper vias for interlayer connection must have sufficient stability not only for thermal stress but also for various stresses, etc., so the filling property of the conductor powder is improved and the connection reliability is high. There is a need for a new method of forming vias for thick film printed circuit boards that can form vias.

【0004】[0004]

【従来の技術】従来広く使用されている厚膜プリント板
のビア形成方法は、図1に示すように超多層ガラスセラ
ミック配線基板の構成要素であるグリーンシート1に、
銅よりなる導体粉末2のペースト状または粉末自体を一
端縁に供給して、当該導体粉末2をスキージ3により上
記グリーンシート1の他端側へ移動することにより、当
該グリーンシート1に穿設された約10万個のビアホー
ル1aに上記導体粉末2が充填され、このグリーンシート
1を60枚位置決め積層して、図6に示すような加熱の
タイムチャートAで焼成することにより厚膜プリント板
のビアが形成されている。
2. Description of the Related Art A method of forming a via for a thick film printed board, which has been widely used in the past, is as follows. As shown in FIG.
By supplying the paste-like or powder itself of the conductor powder 2 made of copper to one end edge and moving the conductor powder 2 to the other end side of the green sheet 1 by the squeegee 3, the green sheet 1 is punched. About 100,000 via holes 1a were filled with the above-mentioned conductor powder 2, and 60 green sheets 1 were positioned and laminated and baked by the heating time chart A as shown in FIG. Vias are formed.

【0005】このグリーンシート1のビアホール1aに充
填される上記導体粉末2は、表1に示すような粉末特性
を有している。
The conductor powder 2 filled in the via holes 1a of the green sheet 1 has the powder characteristics shown in Table 1.

【0006】[0006]

【表1】 [Table 1]

【0007】尚、の流動性指数,の噴流性指数はホ
ソカワミクロン社製の「パウダーテスター」を使用して
測定した流動性噴流性の7項目から総合的に判定される
数値である。
The fluidity index and the fluidity index of the fluidity index are numerical values comprehensively judged from the seven items of fluidity and fluidity measured using a "powder tester" manufactured by Hosokawa Micron.

【0008】[0008]

【発明が解決しようとする課題】以上説明した従来の厚
膜プリント板のビア形成方法で問題となるのは、グリー
ンシート1に穿設されたビアホール1aの径は約100μ
mであり、グリーンシート1の厚み約300μmに対し
て高いアスペクト(グリーンシートの厚み/ビアホール
径)を有するから、ビアホール1aへの充填密度を上げる
ためには導体粉末の微細化は避けられず、これによって
導体粉末の凝集および流動性の劣化が充填性を阻害する
ことにより充填密度を低下させて表2の充填性の項に示
す如き断線欠陥を引き起こしていた。
A problem with the conventional method of forming vias for thick film printed boards described above is that the diameter of the via hole 1a formed in the green sheet 1 is about 100 μm.
m, which has a high aspect ratio (green sheet thickness / via hole diameter) with respect to the thickness of the green sheet 1 of about 300 μm, in order to increase the filling density in the via holes 1a, it is inevitable to make the conductor powder finer. As a result, the agglomeration of the conductor powder and the deterioration of the fluidity impede the filling property, thereby lowering the filling density and causing the disconnection defect as shown in the filling property section of Table 2.

【0009】[0009]

【表2】 [Table 2]

【0010】ところが、1つのビアホール1aを対象に良
充填性,高充填密度を達成する導体粉末の特性を設定し
ても、シート当り10万個のビアホール1aに対しての欠
陥と充填密度にバラツキ無く充填することは容易ではな
く、このバラツキがもたらす焼結性の不安定さは避けら
れない。
However, even if the characteristics of the conductor powder that achieves a good filling property and a high filling density are set for one via hole 1a, there are variations in the defects and the filling density for 100,000 via holes 1a per sheet. It is not easy to fill without sinter, and the instability of sinterability caused by this variation is unavoidable.

【0011】また、充填性を重視した導体粉末の選定は
必ずしも良好な焼結性を得られるとは限らず、従来の導
体では、図6に示すように積層グリーンシートの加熱の
タイムチャートAに対して、ガラスセラミックの収縮挙
動はBの如きカーブとなるが、このガラスセラミックの
収縮率が急激に大きくなる時間帯に、ビアホールに充填
した導体粉末の収縮挙動はカーブCで示す如く収縮率の
変動が大きくなって、形成されるビアに小さな粒界破断
(クラック)が発生する。
Further, the selection of the conductor powder with an emphasis on the filling property does not always give good sinterability, and in the conventional conductor, the time chart A for heating the laminated green sheet is shown in FIG. On the other hand, the shrinkage behavior of the glass-ceramic has a curve like B, but the shrinkage behavior of the conductor powder filled in the via hole is as shown by the curve C in the time zone when the shrinkage of the glass-ceramic rapidly increases. The fluctuations become large and small vias (cracks) are generated in the formed vias.

【0012】そのため、上記表2の焼結性の項で示すよ
うに初期断線欠陥:2件/600万接続が、形成された
厚膜プリント板の電子部品実装等による熱ストレス印加
後には前記クラックが成長することにより断線欠陥が1
20件/600万接続と著しく増加している。
Therefore, as shown in the sinterability section in Table 2 above, initial disconnection defects: 2 cases / 6 million connections are caused by the above-mentioned cracks after the application of thermal stress due to the mounting of electronic components on the formed thick film printed board. The number of disconnection defects is 1 due to the growth of
The number has increased significantly to 20 cases / 6 million connections.

【0013】従って、良充填性を達成するためだけを目
的に設定した導体粉末の特性では、焼成工程において必
ずしも良好な焼結・収縮挙動を達成するとは限らず、双
方のバランスを取った導体粉末特性の設計が困難になる
という問題が生じている。
Therefore, the characteristics of the conductor powder set only for achieving good filling do not always achieve good sintering / shrinking behavior in the firing step, and the conductor powder is well balanced. The problem is that it becomes difficult to design the characteristics.

【0014】本発明は上記のような問題点に鑑み、導体
粉末の特性を制御することによりビアホールへの充填性
を良好なものにし、更には固有な焼成条件のもとにおい
て、より緻密な導体ビアを形成することができ、断線の
少ない新しい厚膜プリント板のビア形成方法の提供を目
的とする。
In view of the above-mentioned problems, the present invention makes the filling property of the via hole good by controlling the characteristics of the conductor powder, and further, under a specific firing condition, a more dense conductor can be obtained. It is an object of the present invention to provide a new method for forming a via for a thick film printed circuit board that can form a via and has few disconnections.

【0015】[0015]

【課題を解決するための手段】本発明は、銅を導体材料
とした低温焼成ガラスセラミック配線基板の製造におい
て次表に示す如く、
According to the present invention, as shown in the following table, in the manufacture of a low temperature fired glass ceramic wiring board using copper as a conductor material,

【0016】[0016]

【表3】 [Table 3]

【0017】銅よりなる球状粉末の比表面積が0.3〜
0.6m2/gであって、粒度分布の50%値が5.0〜
7.0μmの粒子径, 銅粉末の流動性指数が70〜7
9, 酸化防止剤のコーティング量が0.12〜0.17
wt%の上記導体粉末をグリーンシートに穿設されたビ
アホールに充填する。
The specific surface area of the spherical powder made of copper is 0.3 to
0.6 m 2 / g, 50% value of particle size distribution is 5.0-
7.0 μm particle size, copper powder fluidity index 70 ~ 7
9. The coating amount of antioxidant is 0.12-0.17
Filling the via hole formed in the green sheet with wt% of the conductor powder.

【0018】[0018]

【作用】本発明では、ビアホールに充填する導体粉末特
性が図2および図3に示すように比表面積の値が0.3
〜0.6m2/gである場合,および粒度分布の50%値
が5.0〜7.0μmである場合には充填欠陥数が0と
なり、また図4および図5に示すように流動性指数の値
が70〜79の時においてはビアホールへの充填率が6
0%以上,酸化防止剤のコーティング量が0.12〜
0.17wt%の時にはビアのポア発生件数が最低値に
なるという実験値が得られているので、これ等の値を満
足する導体粉末をビアホールに充填して低温焼成ガラス
セラミック配線基板を形成することにより、次表に示す
ような良い結果が得られる。
In the present invention, the characteristics of the conductor powder with which the via holes are filled are such that the specific surface area is 0.3 as shown in FIGS.
The number of filling defects is 0 when the particle size distribution is up to 0.6 m 2 / g and the 50% value of the particle size distribution is between 5.0 and 7.0 μm, and the fluidity as shown in FIGS. When the index value is 70 to 79, the filling rate of the via hole is 6
0% or more, antioxidant coating amount is 0.12-
Since experimental values have been obtained that the number of occurrence of via pores is the lowest at 0.17 wt%, the conductor powder satisfying these values is filled into the via holes to form a low temperature fired glass ceramic wiring board. As a result, good results as shown in the following table are obtained.

【0019】[0019]

【表4】 [Table 4]

【0020】表4に示す如く、充填性による断線欠陥が
1.2件/600万接続,焼結性による断線欠陥が0.
9件/600万接続,熱ストレス印加による増加が0件
にと著しく減少していることから、導体粉末の特性を制
御することによりビアホールへの充填性を良好なものに
し,且つ固有な焼成条件のもとにおいてより緻密な導体
ビアを形成することが可能となる。
As shown in Table 4, there are 1.2 disconnection defects due to the filling property / 6 million connections and 0 disconnection defects due to the sinterability.
9 cases / 6 million connections, the increase due to the application of heat stress has decreased significantly to 0 cases. Therefore, by controlling the characteristics of the conductor powder, the filling properties into the via holes are improved and the unique firing conditions are set. Under this condition, it is possible to form a finer conductor via.

【0021】[0021]

【実施例】以下図1〜図6について本発明の実施例を詳
細に説明する。図2は本発明の一実施例による導体粉末
の比表面積と充填欠点数の関係を示す図、図3は本実施
例による導体粉末の粒度分布と充填欠点数の関係を示す
図、図4は本実施例による導体粉末の流動指数と充填率
の関係を示す図、図5は本実施例による導体粉末の酸化
防止剤コーティング量と10μm以上のポア発生数を示
す図、図6は従来と本実施例のガラスセラミックと導体
粉末との収縮挙動の差を示す図である。
Embodiments of the present invention will be described in detail below with reference to FIGS. 2 is a diagram showing the relationship between the specific surface area of the conductor powder and the number of filling defects according to one embodiment of the present invention, FIG. 3 is a diagram showing the relationship between the particle size distribution of the conductor powder according to the present embodiment and the number of filling defects, and FIG. FIG. 5 is a diagram showing the relationship between the flow index and the filling rate of the conductor powder according to the present embodiment, FIG. 5 is a diagram showing the antioxidant coating amount of the conductor powder according to the present embodiment and the number of pores of 10 μm or more, and FIG. It is a figure which shows the difference of the shrinkage behavior of the glass ceramic of an Example, and a conductor powder.

【0022】本発明の一実施例により使用した導体粉末
の特性は、
The characteristics of the conductor powder used according to one embodiment of the present invention are as follows:

【0023】[0023]

【表5】 [Table 5]

【0024】の通りである。良充填性を確保するために
は、表3による〜の全ての条件を満足する必要があ
り、特にの流動性指数がこの範囲にない場合には10
万ホールに対して数ホールの充填量不足欠陥が生じる。
It is as follows. In order to secure a good filling property, it is necessary to satisfy all the conditions of to in Table 3, and when the liquidity index is not within this range, it is 10
Insufficient filling of several holes occurs for every 10,000 holes.

【0025】良焼結性は、充填量不足(充填密度)の影
響を受けるため、間接的には表1による〜の全ての
条件を満足する必要があるが、直接的な因子と考えられ
るのは、比表面積,粒度分布,酸化防止剤,粒
子形状である。特に、の比表面積は、図6に示すガラ
スセラミックと導体粉末との焼結挙動の関係に敏感に影
響を及ぼす。
The good sinterability is influenced by the insufficient filling amount (filling density), and therefore it is necessary to indirectly satisfy all the conditions 1 to 3 shown in Table 1, but this is considered to be a direct factor. Are specific surface area, particle size distribution, antioxidant, and particle shape. In particular, the specific surface area of (5) sensitively affects the relationship of the sintering behavior between the glass ceramic and the conductor powder shown in FIG.

【0026】上記部材を使用した厚膜プリント板のビア
形成方法は、図1で示す従来例と同様に、グリーンシー
ト1の一端縁に銅よりなる導体粉末2のペースト状また
は粉末自体を供給して、スキージにより当該グリーンシ
ート1に穿設された約10万個のビアホール1aに上記導
体粉末2を充填して、この60枚のグリーンシート1を
位置決め積層して、図6に示す加熱のタイムチャートA
で焼成することにより厚膜プリント板のビアを形成して
いる。
In the method of forming a via of a thick film printed board using the above member, a paste of conductor powder 2 made of copper or the powder itself is supplied to one edge of the green sheet 1 as in the conventional example shown in FIG. Then, about 100,000 via holes 1a formed in the green sheet 1 with a squeegee are filled with the conductor powder 2 and the 60 green sheets 1 are positioned and laminated, and the heating time shown in FIG. Chart A
The vias of the thick film printed board are formed by firing at.

【0027】その結果、図6に示すようにガラスセラミ
ックの収縮挙動Bに対して本発明の導体粉末の収縮挙動
カーブはDの如く緩やかに変動するから、形成されるビ
アの小さな粒界破断が少なくなる。これにより、上記表
5の最終品質の項で示すように初期における断線欠陥は
600万接続の内充填量不足(充填性)によるものが
1.0件,焼結時における粒界破断(クラック)による
ものが0.6件で、形成された厚膜プリント板の電子部
品実装等による熱ストレス印加後の粒界破断の増加が0
件となるから、導体粉末の特性を制御することによりビ
アホールへの充填性を良好なものにしてより緻密な導体
ビアを形成することができる。
As a result, as shown in FIG. 6, the contraction behavior curve of the conductor powder of the present invention changes gently as shown by D with respect to the contraction behavior B of the glass ceramic, so that a small grain boundary rupture of the via formed. Less. As a result, as shown in the final quality section of Table 5 above, 1.0 cases of disconnection defects in the initial stage were due to insufficient filling amount (fillability) of 6 million connections, and grain boundary fracture (cracks) during sintering. The result was 0.6, and the increase in grain boundary rupture after applying thermal stress due to mounting electronic components on the formed thick film printed board was 0.
Therefore, by controlling the characteristics of the conductor powder, the filling property in the via hole can be improved and a more dense conductor via can be formed.

【0028】[0028]

【発明の効果】以上の説明から明らかなように本発明に
よれば極めて簡単な方法で、グリーンシートのビアホー
ルに対して導体粉末の充填性を良好なものにして断線欠
陥を防止することができる等の利点があり、著しい経済
的及び、信頼性向上の効果が期待できる厚膜プリント板
のビア形成方法を提供することができる。
As is apparent from the above description, according to the present invention, it is possible to prevent the disconnection defect by a very simple method by making the filling property of the conductor powder into the via hole of the green sheet good. It is possible to provide a via forming method for a thick film printed circuit board, which has advantages such as the above, and which can be expected to have a remarkable economic effect and reliability improvement effect.

【図面の簡単な説明】[Brief description of drawings]

【図1】 厚膜プリント板のビア形成方法を示す図であ
る。
FIG. 1 is a diagram showing a method of forming a via in a thick film printed board.

【図2】 本実施例による導体粉末の比表面積と充填欠
点数の関係を示す図である。
FIG. 2 is a diagram showing the relationship between the specific surface area of conductor powder and the number of filling defects according to the present embodiment.

【図3】 本実施例による導体粉末の粒度分布と充填欠
点数の関係を示す図である。
FIG. 3 is a diagram showing the relationship between the particle size distribution of conductor powder and the number of filling defects according to the present embodiment.

【図4】 本実施例による導体粉末の流動指数と充填率
の関係を示す図である。
FIG. 4 is a diagram showing the relationship between the flow index and the filling rate of the conductor powder according to this example.

【図5】 本実施例による導体粉末の酸化防止剤コーテ
ィング量と10μm以上のポア発生数を示す図である。
FIG. 5 is a diagram showing the coating amount of an antioxidant on a conductor powder and the number of pores of 10 μm or more according to the present embodiment.

【図6】 従来と本実施例のガラスセラミックと導体粉
末との収縮挙動の差を示す図である。
FIG. 6 is a diagram showing a difference in shrinkage behavior between the glass ceramic and the conductor powder of the conventional example and the present example.

【符号の説明】[Explanation of symbols]

1はグリーンシート、1aはビアホール、2は導体粉末、
3はスキージ、
1 is a green sheet, 1a is a via hole, 2 is a conductor powder,
3 is a squeegee,

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 銅を導体材料とした低温焼成ガラスセ
ラミック配線基板の製造において、銅よりなる球状の比
表面積が0.3〜0.6m2/gであって、粒度分布の5
0%値が5.0〜7.0μmの粒子径を有し、粉末の流
動性指数が70〜79,酸化防止剤のコーティング量が
0.12〜0.17wt%の上記導体粉末(2) をグリー
ンシート(1) のビアホール(1a)に充填することにより充
填欠点数を制御したことを特徴とする厚膜プリント板の
ビア形成方法。
1. In the production of a low temperature fired glass ceramic wiring board using copper as a conductor material, a spherical specific surface area made of copper is 0.3 to 0.6 m 2 / g and a particle size distribution of 5 is obtained.
The above conductor powder (2) having a 0% value of 5.0 to 7.0 μm, a powder fluidity index of 70 to 79, and an antioxidant coating amount of 0.12 to 0.17 wt%. A method for forming a via for a thick film printed circuit board, characterized in that the number of filling defects is controlled by filling the via holes (1a) of the green sheet (1).
JP34086792A 1992-12-22 1992-12-22 Via forming method for thick film printed board Expired - Fee Related JP2629543B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34086792A JP2629543B2 (en) 1992-12-22 1992-12-22 Via forming method for thick film printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34086792A JP2629543B2 (en) 1992-12-22 1992-12-22 Via forming method for thick film printed board

Publications (2)

Publication Number Publication Date
JPH06188561A true JPH06188561A (en) 1994-07-08
JP2629543B2 JP2629543B2 (en) 1997-07-09

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP34086792A Expired - Fee Related JP2629543B2 (en) 1992-12-22 1992-12-22 Via forming method for thick film printed board

Country Status (1)

Country Link
JP (1) JP2629543B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020160343A1 (en) * 2019-01-31 2020-08-06 Samtec, Inc. Electrically conductive vias and methods for producing same
US11107702B2 (en) 2015-04-02 2021-08-31 Samtec, Inc. Method for creating through-connected vias and conductors on a substrate
US11646246B2 (en) 2016-11-18 2023-05-09 Samtec, Inc. Method of fabricating a glass substrate with a plurality of vias
US12009225B2 (en) 2018-03-30 2024-06-11 Samtec, Inc. Electrically conductive vias and methods for producing same
US12100647B2 (en) 2019-09-30 2024-09-24 Samtec, Inc. Electrically conductive vias and methods for producing same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11107702B2 (en) 2015-04-02 2021-08-31 Samtec, Inc. Method for creating through-connected vias and conductors on a substrate
US11646246B2 (en) 2016-11-18 2023-05-09 Samtec, Inc. Method of fabricating a glass substrate with a plurality of vias
US12009225B2 (en) 2018-03-30 2024-06-11 Samtec, Inc. Electrically conductive vias and methods for producing same
WO2020160343A1 (en) * 2019-01-31 2020-08-06 Samtec, Inc. Electrically conductive vias and methods for producing same
US12100647B2 (en) 2019-09-30 2024-09-24 Samtec, Inc. Electrically conductive vias and methods for producing same

Also Published As

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