JPH06187314A - Fault reporting system - Google Patents

Abstract

PURPOSE:To specify a faulty processor in a multiprocessor system and takes a countermeasure early against the fault. CONSTITUTION:This fault reporting system consists of a host input/output signal controller 101, a network layer corresponding processor 111, a data link layer corresponding processor 112, a physical layer corresponding processor 113, a communication channel 122, a host input/output signal controller control line 123, a fault detection/fault information reporting path switching device 130, and a host input/output line 500. Consequently, the multiprocessor system can specify the faulty processor even if a processor for input/output control becomes faulty and takes a countermeasure early.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a composite processor system composed of processors for each function, and when a failure occurs in a processor for external input / output control, a normally operating processor has an optimum failure notifying means depending on a failure part. The present invention relates to a method of notifying a fault by using.

[0002]

2. Description of the Related Art FIG. 1 shows an example of a communication control device realized by a composite processor system. In this case, OSI
An example is shown in which the communication control device side controls layers 1, 2, and 3 in the reference model, and the host side shares control of the layers above. When the host 600 transmits data, the network layer compatible processor 111 controls the host input / output signal controller 101 to control the input / output control line 5.
The communication control device 1 transmits the transmission data transmitted using 00.
Take in 00. Network layer compatible processor 11
1 performs processing relating to the network layer on the transmission data, and issues a transmission request instruction to the processor 112 corresponding to the data link layer. Upon receiving the transmission request instruction, the data link layer corresponding processor 112 performs processing relating to the data link layer and issues a data transmission instruction to the physical layer corresponding processor 113. Upon receiving the data transmission instruction, the physical layer corresponding processor 113 performs processing relating to the public network if the request is for the public network 300, and the terminal 4 connected to the public network 300.
Data to 00. Transmission requests to other physical lines (local area network 310, leased line 320) are similarly processed, and each terminal (terminal 40
1, data is transferred to the terminal 402). In the case of receiving data, in reverse, the data link layer compatible processor 112 and the network layer compatible processor 111 process the received data in order from the physical layer compatible processor 113, and the received data is sent to the host 600 using the input / output control line 500. Forward.

Next, processing when a processor failure occurs in the composite processor system will be described. In a multi-processor system, a timer and a health check are used to monitor whether or not a fault has occurred in the upper processor or the processors in the multi-processor system.
Fault information including a fault location, detailed error factor, register information, etc. is created and the fault information is transferred to the host. The maintenance staff of the communication control device performs failure analysis using the failure information. However, in the conventional composite processor system, when the external I / O control processor that controls the external I / O signal controller has a failure, the failure information cannot be transferred to the host, and as a result, when viewed from the outside, the composite processor system ( The communication control device) becomes unresponsive. Therefore, it is impossible to determine whether the failure is in the entire composite processor system or in the specific processor. For information on how to obtain failure information when there is a failure in the external I / O control processor that controls the external I / O signal controller,
(1) A method of transferring fault information to another device (console etc.) for fault information notification, (2) A memory area for storing fault information is secured in a storage medium connected to a common bus connecting each processor, and when a fault occurs A method of storing the failure information in the failure information storage area and reading the failure information from another device (console or the like) connected to the storage medium has been known. For how to output a failure message in a distributed system, see
There are JP-A-3-135651 "Message Output Method", JP-A-4-52956 "Multiprocessor System and Error Processing Method" and the like.

[0004]

In a composite processor system composed of processors of different functions, when the external input / output control processor for controlling the external input / output signal controller has a fault, the composite processor system is seen from the host. No response is returned, and it is impossible to determine whether the fault is the fault of the entire complex processor system or the fault of the specific processor, and trouble analysis is impeded, and it takes time to restart the system.

[0005]

Means for Solving the Problems A fault notification path that can directly control an external input / output signal controller from a processor other than the external input / output control processor is provided so that a failure occurs in the external input / output control processor. The failure information can be transferred from the normally operating processor to the outside (host) using the failure notification path.

[0006]

According to the present invention, in a composite processor system,
Even when a failure occurs in the external I / O control processor, the failure information is autonomously reported to the outside by another normally operating processor, so maintenance personnel can immediately take corrective action for the failure of the multiprocessor system and restart the system. The time can be shortened.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a communication control device 100 composed of a host input / output signal controller 101, a network layer compatible processor 111, a data link layer compatible processor 112, and a physical layer compatible processor 113, during normal transmission, from the host input / output line 500 The network layer compatible processor 111 controls the host input / output signal controller 101 to take in the input data into the system, the data link layer compatible processor 112 analyzes and processes the data, and issues a transmission instruction to the physical layer compatible processor 113.
Upon receiving the transmission instruction from the data link layer corresponding processor 112, the physical layer corresponding processor 113 transmits the transmission data processed by the data link layer corresponding processor 112 to the communication line 122. Further, at the time of normal reception, the physical layer compatible processor 113 takes in the received data from the communication line 122 into the system, the data link layer compatible processor 112 analyzes and processes the data, and sends the data to the network layer compatible processor 111 to the host. Issue data transfer instructions. The network layer compatible processor 111 controls the host input / output signal controller 101 to control the host input / output line 50.
Transfer the data to 0.

When a failure occurs in the data link layer compatible processor 112, the network layer compatible processor 111 detects it and controls the host input / output signal controller 101 to transfer the failure information to the host. Data link layer compatible processor 1
Fault detection / fault information notification route switching device 130 in 12
When the occurrence of a failure in the network layer compatible processor 111 is detected, the data link layer compatible processor 112 collects the failure information and detects the failure / failure information notification path switching device 1
30 switches to the host input / output signal controller control line 123, directly controls the host input / output signal controller 101, and transfers the fault information to the host.

As a result, even when the network layer compatible processor 111 fails, another processor can report a failure,
Since the host can identify the faulty processor in the multiprocessor system, it becomes possible to promptly take countermeasures against the fault.

[0010]

According to the present invention, even if a failure occurs in the external input / output control processor in the composite processor, the failure information can be collected and the failure countermeasure can be promptly taken.

[Brief description of drawings]

FIG. 1 is a diagram illustrating an example of a communication system using a communication control device including a composite processor.

FIG. 2 is a diagram showing an example of the present invention.

[Explanation of symbols]

 100 ... Communication control device, 101 ... Host input / output signal controller, 111 ... Network layer compatible processor, 112 ... Data link layer compatible processor, 113 ... Physical layer compatible processor, 122 ... Communication line, 123 ... Host input / output signal controller control line , 130 ... Fault detection / fault information notification route switching device, 300 ... Public network, 310 ... Local area network, 320 ... Private line, 400-402 ... Terminal, 500 ... Host input / output line, 600 ... Host.

Front Page Continuation (72) Inventor Tomihisa Nishijima 810 Shimoimaizumi, Ebina, Kanagawa Prefecture Hitachi Systems Office Systems Division

Claims (1)

[Claims] 1. A composite processor system in which a plurality of processors by function are connected by a bus for inter-processor communication, and one input / output signal controller controlled by the processor controls input / output with the outside At least two failure notification means to the host) are provided in the composite processor system, and when a failure occurs in the external input / output control processor, the normally operating processor determines the most suitable failure notification means according to the failure part, and sends it to the outside. A fault notification method characterized by notifying fault information.