JPH06180360A - Radar receiver - Google Patents

Abstract

PURPOSE:To allow the suppression of unwanted wave, generated from a delay line at a timing different front a target signal, at the unwanted wave suppression ratio of the delay line or above by driving an unwanted wave eliminating circuit while controlling the timing CONSTITUTION:When a voltage comparing circuit 17 decides that the absolute value of input signal is higher than a threshold value, a detection timing signal is delivered from the circuit 17 to a gate delay circuit 19. The circuit 19 creates a gate against field through at a point delayed by a time up to the detection timing signal with reference to a transmission gate received through a gate signal input terminal 25 and a gate input circuit 10. Furthermore, a gate against triple transit echo is created at a point corresponding to the sum of times T and t2. The gate width of the signal is then extended to cover the pulse width of unwanted wave at a gate width control circuit 20 and delivered to a switch drive circuit 21. The gate signal is converted through the-circuit 21 into a driving level of a switch 13 and applied thereto as a driving voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an unnecessary wave removing technique for removing an unnecessary wave generated from the delay line in a radar receiver having a built-in delay line.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram of a conventional radar receiver. In the figure, 1 is a radar receiver, 2 is a high frequency amplifier, 3 is a low noise amplifier, 4 is a mixer, 5 is a first intermediate frequency amplifier, 6 is an intermediate frequency attenuator, 7 is a delay line, 8 is a second Intermediate frequency amplifier, 9 is a band pass filter, 10 is IQ (In-phase, Quadrat)
ure-phase) detector, 11 is a coho signal generator, 22 is a high frequency input terminal, 23 is a local signal input terminal,
24 is a video signal output terminal.

A conventional radar receiver will be described below. The radar receiver receives a high-frequency reception pulse signal input from the antenna after the high-frequency transmission pulse signal radiated from the radar transmitter through the antenna is reflected on the target.

In FIG. 3, the high frequency reception pulse signal is input from the high frequency input terminal 22 and is attenuated by the high frequency attenuator 2 by a predetermined level. The output signal of the high frequency amplifier 2 is input to the low noise amplifier 3, amplified, and input to the RF input terminal of the mixer 4. On the other hand, the local signal input from the local signal input terminal 23 is input to the LO terminal of the mixer, and the mixer outputs the intermediate frequency signal of the frequency difference between the RF terminal input signal and the LO terminal input signal as I.
Output from the F terminal. The intermediate frequency pulse signal is amplified and attenuated in the first intermediate frequency amplifier 5 and the intermediate frequency attenuator 6. This signal is then input to the delay line 7 and is delayed for a predetermined time.

The intermediate frequency pulse signal delayed by the delay line 7 is input to the second intermediate frequency amplifier 8 and amplified, and then input to the band pass filter 9. The bandpass filter 9 is generally called a matched filter, and its band is determined so that the signal level to noise level ratio becomes the highest. The output intermediate frequency pulse signal of the bandpass filter 9 is input to one input terminal of the IQ detector 10. The coho signal generated by the coho signal generator 11 is input to the other input terminal of the IQ detector 10, the input signals of both terminals are mixed therein, and the bases are 90 ° out of phase with each other. It is a band signal. I and Q video signals are output. This signal is sent from the video signal output terminal 24 to the signal processor in the subsequent stage. The signal processor detects the target azimuth and distance from the I and Q video signals.

In the delay line 7, when a target signal which is a received pulse signal passes through, an unnecessary wave generated by the internal structure of the delay line is generated. As shown in FIG. 4, when the delay time of the delay line is t ₀ ,
When there is an input signal shown by A in the same figure, as shown by B in the same figure, two kinds of unnecessary waves, that is, a field through that occurs at the same time as the signal input and a triple that occurs with a time delay of three times t _0.・ It is a transit echo. These unwanted waves are suppressed by the internal structure of the delay line. This suppression ratio is represented by the ratio of the level of the unwanted wave to the target signal, as shown in FIG.

The suppression ratio of the above-mentioned unnecessary wave is about 40 to 50 dB in a normal delay line, and in a radar receiver having a dynamic range exceeding this suppression ratio, when a high level target signal is input, The field-through or triple-transit echo detection video is processed as a false alarm in the above-mentioned signal processor in the subsequent stage.

[0008]

In a conventional radar receiver having a built-in delay line, an unnecessary wave of field through or triple transit echo generated in the delay line is generated, and the suppression ratio of this unnecessary wave is There is a problem that the dynamic range of the radar receiver cannot exceed the suppression ratio because it is determined by the structure of the delay line.

The present invention has been made in order to solve the above problems, and widens the dynamic range by suppressing unnecessary waves generated by the delay line by a suppression ratio determined by the internal structure of the delay line. Aim to get a receiver.

[0010]

In the radar receiver according to the present invention, an unnecessary wave generated from the delay line at a timing different from the target signal is timing-controlled by an unnecessary wave removing circuit provided in the latter stage of the delay line. It has a circuit structure to be removed by driving.

[0011]

In the radar receiver according to the present invention, the radar receiver having a wide dynamic range can be obtained by setting the suppression ratio of the unwanted wave generated in the built-in delay line to be equal to or more than the suppression ratio unique to the delay line. .

[0012]

【Example】

Example 1. FIG. 1 is a diagram showing the configuration of a radar receiver according to an embodiment of the present invention. In the figure, 1 to 11 and 2
2 to 24 are equivalent to the conventional example shown in FIG. 3, 12 is a directional coupler, 13 is a switch, 15 is an amplifier, 16 is a detector, 17 is a voltage comparison circuit, 18 is a gate input circuit, 1
Reference numeral 9 is a gate delay circuit, 20 is a gate width control circuit, 21 is a switch drive circuit, and 25 is a gate signal input terminal.

Next, the operation will be described. In FIG. 1, the input / output signal of the delay line 7 is shown in FIG. 4 as described above, the field through is output at the same timing as the delay line input signal, the target signal is output at time t ₀ , and the time t ₂ Outputs a triple transit echo. These signals are sent to the IQ detector 1 in the latter stage.
Input to 0 to be mixed with the above-mentioned coho signal.

On the other hand, the switch 13 connected to the output side of the coho signal generator 11 is inserted in the coho signal system of the IQ detector 10 so that the coho signal can be turned on and off. . Now, as the switch 13, let us consider, for example, a switch of a TTL drive type which operates to turn on the coho signal by TTL and H and turn off the coho signal by TT and L.

Here, for the three types of signals shown in FIG. 5A, a gate signal that covers the unwanted wave is applied to the switch 13 at the timing shown in FIG. In this case, the IQ detector 10 is operated during the TTL and L level periods.
In this case, since the detection is not performed, the output IQ video signal of the radar receiver 1 is only the target signal as shown in FIG. 8C, and the unnecessary wave is sufficiently suppressed.

Further, the drive signal generation system of the switch 14 shown in FIG. 5A will be described with reference to FIGS. 1 and 6. FIG. 6A shows the transmission pulse generation timing,
And a transmission gate for generating a pulse width, and a is an intermediate frequency pulse signal before the delay line which is a reception signal of the radar receiver by the transmission pulse.

In FIG. 1, the directional coupler 12 outputs a part of the received signal described above from its coupling terminal. This signal is amplified by the amplifier 15 and input to the detector 16 for detection. The detected voltage of the detector 16 is input to the voltage comparison circuit 17 and compared with a preset voltage threshold A ₀ , as shown in FIG. The value of A ₀ is set to a value at which the level of the unwanted wave generated in the delay line 7 starts to be detected as a false alarm by the signal processor connected to the latter stage of the radar receiver 1.

When the voltage comparison circuit 17 determines that the absolute value of the input voltage is larger than A ₀ , the voltage comparison circuit 17 sends the detection timing signal shown in FIG. 6D to the gate delay circuit 19. In the gate delay circuit 19, a gate for the field through is formed at a position delayed by the time T until the detection timing signal described above with reference to the transmission gate input through the gate signal input terminal 25 and the gate input circuit 18. To do. Further, a gate for the triple transit echo is created at the place where the time t ₂ shown in FIG. 4 is added to the time T.

The gate signal for the field-through and triple transit echoes is expanded in the gate width control circuit 20 to a length that covers the pulse width of each unwanted wave, and the switch drive circuit 21. Sent to.

In the switch drive circuit 21, the input gate signal is converted into the drive level of the switch 13 and applied to the switch 13 as the switch drive voltage shown in FIG. Therefore, in the output signal of the delay line 7 shown in FIG. 6C, unnecessary waves are suppressed in the IQ detector 10, and only the target signal is
It is output from the radar receiver 1.

Example 2. FIG. 2 is a diagram showing the configuration of a radar receiver according to another embodiment of the present invention. In the figure, 1
11 to 22 and 24 to 24 are equivalent to the conventional example shown in FIG. 3, 12 is a directional coupler, 14 is a switch, 15 is an amplifier, 16 is a detector, 17 is a voltage comparison circuit, and 18 is a gate input. Reference numeral 19 is a gate delay circuit, 20 is a gate width control circuit, 21 is a switch drive circuit, and 25 is a gate signal input terminal.

Next, the operation will be described. In FIG. 2, the input / output signals of the delay line 7 are shown in FIG. 4 as described above, the field through is output at the same timing as the delay line input signal, the target signal is output at time t ₀ , and the time t ₂ Outputs a triple transit echo. These signals are transmitted to the switch 14 in the subsequent stage.
To enter. The switch 14 is equivalent to the switch 13 described in the first embodiment.

Here, for the three types of signals shown in FIG. 5A, a gate signal that covers the unwanted wave is applied to the switch 13 at the timing shown in FIG. In this case, since the output signal of the delay line 7 is turned off during the TTL and L level periods, the output of the switch 13 is only the target signal.

The generation system of the drive signal of the switch 13 shown in FIG. 5A is the same as the timing chart of FIG. 6 of the first embodiment described above. Therefore, in the output signal of the delay line 7 shown in FIG. 6C, unnecessary waves are suppressed in the switch 13, and only the target signal is output from the radar receiver 1.

[0025]

As described above, according to the present invention, it is possible to suppress undesired waves in excess of the undesired wave suppression ratio of the built-in delay line, and it is possible to obtain a receiver having a wide dynamic range. is there.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a radar receiver according to an embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a radar receiver according to another embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of a conventional radar receiver of this type.

FIG. 4 is a diagram showing timing of input / output signals of a delay line.

FIG. 5 is a diagram showing a control timing of the switch according to the embodiment of the present invention.

FIG. 6 is a diagram showing a timing of unnecessary wave removal according to the embodiment of the present invention.

[Explanation of symbols]

 1 radar receiver 2 high frequency attenuator 3 low noise amplifier 4 mixer 5 intermediate frequency amplifier 6 intermediate frequency attenuator 7 delay line 8 intermediate frequency amplifier 9 bandpass filter 10 IQ detector 11 coho signal generator 12 directional coupler 13 switch 14 switch 15 amplifier 16 wave detector 17 voltage comparison circuit 18 gate input circuit 19 gate delay circuit 20 gate width control circuit 21 switch drive circuit 22 high frequency input terminal 23 local signal input terminal 24 video signal output terminal 25 gate signal input terminal

Claims (2)

[Claims] 1. A variable voltage type high frequency signal attenuator connected to an input terminal of a high frequency pulse reception signal, a low noise amplifier connected to an output side of the high frequency signal attenuator, and an output side of the low noise amplifier. Connected to the mixer for mixing the high frequency pulse reception signal and the local signal, the first intermediate frequency amplifier and the voltage variable intermediate frequency attenuator connected to the output side of the mixer, and the intermediate frequency attenuator A delay line for delaying the intermediate frequency pulse signal by a predetermined time, a second intermediate frequency amplifier connected to the output side of the delay line, and a band limiting bandpass filter connected to the output side of the intermediate frequency amplifier , A coho signal generator, and an IQ (wherein one input terminal is connected to the bandpass filter and the other input terminal is connected to the coho signal). In-phase, Quadrat
A directional coupler inserted into the input side of the delay line, an amplifier connected to a coupling terminal of the directional coupler, and a radar receiver including a uree-phase detector. A detector connected to the output side for detecting the intermediate frequency pulse signal, a voltage comparison circuit for comparing the detection voltage level of the detector with a predetermined voltage, an input circuit for a gate signal input from the outside, and a fixed gate signal A gate delay circuit that controls the gate width of the gate signal, a switch drive circuit that is controlled by the determination signal of the voltage comparison circuit and the gate signal, and the IQ detector. A radar receiver provided with a switch which is inserted between the coho signal generator and driven by the switch drive circuit. 2. A variable voltage type high frequency signal attenuator connected to an input terminal of a high frequency pulse reception signal, a low noise amplifier connected to an output side of the high frequency signal attenuator, and an output side of the low noise amplifier. Connected to the mixer for mixing a high frequency pulse signal and a local signal, a first intermediate frequency amplifier and a voltage variable intermediate frequency attenuator connected to the output side of the mixer, and a mixer connected to the intermediate frequency attenuator. A delay line for delaying the intermediate frequency pulse signal by a predetermined time, and a second line connected to the output side of the delay line.
Intermediate frequency amplifier, a bandpass bandpass filter connected to the output side of the intermediate frequency amplifier, a coho signal generator, one input terminal connected to the bandpass filter and the other input terminal to the coho In a radar receiver including an IQ detector connected to a signal generator, a directional coupler inserted into the input side of the delay line and an amplifier connected to a coupling terminal of the directional coupler. A detector connected to the output side of the amplifier for detecting an intermediate frequency pulse signal, a voltage comparison circuit comparing the detection voltage level of the detector with a predetermined voltage, and an input circuit for a gate signal input from the outside, A gate delay circuit that adds a certain delay to the gate signal, a gate width control circuit that controls the gate width of the gate signal, and a determination signal of the voltage comparison circuit The gate signal and the switch drive circuit controlled by a radar receiver characterized by providing a switch which is driven by the inserted the switch driving circuit at the subsequent stage of the delay line.