JPH06177155A - Formation of semiconductor thin film and fabrication of mos transistor - Google Patents

Abstract

PURPOSE:To prevent desorption of hydrogen even when a source-drain region is subjected to heat treatment, e.g. activation annealing. CONSTITUTION:The method of forming a semiconductor thin film comprises a step for forming a semiconductor thin film 12 required for formation of a channel region and a source-drain region of a transistor on an insulating substrate 10, and a step for subjecting the semiconductor thin film 12 to heat treatment in a gas composed of nitrogen and hydrogen. One fabrication mode of MOS transistor comprises a step for forming a semiconductor thin film required for formation of a channel region and a source-drain region of a transistor on an insulating substrate, a step for subjecting the semiconductor thin film to heat treatment in a gas composed of nitrogen and hydrogen, and a step for forming a channel region and a source-drain region on the semiconductor thin film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a semiconductor thin film and a method for manufacturing a MOS type transistor. Such a MOS transistor can be used as a pixel driving element or a peripheral element of a liquid crystal display device or a load element of a load element type static random access memory (SRAM).

[0002]

2. Description of the Related Art A thin film transistor (hereinafter abbreviated as TFT) using a thin film made of polycrystalline silicon or amorphous silicon (hereinafter also simply referred to as a semiconductor thin film).
There has been proposed a stacked SRAM using a load element as a load element.
The TFT is also used as a pixel driving element or a peripheral element of a liquid crystal display device. A polycrystalline silicon thin film is usually used in a TFT that requires high performance in on-current characteristics, subthreshold characteristics, on / off current ratio, and the like.

By the way, in the semiconductor thin film, dangling bonds of silicon atoms are present at a higher density than in single crystal silicon, which causes generation of leakage current when the TFT is turned off and when the TFT is turned on. It is also a cause of a decrease in operating speed. Therefore, in order to improve the characteristics of the TFT, it is an important issue to reduce the density of dangling bonds of silicon atoms.

In order to reduce dangling bonds of silicon atoms in a semiconductor thin film, a treatment called hydrogenation is usually performed.
This hydrogenation treatment is a treatment for bonding hydrogen to dangling bonds of silicon atoms by hydrogen doping. More specifically, a silicon-based gas containing hydrogen (for example, SiH ₄ ,
Si ₂ H ₆ etc.) is decomposed in plasma to deposit a thin film made of polycrystalline silicon or amorphous silicon, and hydrogen is introduced into the thin film.

[0005]

The hydrogen atoms introduced into the semiconductor thin film are easily desorbed from the silicon atoms even in the low temperature annealing of about 400 ° C. Therefore, in various heat treatments after the hydrogenation treatment, for example, in the activation annealing of the source / drain regions for lowering the resistance of the source / drain regions and improving the current driving capability, they are bonded to dangling bonds of silicon atoms. Hydrogen atoms are easily desorbed from silicon atoms. As a result, there is a problem that the characteristics of the TFT are significantly deteriorated.

To address this problem, a method of shortening the activation annealing time of the source / drain regions to reduce the amount of desorbed hydrogen can be considered. However, since the diffusion rate of hydrogen in silicon is high, It is difficult to reduce the amount of desorption, and it is not possible to effectively suppress the deterioration of the characteristics of the TFT.

Further, a method of preventing the desorption of hydrogen by forming a silicon nitride film for suppressing the diffusion of hydrogen on the surface of the semiconductor thin film is conceivable. However, the exposed surface where the silicon nitride film is not formed on the surface of the semiconductor thin film. If the semiconductor thin film region exists, there is a problem that hydrogen is desorbed through the region.

Therefore, the first object of the present invention is to
Another object of the present invention is to provide a method for forming a semiconductor thin film in which hydrogen is not desorbed even in heat treatment such as activation annealing of the drain region.

A second object of the present invention is to provide a method for manufacturing a MOS type transistor including a method for forming a semiconductor thin film in which hydrogen is not desorbed even in a heat treatment such as activation annealing of source / drain regions. is there.

[0010]

The method for forming a semiconductor thin film according to the present invention has the following objectives (a):
The method includes the steps of forming a semiconductor thin film for forming a channel region and source / drain regions of a transistor on an insulating substrate, and (b) heat treating the semiconductor thin film in a gas containing nitrogen and hydrogen as components.

The semiconductor thin film is made of polycrystalline silicon or amorphous silicon. The heat treatment is preferably performed under the conditions of 480 to 1050 ° C. and 5 to 10 seconds.

In the method of forming a semiconductor thin film of the present invention, the gas is preferably NH ₃ or ammonia vapor. Further, a step of patterning the semiconductor thin film formed on the insulating substrate into a predetermined shape can be included after the step (a) and before the step (b). Further, before the step (a), a step of forming an oxide film or an interlayer insulating layer on the insulating substrate and preliminarily heat treating the oxide film or the interlayer insulating layer in a gas containing nitrogen and hydrogen is included. It can also be done.

The first aspect of the method of manufacturing a MOS transistor of the present invention is to achieve the above second object,
(A) a step of forming a semiconductor thin film for forming a channel region and a source / drain region of a transistor on an insulating substrate; and (b) a step of heat-treating this semiconductor thin film in a gas containing nitrogen and hydrogen as components. (C) A step of forming a channel region and source / drain regions in this semiconductor thin film.

Further, in order to achieve the above-mentioned second object, the second aspect of the method for manufacturing a MOS transistor of the present invention is (a) the channel region and source / source of the transistor.
A step of forming a semiconductor thin film for forming a drain region on an insulating substrate, (b) a step of forming a channel region and source / drain regions in the semiconductor thin film, and (c)
This semiconductor thin film is heat-treated in a gas containing nitrogen and hydrogen as components.

In the first or second aspect of the method for producing a MOS transistor of the present invention, the gas is NH ₃
Is desirable. Further, a step of patterning the semiconductor thin film formed on the insulating substrate into a predetermined shape can be included after the step (a) and before the step (b).

The semiconductor thin film is made of polycrystalline silicon or amorphous silicon. The heat treatment is preferably performed under the conditions of 480 to 1050 ° C. and 5 to 10 seconds.

As a MOS transistor, a pixel drive element or a peripheral element of a liquid crystal display device or a load element type S transistor.
A RAM or a so-called MOS transistor can be exemplified.

[0018]

[Function] The reason why hydrogen is desorbed from the semiconductor thin film when the semiconductor thin film containing hydrogen is subjected to activation annealing treatment is that hydrogen in silicon has a large diffusion coefficient even at a low temperature. The hydrogen concentration in the atmosphere during annealing is lower than the hydrogen concentration in silicon.

On the other hand, it is known that the diffusion coefficient of hydrogen in silicon nitride is smaller than the diffusion coefficient of hydrogen in silicon.

The method of forming a semiconductor thin film of the present invention or M
In the method for manufacturing an OS transistor, the semiconductor thin film is heat-treated in a gas containing nitrogen and hydrogen as components. As a result, a nitride film is formed on the surface of the semiconductor thin film, moreover hydrogen is supplied to the semiconductor thin film from the gas used during the heat treatment, and the hydrogen concentration in the atmosphere during the heat treatment is higher than that in the silicon. Is high. Thereby, desorption of hydrogen from the semiconductor thin film can be suppressed very effectively.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described based on embodiments with reference to the drawings. In addition, the drawings are schematic partial cross-sectional views for explaining a process of forming a semiconductor thin film and a method of manufacturing a MOS transistor.

(Example 1) Example 1 is an example in which the first aspect of the method for forming a semiconductor thin film and the method for producing a MOS transistor of the present invention is applied to the manufacture of a top-gate p-type thin film transistor. Is. Hereinafter, Example-1 will be described with reference to FIG.

[Step-100] First, a semiconductor thin film 12 made of amorphous silicon or polycrystalline silicon and having a thickness of about 40 nm is deposited on the entire surface of the insulating substrate 10 made of quartz by a conventional CVD method (see FIG. (See (A) of 1). still,
A channel region and source / drain regions are formed in the semiconductor thin film 12 in a later step.

[Step-110] Next, the semiconductor thin film 1 is formed by photolithography and vapor phase etching.
2 is patterned into a predetermined shape (see FIG. 1B).

[Step-120] Next, the semiconductor thin film 12
A gas containing nitrogen and hydrogen as components (for example, NH ₃ gas)
Heat treatment in. The conditions of the heat treatment can be set as follows, for example. NH ₃ flow rate: 1 to 3 liters / minute Temperature: 480 to 1050 ° C. Time: 10 seconds As a result, the silicon nitride film 14 is formed on the surface of the semiconductor thin film 12 including the side surfaces (see FIG. 1C). . In this step, hydrogen is contained in the semiconductor thin film 12.
That is, so-called hydrogen doping is performed, and thereby hydrogen is bonded to dangling bonds of silicon in the semiconductor thin film. Moreover, since the silicon nitride film 14 is formed, the desorption of hydrogen atoms from silicon atoms can be effectively suppressed when the activation annealing treatment is performed in a later step. Further, since the silicon nitride film 14 is also formed on the side surface of the semiconductor thin film 12, it is possible to effectively suppress the desorption of hydrogen from the side surface of the semiconductor thin film 12 when activation annealing is performed in a later step. You can

[Step-130] After that, the semiconductor thin film 12
Gate oxide film 1 made of SiO ₂ and having a thickness of 30 nm
6 is further deposited, and further, an amorphous silicon layer or a polycrystalline silicon layer is deposited to 100 nm on the gate oxide film 16,
By photolithography method and vapor phase etching method,
The amorphous silicon layer or the polycrystalline silicon layer is patterned to form the gate electrode 18 (see FIG. 1D).

[Step-140] Then, ion implantation is performed using the resist mask to form the source / drain regions 20 in the semiconductor thin film 12. The conditions of ion implantation can be set as follows, for example. Ion species: B ions Implantation energy: 10 keV Dose amount: 3 × 10 ¹⁵ / cm ² or Ion species: BF ₂ ions Implantation energy: 35 keV Dose amount: 3 × 10 ¹⁵ / cm ² This also forms a channel region. To be done.

[Step-150] Next, for example, activation annealing of the source / drain regions 20 is performed using an electric furnace. The conditions of activation annealing can be, for example, temperature: 900 ° C. time: 20 minutes. Alternatively, RTA (Rapid Ther
It is also possible to carry out activation annealing at 1100 ° C. for about 10 seconds by the mal annealing method.

Since the silicon nitride film 14 is formed on the surface including the side surface of the semiconductor thin film 12, it is possible to effectively suppress the desorption of hydrogen from the semiconductor thin film 12 by the activation annealing.

[Step-160] After that, the interlayer insulating layer 22
As a Si ₃ N ₄ layer of 100 nm and a PSG layer of 150 to 2
00 nm is deposited on the entire surface, and an opening is formed in the interlayer insulating layer 22 by R
It is formed by the IE method, a metal wiring material is formed on the opening and the interlayer insulating layer 22 by the sputtering method, and then the metal wiring material is patterned to form the wiring layer 24 (FIG. 1).
(E)). In this way, a MOS transistor composed of a top gate thin film p-type transistor is completed. The silicon nitride film 14 is not shown in FIG.

(Example-2) Example-2 is an example in which the second aspect of the method for forming a semiconductor thin film and the method for producing a MOS transistor of the present invention is applied to the production of a bottom-gate p-type thin film transistor. Is. Example-2 will be described below with reference to FIGS. 2 and 3.

[Step-200] A semiconductor thin film is formed on the insulating substrate 10. For that purpose, first, an amorphous silicon layer or a polycrystalline silicon layer is deposited to a thickness of 100 nm on an insulating substrate 10 made of quartz by a conventional method,
The gate electrode 18 is formed by the photolithography technique and the vapor phase etching technique. Next, a gate oxide film 16 made of SiO _{2 is formed on} the entire surface in a thickness of 30 by a usual method.
nm deposition. Thus, the structure shown in the schematic partial cross-sectional view of FIG. 2A can be obtained.

[Step-210] Next, the gate oxide film 1
6 (oxide film) is preheated in a gas containing nitrogen and hydrogen (for example, NH ₃ gas) (see FIG. 2B). The conditions of the preliminary heat treatment can be set as follows, for example. NH ₃ flow rate: 1 to 3 liters / minute Temperature: 480 to 1050 ° C. time: 10 seconds As a result, the silicon nitride film 14A is formed on the surface of the oxide film, and when the semiconductor thin film is heat-treated in a later step, it is oxidized. Desorption of hydrogen from the semiconductor thin film via the film can be effectively suppressed.

[Step-220] Next, the semiconductor thin film 12 made of amorphous silicon or polycrystalline silicon is formed on the entire surface.
Are deposited by a conventional CVD method (see FIG. 2C). The thickness of the semiconductor thin film 12 is, eg, 40 nm. A channel region and source / drain regions are formed in the semiconductor thin film 12 in a later step.

[Step-230] Next, the semiconductor thin film 1 is formed by photolithography and vapor phase etching.
2 is patterned into a predetermined shape (see FIG. 2D).

[Step-240] Then, using the resist mask, ion implantation is performed to form the source / drain regions 20 in the semiconductor thin film 12, and also form the channel region. The conditions for ion implantation can be the same as in Example-1.

[Step-250] Next, the semiconductor thin film 12
A gas containing nitrogen and hydrogen as components (for example, NH ₃ gas)
Heat treatment in. The conditions of the heat treatment can be set as follows, for example. This heat treatment also serves as activation annealing for the source / drain regions. NH ₃ flow rate: 1 to 3 liters / minute Temperature: 480 to 1050 ° C. time: 10 seconds As a result, the silicon nitride film 14 is formed on the surface of the semiconductor thin film 12 including the side surfaces (see FIG. 3A). ).
In this step, hydrogen is contained in the semiconductor thin film 12. That is, so-called hydrogen doping is performed, and thereby hydrogen is bonded to dangling bonds of silicon in the semiconductor thin film. Moreover, since the silicon nitride film 14 is formed, desorption of hydrogen atoms from silicon atoms can be effectively suppressed in this heat treatment which also serves as activation annealing of the source / drain regions.

Further, since the silicon nitride film 14 is also formed on the side surface of the semiconductor thin film 12, this heat treatment can effectively suppress the desorption of hydrogen from the side surface of the semiconductor thin film 12.

[Step-260] After that, the interlayer insulating layer 22
And the wiring layer 24 is further formed ((B) of FIG. 3).
reference). In this way, a MOS transistor composed of a top gate thin film p-type transistor is completed. The nitride films 14 and 14A are not shown in FIG. 3B.

The present invention has been described above based on the preferred embodiments, but the present invention is not limited to these embodiments. The various numerical values, conditions, transistor structures, and the like described in the embodiments are examples, and can be changed as appropriate. Although the embodiments have been described by taking an insulating substrate made of quartz as an example, a combination of a silicon substrate and an oxide film made of SiO ₂ or a glass substrate, and after forming elements such as transistors and capacitors on the silicon substrate, An interlayer insulating layer such as Si ₃ N ₄ , SiO ₂ or PSG is formed on
This can also be used as an insulating base material.

For example, in Example-1, the insulating substrate 1
Although the semiconductor thin film 12 is formed on 0, in some cases,
A SiN film can be formed on the insulating substrate by a plasma CVD method or the like, and the semiconductor thin film 12 can be formed thereon. Alternatively, when the insulating substrate is composed of an oxide film or an interlayer insulating layer, it is desirable to apply the preliminary heat treatment described in Example-2 to the oxide film or the interlayer insulating layer of the insulating substrate.

Further, for example, in Example-2, the preliminary heat treatment was performed on the oxide film of the insulating substrate.
A SiN film may be formed on the surface of the oxide film by a plasma CVD method or the like.

Further, in Example-1 and Example-2, the semiconductor thin film was formed by depositing amorphous silicon or polycrystalline silicon. However, after depositing the amorphous silicon layer on the insulating substrate, 550-550. 0.5-2 at a temperature of 800 ° C
A semiconductor thin film made of polycrystalline silicon can be formed by growing crystal grains by a solid-phase growth method in which heat treatment is performed for 0 hours.

Alternatively, instead of forming the amorphous silicon layer, a polycrystalline silicon layer is formed on the entire surface by a CVD method or the like, and then Si ions are ion-implanted into the polycrystalline silicon layer to form the polycrystalline silicon layer. By forming the layer as an amorphous silicon layer, an amorphous silicon layer is formed over the entire surface.
Then, crystal grains can be grown from the amorphous silicon layer by the solid phase growth method described above to form a semiconductor thin film made of polycrystalline silicon. In this case, the following conditions can be exemplified as the conditions for ion implantation. Implantation energy: 40 keV Dose amount: 1 × 10 ¹³ / cm ² Ion species: Si

Further, it is also possible to form nuclei as seeds for crystal grain growth in the amorphous silicon layer and grow crystal grains from such seeds by the solid phase growth method. For example, as shown in FIG. 4A, after the polycrystalline silicon layer 30 is formed, silicon ions are ion-implanted at a low dose, and then the resist mask 3 is formed on the polycrystalline silicon layer 30.
Form 2. Then, as shown in FIG. 4B, the polycrystalline silicon layer not covered with the resist mask 32 is ion-implanted at a high dose amount. As a result, the polycrystalline silicon layer not covered with the resist mask is made amorphous (see FIG. 4C). This area is indicated by 34 in FIG. Then, using the polycrystalline silicon layer 30 covered with the resist mask as a nucleus, a semiconductor thin film made of polycrystalline silicon is formed by a solid phase growth method. Alternatively, as shown in FIG. 5, the amorphous silicon layer 3
0 and a light-shielding mask 32 using a lithographic technique
It is also possible to form the nucleus 36 and form the nucleus 36 by irradiating the amorphous silicon layer 30 with excimer laser light using the light shielding mask 32.

As the MOS type transistors, top gate type thin film n type transistors, bottom gate type thin film n type transistors and the like can be exemplified in addition to the top gate type and bottom gate type thin film p type transistors.
Further, for example, the method of forming a semiconductor thin film of the present invention can be applied to a so-called XMOS type transistor in which gate electrodes are formed above and below a channel region. Then, these transistors can be used as a pixel driving element or a peripheral element of a liquid crystal display element, or as a load element of a load element type SRAM.

[0047]

According to the method for forming a semiconductor thin film of the present invention, the semiconductor thin film is heat-treated in a gas containing nitrogen and hydrogen as components. As a result, hydrogen can be introduced into the semiconductor thin film. At the same time, a nitride film can be formed on the surface of the semiconductor thin film, and since the atmosphere of the heat treatment is rich in hydrogen, desorption of hydrogen from the semiconductor thin film can be effectively suppressed. Further, according to the method of manufacturing a MOS transistor of the present invention, it is possible to raise the activation annealing temperature of the source / drain regions, and it is possible to improve the operating speed, rise characteristics, and leak current characteristics of the transistor. it can. In addition, based on the manufacturing method of the present invention, SR
When an AM load element is manufactured, low current consumption can be achieved, the α-ray resistance characteristic is improved, and the reliability of the element can be increased.

[Brief description of drawings]

FIG. 1 is a schematic partial cross-sectional view of a transistor element for explaining the process of Example-1.

FIG. 2 is a schematic partial cross-sectional view of a transistor element for explaining the process of Example-2.

FIG. 3 is a schematic partial cross-sectional view of the transistor element for explaining the process of Example-2 subsequent to FIG. 2;

FIG. 4 is a diagram for explaining an example of a method for forming a semiconductor thin film.

FIG. 5 is a diagram for explaining an example of a method of forming a semiconductor thin film, which is different from that of FIG.

[Explanation of symbols]

 10 Insulating Substrate 12 Semiconductor Thin Film 14 Silicon Nitride Film 16 Gate Oxide Film 18 Gate Electrode 20 Source / Drain Region 22 Interlayer Insulating Layer 24 Wiring Layer

Claims (8)

[Claims] 1. A step of (a) forming a semiconductor thin film for forming a channel region and a source / drain region of a transistor on an insulating substrate, and (b) the semiconductor thin film in a gas containing nitrogen and hydrogen as components. A method of forming a semiconductor thin film, comprising the step of: 2. The method for forming a semiconductor thin film according to claim 1, wherein the gas is NH ₃ . 3. The semiconductor thin film formed on the insulating substrate is formed into a predetermined shape after the step (a) and before the step (b). Item 3. A method of forming a semiconductor thin film according to item 2. 4. Before the step (a), an oxide film or an interlayer insulating layer is formed on an insulating substrate, and the oxide film or the interlayer insulating layer is preheated in a gas containing nitrogen and hydrogen as components. The method for forming a semiconductor thin film according to claim 3, wherein 5. (a) A step of forming a semiconductor thin film for forming a channel region and source / drain regions of a transistor on an insulating substrate, and (b) the semiconductor thin film in a gas containing nitrogen and hydrogen as components. And a step of (c) forming a channel region and source / drain regions in the semiconductor thin film, a method of manufacturing a MOS type transistor. 6. A process of forming a semiconductor thin film for forming a channel region and a source / drain region of a transistor on an insulating substrate, and (b) forming a channel region and a source / drain region in the semiconductor thin film. And a step of (c) heat-treating the semiconductor thin film in a gas containing nitrogen and hydrogen as components, a method of manufacturing a MOS transistor. 7. The method for manufacturing a MOS transistor according to claim 5, wherein the gas is NH ₃ . 8. The method according to claim 5, wherein the semiconductor thin film formed on the insulating substrate has a predetermined shape after the step (a) and before the step (b). Item 6. A method for manufacturing a MOS transistor according to Item 6 or 7.