JPH06177070A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To achieve an electrode structure using high-melting-point metal such as tungsten, which can obtain excellent ohmic contact even if the silicide surface of a polycide film is oxidized and the boron concentration in the surface of a P-typed diffused layer is decreased. CONSTITUTION:A P-type diffused layer 13A, wherein boron is introduced as impurities, and a polycide film 17 are formed on the surface of a silicon substrate 11. A silicon oxide film 18 is formed thereon. Contact holes 15A and 15B are provided in the insulating film 18. The contact holes 15A and 15B expose the surface of the P-type diffused layer 13A and the silicide part of the polycide layer. Etching for removing the surface of the P-type diffused layer 13A by the specified depth and etching for removing the silicide part are performed by using the contact holes. Two contact holes are formed by the same step. The etching of the silicide part and the etching of the surface of the diffused layer are also performed at the same time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to semiconductor technology and further to
The present invention relates to a technique particularly effective when applied to an electrode structure with a semiconductor element, and relates to a technique useful when applied to an electrode structure of a semiconductor device using a refractory metal such as tungsten for an electrode.

[0002]

2. Description of the Related Art In recent semiconductor integrated circuit devices,
There is known a structure in which an electrode / wiring composed of a polycide film in which a polysilicon layer and a silicide layer are superposed is used, and a metal film for another lead electrode is connected to this electrode / wiring structure. Further, in order to achieve good ohmic contact between the impurity diffusion layer formed on the silicon substrate and the metal electrode, the concentration of impurities such as phosphorus, arsenic, and boron should be high in order to keep the carrier concentration of the diffusion layer above a certain level. The technology to be introduced in is known.

By the way, when the polycide film is used in the electrode / wiring structure as described above, the surface portion of the lead electrode contacting the metal electrode is exposed from the contact hole before the electrode is formed. Moreover, it is known that the exposed portion (silicide portion) is oxidized and the resistance of the contact portion is increased. On the other hand, when boron is implanted in a silicon substrate to form a p-type diffusion layer, the segregation coefficient of the boron is small, which results in the oxidation step, annealing, etc. in the subsequent LSI manufacturing step. High temperature heat treatment (40
At 0 ° C. or higher), boron near the surface of the p-type diffusion layer moves to another layer such as a silicon oxide film formed on the p-type diffusion layer,
It is known that the concentration of p-type impurities in the diffusion layer decreases, which increases the resistance of the electrode contact portion.

By the way, in the conventional electrode structure using the aluminum alloy, even if the surface of the silicide is oxidized by the high temperature heat treatment or the boron concentration on the surface of the silicon substrate is lowered, the temperature is about 400 ° C. when the electrode is formed. By the relatively low temperature heat treatment of, the contact area of the semiconductor reacts with the aluminum alloy, and the electrode surface is an oxidized layer, or
Since the electrode interface is formed in the silicon substrate by incorporating the layer in which the boron concentration is lowered, a good ohmic contact is still achieved.

[0005]

However, in the recent semiconductor technology, as the LSI is highly integrated and the device is miniaturized, it is necessary to flow the same current as before with a thin electrode, and the electrode material is used. In place of the conventional aluminum alloy, a refractory metal that withstands a high current density such as tungsten has come to be used. Therefore, it has been made clear by the inventors of the present application that the following problems occur in the electrode / wiring structure described above. That is, the refractory metal is
In the heat treatment at about 400 ° C. performed when forming the electrode structure,
Since the refractory metal electrode does not react with an oxidized silicide surface such as an aluminum alloy or a silicon surface with a reduced boron concentration, it becomes difficult to achieve good ohmic contact.

The present invention has been made in view of the above circumstances. Even when the silicide surface of the polycide film is oxidized or the boron concentration on the surface of the p-type diffusion layer is decreased, a refractory metal such as tungsten is used. In the electrode structure used,
It is an object of the present invention to provide a semiconductor device and a method of manufacturing the same that can obtain good ohmic contact. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0007]

The typical ones of the inventions disclosed in the present application will be outlined below. That is, a diffusion region in which boron is introduced as an impurity or a polysilicon layer is formed on the surface of a silicon substrate, and an insulating film is formed thereon, and the surface of the diffusion region or the polysilicon layer is exposed on this insulating film. The opening is provided so that Then, the exposed surface of the diffusion region or the surface of the polysilicon layer was removed by a predetermined depth, and a metal electrode was brought into conductive contact with the surface of the diffusion region or the surface of the polysilicon layer after the removal. Further, a polycide film made of silicide and polysilicon is formed on the surface of the silicon substrate, an insulating film is formed thereon, and an opening is provided in the insulating film so that the silicide part of the polycide film is exposed. Then, the silicide portion of the polycide film exposed through the opening is removed to expose the polysilicon portion, and the metal film is brought into conductive contact with the exposed surface of the polysilicon film.

[0008]

According to the above-mentioned means, even when the boron concentration near the surface of the diffusion region or the polysilicon layer is lowered, the portion where the concentration is lowered is removed and the boron concentration is still increased. The retained portion comes into conductive contact with the metal electrode for extraction, and the resistance of the connection portion can be reduced. Further, even when the silicide portion of the polycide film is oxidized by heat treatment to increase its resistance value, the silicide portion is removed before the metal film is formed. The resistance can be reduced.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows a first example to which the electrode structure of the present invention is applied.
FIG. 6 is a cross-sectional view of essential parts showing a pMOS transistor part of a semiconductor device according to an example. As shown in the figure, an n-well diffusion layer 2 is provided on a silicon substrate 1, and a p-type diffusion layer 3 for source / drain of a pMOS transistor is formed on the n-well diffusion layer 2. This p-type diffusion layer 3 is
It is formed by introducing boron into the substrate 1 by ion implantation or the like and thermally diffusing it. P formed in this way
A silicon oxide film 4 is formed on the diffusion layer 3, a contact hole 5 is formed in the silicon oxide film 4, and an extraction electrode 6 made of a refractory metal such as tungsten is formed through the contact hole 5. Has been formed.

By the way, on the surface of the p-type diffusion layer 3, there is a layer 3a having a low boron concentration and a small amount of carriers. This is because the boron segregation coefficient causes boron to move to another layer such as the silicon oxide film 4 thereover during the LSI manufacturing process. Therefore, the contact hole 5 is provided so as to penetrate not only the silicon oxide film 4 but also the layer 3a having a low boron concentration to reach the layer 3b having a relatively high boron concentration therebelow. As a result, the electrode 6 can come into direct contact with the layer 3b having a high boron concentration.

In FIG. 2, BF ₂ ions are implanted into the n-well diffusion layer at an acceleration energy of 60 KeV at 2 × 10 ¹⁵ cm ^-2 , and then a heat treatment is performed at 950 ° C. for 20 minutes to form the source / source of the pMOS transistor. The distribution of the carrier concentration in the depth direction when the p-type diffusion layer for the drain is formed is measured by the spread resistance method. As is clear from this graph, in the p-type diffusion layer formed by the above-mentioned method, there is a layer with a small amount of carriers (corresponding to 3a portion in FIG. 1) from the surface to a depth of about 10 nm, Therefore, it is understood that good ohmic contact can be obtained by forming the contact hole to a depth of about 10 nm from the surface of the p-type diffusion layer and forming the electrode 6 in this state.

FIG. 3 is a longitudinal sectional view showing a second embodiment in which the present invention is applied to an electrode structure of a semiconductor device in which a p-type diffusion layer and a polycide film are formed on a silicon substrate. As shown in this figure, pMOS is formed on the main surface of the silicon substrate 11.
The transistor 10 is formed. More specifically,
The source / drain p-type diffusion layers 13A and 13B are formed by introducing boron into the silicon substrate 11. Then, the gate electrode 12 is formed of the polycide film 17 on the gate insulating film 19, and the polycide film 17 is in conductive contact with the p-type diffusion layer 13B for source / drain on the one hand. Then, a passivation film (interlayer insulating film) 18 made of silicon oxide is formed on the silicon substrate 11 and the polycide film 17 so as to cover the entire surface. Then, a contact hole 15A is formed in the passivation film 18 on the p-type diffusion layer 13A, and a contact hole 15B is formed in the passivation film 18 on the polycide film 17, and for example, tungsten is formed in each contact hole. Electrodes 16A, 16B made of p-type diffusion layers 13A,
It is formed so as to be in contact with the polycide film 17. still,
In the figure, 14 is a silicon oxide film for element isolation.

By the way, the contact holes 15A, 1
5B is formed by the procedure shown in FIGS. First,
In a step after the passivation film 18 is formed, a resist 19 is formed using a predetermined mask pattern, and the passivation film 18 is etched using this as a mask to form openings 18A in the passivation film 18.
Open 18B (Fig. 4).

Next, the resist 19 is removed, and this time, the silicide layer 17A forming the polycide film 17 is selectively etched using the passivation film 18 having the openings 18A and 18B as a mask. The etching of the silicide layer 17A in this manner is performed by L
Silicide layer 1 by heat treatment during the manufacturing process of SI
The reason why the surface of 7A is oxidized and the electrode is brought into direct contact with this is that the resistance of the contact portion increases.

By the way, at the time of etching the silicide layer, the opening 1 formed in the passivation film 18 is formed.
The surface layer of the p-type diffusion layer 13A exposed from the opening 18A through 8A is also etched. The depth removed at this time is substantially equal to the thickness (for example, 10 nm) of the upper layer portion in which the impurity concentration of the p-type diffusion layer 13A is reduced, and the depth of the contact holes 15A and 15B shown in FIG.
Will be formed (FIG. 5).

Contact hole 1 formed in this way
By forming electrodes 16A and 16B for extraction on 5A and 15B, the electrode 16A is in direct contact with the high concentration portion of the p-type diffusion layer 13A, and the electrode 16B is in direct contact with the polysilicon layer 17B of the polycide film 17. As a result, an electrode / wiring structure having a low resistance value at the contact portion is achieved. Such a structure is similar to that of a submicron LSI,
It is particularly useful for a device using a refractory metal such as tungsten as a metal electrode.

Next, a semiconductor device according to a third embodiment to which the above electrode structure is applied and a method of manufacturing the same will be described with reference to FIGS.
This will be described with reference to FIG. Of these, FIG. 6 is a vertical cross-sectional view of the semiconductor device after the electrode structure is formed. As shown in this figure, the bipolar transistor 31 is formed in the p-well diffusion layer 25 (25a) formed on the semiconductor substrate 21.
Is formed, the p-channel MOS transistor 32 is formed in the n-well diffusion layer 25 (25b), and the p-channel diffusion layer 26 is formed in the n-well diffusion layer 26.
Channel MOS transistors 33 are formed respectively. These transistors are electrically isolated from each other by an insulating film 27 made of silicon oxide. Furthermore, the above 3
The two transistors are covered with passivation films 40 and 41 made of, for example, silicon oxide, and contact holes 42 to 48 formed in the passivation films 40 and 41 have electrodes 52 made of tungsten or the like.
~ 58 are formed.

The manufacturing process of the semiconductor device having the above structure will be described below. As shown in FIG. 7, the semiconductor substrate 2
1 is provided with an n-type high-concentration (n ⁺ ) buried layer 22 and a p-type high-concentration (p ⁺ ) buried layer 23, on which an n-type epitaxial layer 24, for example, is grown, and a p-type A diffusion layer is formed, and an n-type well diffusion layer 25 and a p-type well diffusion layer 26 are selectively formed in the epitaxial layer 24.

A silicon oxide film 27 for isolation is formed on the semiconductor device having such a structure by a selective oxidation method, and the npn bipolar transistors 31, p are formed on the main surface of the epitaxial layer 4 according to a known manufacturing process.
A MOS transistor 32 and an nMOS transistor 33 are formed. In the figure, 32a is a p-type diffusion layer for source / drain of pMOS, 33a is an n-type diffusion layer for source / drain of nMOS, 32b and 33b are gate oxide films, and gate electrodes 332c and 33c are polycide films. , 31a is a collector diffusion layer of an npn bipolar transistor, 31b is a base diffusion layer, 31c is an emitter diffusion layer, 31d is a polysilicon layer for extracting a base, 31e.
Is a polysilicon layer for emitter, and 40 and 41 are passivation films of silicon oxide. In the semiconductor device obtained by the steps up to this point, each transistor element is entirely covered with the passivation films 40 and 41 (FIG. 8).

Next, a resist (not shown) is formed according to a predetermined mask pattern, and contact holes 42 to 48 are formed at predetermined positions of the passivations 40 and 41 using the resist as a mask (FIG. 9). In the etching (dry etching) of silicon oxide performed here, the etching rate ratio (selection ratio) with silicon is maximized. By performing the etching under such conditions, it is possible to uniformly form contact holes having a predetermined shape in the silicon oxide portions having different film thicknesses.

Next, the contact hole 4 formed as described above.
Using 2-48, the silicon portion is etched. As described above, the depth of this etching is controlled so that the surface portion of the p-type diffusion layer in which the boron concentration is lowered by the heat treatment is removed, and the final contact hole shape is obtained (FIG. 10). . Then, through the contact holes 42 to 48 thus formed, electrodes 52 to 58 made of, for example, tungsten are formed so as to be in conductive contact with the underlying element.

The etching of the silicon portion may be performed simultaneously with the etching of the silicide portion in the step of bringing the metal electrode into conductive contact with the gate electrodes 32c and 33c of the pMOS and nMOS. That is, also in the third embodiment, the silicide portion of the polycide film forming the gate electrode is easily oxidized in the same manner as in the second embodiment, so that the silicon portion is removed by the etching process used to remove the silicide portion. Simultaneous etching of the parts simplifies the manufacturing process.

As described above, in the electrode structure of the semiconductor device of this embodiment, the portion of the p-type diffusion layer in which boron is introduced, in which the boron concentration is lowered, is removed by the second etching, so that the electrode is It comes into direct contact with the layer having a high impurity concentration, and good ohmic contact can be obtained. Further, in forming the contact hole for contacting the polycide film and the electrode, the oxidized silicide portion is removed and the electrode is directly contacted with the polysilicon portion, so that the resistance can be reduced at the contact portion.
If a p-type diffusion layer into which boron is introduced and a polycide film are formed in the same semiconductor device, the p-type diffusion layer and the polycide film are removed by etching used to remove the silicide film.
Since the surface portion of the shape diffusion layer is etched at the same time, the addition of one process results in
One effect can be achieved at the same time.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, in the above-described embodiment, an example has been shown in which the p-type diffusion layer having boron introduced therein is brought into conductive contact with the metal electrode, but the present invention is also applicable to diffusion layers having other impurities introduced therein. Further, although the p-type diffusion layer is exemplified as the conductive layer into which the p-type impurity is introduced, the present invention is not limited to this, and the polysilicon layer of a semiconductor device using, for example, a polysilicon film into which the p-type impurity is introduced as a conductive layer is used. The present invention may be applied to the connecting portion between the silicon film and the metal electrode. Further, in the above-described embodiment, an example in which tungsten is used as the metal electrode is shown, but it is also applicable to an electrode structure using other metal such as molybdenum. Further, in the above embodiment, an example in which the silicide film and the electrode of the refractory metal are brought into conductive contact has been described. However, the present invention is applied to a structure in which the silicide film and other conductive layers are conductively contacted by through holes. You may apply. In the above description, the case where the invention made by the present inventor is mainly applied to the semiconductor technology which is the background field of application has been described, but the present invention is not limited thereto and a semiconductor into which impurities are introduced. It can be generally used for a technique for connecting an element and a refractory metal.

[0025]

The effects obtained by the representative one of the inventions disclosed in the present application will be briefly described as follows. That is, even when the silicide surface of the polycide film is oxidized or the boron concentration on the surface of the p-type diffusion layer is lowered during the manufacturing process of the semiconductor device, a metal electrode using a refractory metal such as tungsten is used. It is possible to make good ohmic contact with this.

[Brief description of drawings]

FIG. 1 is a fragmentary cross-sectional view showing a pMOS transistor portion of a semiconductor device according to a first embodiment.

FIG. 2 is a graph showing the relationship between the impurity concentration of a p-type diffusion layer formed on a silicon substrate and the depth from the surface.

FIG. 3 is a vertical cross-sectional view showing an electrode structure of a semiconductor device in which a p-type diffusion layer and a polycide film are formed on a silicon substrate.

4 is the contact holes 15A and 15 shown in FIG.
FIG. 11 is a cross-sectional view showing a step of forming an opening in a silicon oxide film in the manufacturing step of forming B.

5 is a cross-sectional view showing a step of removing the surface of the p-type diffusion layer and the silicide portion of the polycide film by using the opening of FIG.

FIG. 6 is a vertical sectional view of a semiconductor device having a BiCMOS structure to which the present invention is applied.

FIG. 7 is a vertical cross-sectional view showing steps up to formation of an n-type epitaxial layer 26 including an n ⁺ buried layer, ap ⁺ buried layer, an n-type well diffusion layer and a p-type well diffusion layer on a semiconductor substrate. Is.

8 is a longitudinal sectional view showing a state in which each transistor element is formed on the semiconductor substrate shown in FIG. 7 and is covered with a passivation film.

9 is a vertical cross-sectional view showing a state in which a contact hole is formed in the passivation film shown in FIG.

10 is a vertical cross-sectional view showing a state in which the surface of the diffusion layer is etched using the contact hole shown in FIG.

[Explanation of symbols]

 1, 11 Silicon substrate 3, 13A P-type diffusion layer 3a Part of p-type diffusion layer having low boron concentration 3b Part of p-type diffusion layer having high boron concentration 4 Silicon oxide film 5 Contact hole 6, 16A, 16B Electrode (high melting point Metal electrode) 17 Polycide film 17A Silicide layer 17B Polysilicon layer 18 Passivation film (interlayer insulating film)

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takahide Ikeda 2326 Imai, Ome City, Tokyo, Hitachi Device Development Center (72) Inventor Osamu Saito 2326 Imai, Ome City, Tokyo Hitachi, Ltd. Device Development Center (72) Inventor Hiromitsu Enomi 2326 Imai, Ome City, Tokyo Inside Hitachi Device Development Center

Claims (3)

[Claims] 1. A silicon substrate surface having a diffusion region or a polysilicon layer in which boron is introduced as an impurity,
In a semiconductor device in which an insulating film is formed thereon, and a metal electrode is formed in conductive contact with the surface of the diffusion region or the polysilicon layer through the opening provided in the insulating film, the opening A semiconductor device, wherein the surface of the more exposed diffusion region or the surface of the polysilicon layer is removed by a predetermined depth, and a metal electrode is conductively contacted with the removed diffusion region surface or the polysilicon layer surface. 2. A polycide film made of silicide and polysilicon is formed on a substrate surface, an insulating film is formed on the polycide film, and a metal film is formed on the polycide film through an opening provided in the insulating film. In the semiconductor device formed so as to be in conductive contact with the surface, the silicide portion of the polycide film exposed through the opening is removed to expose the polysilicon portion, and the metal film is conductively contacted with the exposed surface of the polysilicon film. A semiconductor device characterized in that. 3. In manufacturing a semiconductor device having the structure according to claim 1 and the structure according to claim 2, an opening for exposing the polycide film and the diffusion region or the poly are provided in the insulating film. The openings for exposing the silicon layer were formed in the same step, and the silicide portion of the polycide film and the surface of the diffusion region or the surface of the polysilicon layer were simultaneously etched through these openings. A method of manufacturing a semiconductor device, comprising: