JPH06169450A - High efficient encoder for digital video signal - Google Patents

Abstract

PURPOSE:To provide flexibility by providing the interchangeability of a high efficient encoding system between the systems of two video signals whose resolution is different. CONSTITUTION:The sub-block of (2X2=4) picture elements is constituted under consideration of the ratio N(=4) of a resolution between a high vision signal and an NTSC signal. A blocking and mean value preparing circuit 2 prepares the weighted mean value (y) of each sub-block. Then, the weighted mean value of the (4X4) sub-block is encoded by a mean value encoding circuit 8. A difference value DELTAx between the data of each picture element and the weighted mean value is prepared by a subtracting circuit 7, and the difference value is encoded by a difference value encoding circuit 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-efficiency coding apparatus for digital video signals, which is compatible with the coding of two types of digital video signals having different resolutions.

[0002]

2. Description of the Related Art As a television system, for example, a high-definition system, which has a higher resolution than a standard system such as a practically used NTSC system, has been proposed. Research and development of equipment is done. It has also been proposed to record high resolution video signals, for example in the form of digital data. Even with the current standard system, the amount of information in the digital video signal is large and the high resolution digital video signal (H
In the case of the D signal), it is necessary to record / reproduce a larger amount of information. For this reason, when recording HD signals, it is usual to employ high-efficiency coding for compressing the amount of recording data.

Conventionally, the high-efficiency coding applied to an HD signal and the high-efficiency coding applied to a standard digital video signal (referred to as an SD signal) are independent. There was no compatibility between. However, during the period when a plurality of methods are mixed, the digital V
Considering the case of TR, a digital VTR for HD signals
It is preferable that the tape recorded by (HD VTR) can be reproduced by a digital VTR for SD signal (called SD VTR). On the contrary, SD V
It is preferable that the tape recorded by TR can be reproduced by HD VTR. The bidirectional compatibility described above is effective not only for VTRs but also for transmission / reception of digital video signals in that the encoding device and the decoding device are commonly used and the scale of hardware is reduced.

Therefore, the applicant of the present application has proposed a high-efficiency coding apparatus for digital video signals having bidirectional compatibility between HD signals and SD signals. This encoding device averages N pieces of pixel data, for example, 4 pieces, which are approximately equal to the resolution ratio of SD signals and HD signals, blocks 16 pieces of averaged data, and block-encodes them. The difference data between the pixel data of the signal and the averaged data is encoded, and the encoded output of the averaged data and the encoded output of the difference data are recorded. In this method, S
A reproduced image can be obtained by the D VTR reproducing the average value information of the tape recorded by the HD VTR.
The HD VTR can obtain a reproduced image by decoding each pixel data of the tape recorded by the SD VTR.

[0005]

As described above, the above-mentioned high efficiency coding apparatus uses the simple average value. However, even if the probabilities of the four pieces of pixel data are different, the four pixels are added equally, and it is not possible to increase the weight of more reliable pixel data.

Further, when transmitting the differential data, one of, for example, four data for forming the same average value data can be omitted to reduce the transmission data amount. However, in this case, there is a problem that the non-transmitted differential data is intensively affected by the quantization distortion.

Further, although ADRC can be used for encoding the average value data and the difference data, the data amount of the dynamic range information generated when encoding by ADRC is relatively large and the compression efficiency is improved. There was a problem I couldn't do.

Therefore, one object of the present invention is to provide a high-efficiency coding apparatus which uses a weighted average instead of a simple average.

Another object of the present invention is to provide a high efficiency coding apparatus in which the influence of quantization distortion is reduced.

Still another object of the present invention is to provide a high efficiency coding apparatus capable of further improving the compression efficiency when ADRC is used for coding.

[0011]

The invention according to claim 1 is the first
The second standard video signal having a higher resolution than that of the standard video signal is supplied, and this signal is digitized and then compression-encoded for transmission. An averaging circuit for weighted averaging N pixel data that is approximately equal to the ratio of resolutions of the first and second standard video signals, and a plurality of weighted average data from the averaging means are block-coded into blocks. Coding circuit, a second coding circuit for coding the difference data between the N pixel data and the weighted average data, and means for transmitting the outputs of the first and second coding circuits. It is a high-efficiency encoder for digital video signals having the following.

According to a second aspect of the present invention, in the high-efficiency encoding apparatus for a digital video signal according to the first aspect, the second encoding circuit locally decodes the average data encoded by the first encoding circuit. The data obtained is used.

According to a third aspect of the present invention, in the high-efficiency encoding apparatus for a digital video signal according to the first aspect, the first encoding circuit is an n-bit ADRC encoding in which the maximum value and the minimum value of the block are additional codes. The second encoding circuit has a circuit and encodes the difference data with m bits by using the maximum value and the minimum value generated from the first encoding circuit.

[0014]

A weighted average value is formed instead of a simple average value. The difference between the weighted average and the pixel data is formed.

Since the weighted average value obtained by local decoding is used as the weighted average value used to form the difference data, it is possible to prevent the quantization distortion from affecting all the decoded pixel data. .

When ADRC is used as the encoding, the additional data generated when the average value data is ADRC encoded is used for the ADRC encoding of the difference data, whereby the additional data can be reduced.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. This embodiment is an example of a digital video signal recording apparatus for recording an HD signal, for example, a high-definition signal on a magnetic tape by a rotary head.

FIG. 1 shows an encoding circuit provided in the recording circuit. In FIG. 1, reference numeral 1 is an input terminal of an HD signal to be recorded, and each pixel of this video signal is digitized into 8 bits. The HD signal is supplied to the block formation and average value generation circuit 2. In this circuit 2, T
The sampling cycle delay circuit represented by and the line cycle delay circuit represented by H include (2 × 2) 4-pixel data x1,
x2, x3 and x4 are synchronized.

In this embodiment, as shown in FIG.
The D signal is divided into (2 pixels × 2 lines) sub-blocks. Within the sub-block, pixel data x1, x2, x
3 and x4 are included. The size of the sub-block substantially corresponds to the resolution or the data amount ratio of the HD signal and the SD signal. For example, a high-definition signal, which is one of HD signals, has approximately twice the number of pixels in the horizontal direction and the number of lines in the vertical direction as compared with the current NTSC system, and has approximately four times the resolution. Therefore, the sub-block is composed of four pixels.

These pixel data are weighted by the weighting circuits by the weighting factors of w1, w2, w3 and w4, respectively, and then added by the adding circuit 3. From the adder circuit 3, a weighted average value of pixel data represented by the following equation is generated. Therefore, (4 × 4 = 16) weighted average values of FIG. 3 are formed from the area of (8 pixels × 8 lines) of FIG. If the weighted average value is y, then y = Σw _i x _i (1) (Σ means the sum from i = 1 to i = 4). However, Σw _i = 1.

The average value y is supplied to the subtraction circuit 7 and the average value encoding circuit 8 via the register 5. The pixel data x1 to x4 are transferred to the subtraction circuit 7 via the switching circuit 6.
Are sequentially supplied. The subtraction circuit 7 produces difference data Δx _i for each pixel. Weighted average value y of HD signal
Let Δi be the difference value of each pixel from Δi = Δ _i = x _i −y (2).

Here, Σw _i Δx _i = Σw _i (x _i −y) = Σw _i x _i −y Σw _i = 0 (3) Therefore, if y, Δx1, Δx2, and Δx3 are known, Δx4 = − (1 / w4) (Σ′w _i Δx _i ) (4) (Σ ′ is the total from i = 1 to i = 3. means.)
Thus, Δx4 can be obtained. Therefore, Δx4
It is possible to reduce the amount of data to be transmitted by omitting the transmission of. Of course,
Not limited to Δx4, transmission of any one of the four difference values can be omitted.

The average value y is supplied to the subtraction circuit 7 and the average value encoding circuit 8 via the register 5. The pixel data x1 to x4 are transferred to the subtraction circuit 7 via the switching circuit 6.
Are sequentially supplied. The subtraction circuit 7 produces difference data Δx _i for each pixel. The difference data is supplied to the difference value encoding circuit 9. The encoding circuits 8 and 9 are for compressing the data amount of the average value data and the difference value data, and for example, a quantizing circuit for compressing each data by requantization, an ADRC encoding circuit described later, or the like can be used. .
Although not shown, the coded output SDDT of the average value coding circuit 8 and the coded output HDDT of the difference value coding circuit 9 are supplied to the framing circuit. In the framing circuit, processing such as error correction coding and conversion of the data structure into recording data composed of sync blocks is performed.

The recording data output from the framing circuit is supplied to the rotary head via the channel encoding circuit, recording amplifier, etc., and recorded on the magnetic tape. As a method of recording data on the magnetic tape, for example, the track pattern of FIG. 4 can be adopted. That is, as the rotary head device, a device in which a pair of double azimuth heads having two gaps close to each other and facing each other by 180 ° are provided on the drum is used. Two tracks A and B are simultaneously formed on the tape by one double azimuth head, and then two tracks A ′ and B ′ are formed by the other double azimuth head. The data HDDT generated from the differential value encoding circuit 9 is recorded as tracks A and A ', and the data SDDT generated from the average value encoding circuit 8 is recorded as tracks B and B'.

In the case of the HD VTR, all the data of the track pattern can be reproduced and the HD signal can be reproduced by the decoding process. The SD VTR reproduces only tracks B and B'of the track pattern of FIG. Then, by decoding the reproduced data SDDT, average value data can be obtained. An SD image is restored from this average value data.

FIG. 5 shows an example of the configuration of a decoding circuit provided in the reproducing circuit of the digital VTR. Of the reproduction data reproduced from the tape and subjected to the processing such as channel decoding and error correction, the average value encoded data SDDT is supplied to the weighted average value decoding circuit 21, and the difference value encoded data in the reproduced data is also supplied. The HDDT is supplied to the difference value decoding circuit 22. The decoded output of the difference value decoding circuit 22 is supplied to the difference value calculation circuit 23. As described above, the difference value calculation circuit 23 obtains one difference value for which transmission is omitted from other difference values. The decoding weighted average value from the average value decoding circuit 21 and the output of the difference value calculating circuit 23 are supplied to the adding circuit 24. The addition circuit 24 forms decoded values of four pixels of the HD signal. In addition, the weighted average value decoding circuit 21
From, the decoded data (SD signal) of the weighted average value of 4 pixels
Is taken out.

Next, another embodiment of the present invention will be described. Another embodiment solves the problem that the coding distortion of the weighted average value is reflected in all four pixels. That is, the decoded value of the x _i is denoted by ^ x _i, the decoding value of y ^ y
In the differential value adding circuit 24 of the decoding circuit, the decoded value ^ x _i is formed by: ^ x _i = Δ ^ x _i + ^ y (5) In this way, the quantization distortion of the weighted average value y affects the decoded value of 4 pixels.

In order to solve this problem, in another embodiment, as shown in FIG. 6, the coded average value from the weighted average value coding circuit 8 is supplied to the local decoding circuit 10 so that the local decoded value ^ form y. This locally decoded value ^ y is supplied to the difference value calculation circuit 7 '. The difference value calculation circuit 7'uses the decoded value ^
y is used to form the difference value Δx _i . That is, Δx _i = x _i − ^ y (6)

This difference value is encoded by the encoding circuit 9, and is decoded on the reproducing side by the same configuration as that shown in FIG. Since the weighted average value decoded on the reproduction side is equal to the locally decoded value ^ y, it is possible to prevent the quantization distortion of the weighted average value from affecting the decoding of all the pixels when the decoding is performed by the calculation of the equation (5). it can.

Another embodiment is applicable when using a simple mean value. Further extending another embodiment, as part of the data used to form the weighted average y,
Locally decoded pixel data may be used instead of the actual data. As a result, when the transmission of one data is omitted, it is possible to prevent the quantization distortion generated in the decoded value of the other difference data from concentrating on that data.

Next, still another embodiment of the present invention will be described. In another embodiment, the average value encoding circuit 8 or the difference value encoding circuit 9 in FIG.
The C (dynamic range adaptive coding) method is applied. The ADRC encoding is proposed by the applicant of the present application and is an encoding adapted to the dynamic range which is the difference between the maximum value and the minimum value of the pixel data in the ADRC block. In this example, (4 × 4) data is ADR
It is a C block.

FIG. 7 shows an example of an ADRC encoding circuit applied to the weighted average value data. The average value data y in the order of blocks is supplied from the input terminal 31, and the detection circuit 32 detects the maximum value Max and the minimum value Min for each block. In the subtraction circuit 33, (Ma
x-Min + 1 = DR), the dynamic range DR
Is calculated. Further, the input data is supplied to the subtraction circuit 35 via the delay circuit 34 for timing adjustment. In the subtraction circuit 35, the minimum value Min is subtracted from the input data, and the data after the removal of the minimum value is obtained.

The data after the removal of the minimum value and the dynamic range DR are supplied to the quantizing circuit 36, and the data is quantized into a code signal having an n-bit length in accordance with the dynamic range DR. The quantization is Qj = [(Xj-Min + 0.5) × (2 ⁿ / DR)] rounded down (7) when the quantized value is Qj and the input data y is replaced with Xj.

Here again, if MAX '= Y (Q = 2 ^n-1 ) MIN' = Y (Q = 0) DR '= MAX'-MIN' is defined again, Qj = [(Xj-MIN ' ) × (2 ⁿ −1) / DR ′ +0.5)] rounded down (8). However, Y (Q = i) means the average of Y satisfying Q = i.

The quantization step width d at this time is d = DR '/ (2 ⁿ -1) (9). Therefore, the information amount ISD per block when the average value is ADRC encoded is ISD = 8 + 8 + 16n (10).

The ADRC as described above can also be applied to the differential data encoding circuit 9. However, as a coded output signal, the ratio of the dynamic range information is relatively large, which causes a problem that the compression efficiency is reduced. Yet another embodiment of the present invention is an AD.
The present invention is intended to solve the problem of such a reduction in efficiency when using RC.

Considering the process of obtaining the average value data, the dynamic range of the average value data is
The relationship is equal to or smaller than the dynamic range of the D signal. FIG. 11 shows the dynamic range of the SD signal and the HD signal in the case of (n = 3),
The relationship between the quantization step widths is shown. When encoding the difference value, if the quantization step for the SD signal, which is determined from the dynamic range information of the SD signal, is used as it is, very coarse quantization will be performed. Therefore, the quantization step width d'for the difference value is made finer.

That is, when the number of quantization bits of the difference data is represented by m bits, d '= ((MAX'-MIN') / 2) / 2 ^m-1 (11). Even with (n = m), the quantization step width d'for the difference value is determined based on 1/2 of DR ', so that the quantization step width can be made finer. If (n> m), (MAX'-MIN ') / k
The quantization step width d ′ may be determined based on (k> 2).

Therefore, the coded value Q _HD of the difference value is expressed by the following equation. Q _HD = [(Δx _i × (k / MAX'-MIN ') × (2 ^m-1 -1) ± 0.5)] rounding down (12) where ± x _i is positive + For value
0.5, and when this is a negative value, it becomes -0.5.

Now, the processing at the time of decoding will be described.
The restored value of the average value data is expressed by the following equation. ^ Xj = [Qj × (MAX'-MIN ') / (2 n -1) + MIN' + 0.5 ] truncated (13) Then, the restored value of the difference value, ^ [Delta] x _i = [Q _HD × (MAX ' -MIN ') / k × 1 / (2 ^m-1 -1)) + ^ Xj + 0.5] rounded down (14)

If the condition of the number of bits is (n <m), the equations (12) and (14) are modified as follows. Q _HD = [(Δx _i × 2 ^m-1 −1 / (MAX'-MIN ') ± 0.5)] rounded down (15) ^ Δx _i = [Q _HD × (MAX'-MIN') / (2 ^{m- 1} -1)) + ^ Xj + 0.5] rounded down (16)

FIG. 8 shows the configuration of still another embodiment of the present invention described above. The weighted average value y from the weighted average value calculation circuit 2 is supplied to the ADRC encoding circuit 8 '. ADR
The average value is coded by the C coding circuit 8'and MA
Coded outputs of X ', MIN', Qj are generated. The number of bits of the code signal is n. These are the data SDD
Transmitted as T. On the other hand, the difference value Δxi formed by the difference value calculation circuit 7 is supplied to the ADRC encoding circuit 9 '.

This ADRC encoding circuit 9'is composed of ADRC
The difference value is encoded using the additional data (dynamic range information) MAX 'and MIN' generated by the encoding circuit 8 '. What is transmitted as the data HDDT is the m-bit code signal Q _HD , and no additional data is transmitted. Therefore, it is avoided that the data amount of the data HDDT increases due to the additional data.

As shown in FIG. 9, the weighted average value locally decoded by the ADRC decoder 10 'is supplied to the difference value calculation circuit 7, and the difference value is obtained using this decoded value. good.

FIG. 10 shows the configuration of a decoding circuit corresponding to the encoding circuit shown in FIG. 8 or 9. The reproduced data SDDT is supplied to the ADRC decoding circuit 21 ', and SD
The additional data MAX 'and MIN' in DT are ADRC
It is supplied to the decoding circuit 22 '. ADRC decoding circuit 22 '
Is supplied with the reproduced data HDDT.

The ADRC decoding circuit 21 'includes MAX', M
Decode the weighted average from IN 'and Qj. The decoded average value data is output to the subsequent stage as an SD signal and is also supplied to the difference value adding circuit 7. The ADRC decoding circuit 22 'decodes the difference value data from MAX', MIN 'and Q _HD . The difference value adding circuit 7 adds the decoded difference value and the decoded average value and outputs an HD signal.

The embodiment using ADRC can be applied not only to the weighted average value but also to the simple average value.

[0048]

According to the present invention, a block having a size considering the resolution ratio of the two types of video signals is taken into consideration, and the data amount after encoding can be made substantially equal in both types. Further, since the average value information and the difference value data are encoded separately, an HD image can be constructed by decoding the average value information and the difference value information, and an SD image can be obtained by decoding only the average value information. Can be configured.

In particular, since the present invention uses the weighted average value, it is possible to reflect the difference in the degree of certainty of pixels in the weighting coefficient. In addition, since the difference value is encoded using the data obtained by local decoding, it is possible to prevent the quantization distortion of the average value data from affecting the decoded values of all the pixels at the time of decoding, or to prevent the distortion from being transmitted. It is possible to prevent concentration of the omitted pixels. Further, when the average value and the difference value are encoded by ADRC, the data amount of the additional data can be reduced by using the dynamic range information of the average value for encoding the difference value.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a schematic diagram showing a block composed of HD signals.

FIG. 3 is a schematic diagram showing a block composed of average values of HD signals.

FIG. 4 is a schematic diagram showing an example of a track pattern of this embodiment.

FIG. 5 is a block diagram of an example of a decoding device according to the embodiment.

FIG. 6 is a block diagram of another embodiment of the present invention.

FIG. 7 is a block diagram of an ADRC encoding circuit as an example of an encoding circuit.

FIG. 8 is a block diagram of still another embodiment of the present invention.

FIG. 9 is a block diagram of a modified example of still another embodiment of the present invention.

FIG. 10 is a block diagram of a decoding device according to still another embodiment of the present invention.

FIG. 11 is a schematic diagram used to describe yet another embodiment of the present invention.

[Explanation of symbols]

 2 Blocking and average value generation circuit 7 Subtraction circuit 8 Average value coding circuit 9 Difference value coding circuit 10 Local decoding circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kunio Kawaguchi 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Akemi Noda 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation

Claims (3)

[Claims] 1. A high-efficiency coding of a digital video signal supplied with a second standard video signal having a resolution higher than that of the first standard video signal, digitized, and then compressed and coded for transmission. In the apparatus, an averaging means for weighted averaging N pixel data which is approximately equal to a resolution ratio of the first and second standard video signals of the digital video signal, and a plurality of weighted average data from the averaging means. And a second encoding means for encoding data of respective differences between the N pixel data and the weighted average data, and the first and the second encoding means. A high-efficiency encoder for digital video signals, comprising means for transmitting the output of the second encoding means. 2. A high-efficiency coding apparatus for digital video signals according to claim 1, wherein said second coding means is obtained by locally decoding the average data coded by said first coding means. A high-efficiency coding apparatus for digital video signals, characterized by using the recorded data. 3. The high-efficiency encoding apparatus for digital video signals according to claim 1, wherein the first encoding means has an n-bit ADRC encoding means using the maximum value and the minimum value of a block as additional codes. , The second encoding means,
A high-efficiency coding apparatus for digital video signals, characterized in that difference data is coded in m bits by using the maximum value and the minimum value.