JPH06168887A - Thermal oxidation of semiconductor wafer - Google Patents

Abstract

PURPOSE:To realize a thermal oxidation method for semiconductor wafer in which a constant resistance can be attained over the entire surface of wafer while preventing n-type contamination by depositing a silicon based film on the surface of a semiconductor wafer by CVD prior to thermal oxidation processing. CONSTITUTION:Cleaning step proceeds in the order of light etching - SC-1 (ammonium hydrogen peroxide) cleaning for removing organic dust-SC-2 (sulfuric acid hydrogen peroxide) cleaning for removing metallic dust - light etching. SiO2 is then deposited on the surface of a silicon wafer by CVD. The silicon wafer is then cleaned and placed in a thermal oxidation furnace into which HCl, O2, N2 gases are introduced thus forming an oxide through thermal oxidation. This method provides a substantially constant sheet resistivity without causing n-type contamination of wafer regardless of the set position of wafer in the furnace or flow rate of oxidation gas.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for thermally oxidizing a semiconductor wafer, and more particularly to a heat treatment technique for preventing fluctuations in the resistance value of the semiconductor wafer.

[0002]

2. Description of the Related Art Conventionally, the problems to be solved by the invention
As a method of growing an oxide film on a silicon bare wafer, a silicon wafer is SC-1 (ammonia hydrogen peroxide), S
After cleaning with C-2 (sulfuric acid / hydrogen peroxide) to remove organic dust and metal dust, a method is used in which the dust is put into a furnace to grow a SiO film by thermal oxidation. At that time, it is well known that the clean room is easily contaminated with an n-type substance (for example, phosphorus). Therefore, due to the atmosphere around the oxidation furnace, the contamination of the silicon wafer from the furnace material, the diffusion of this contaminant within the wafer, and the contaminants brought into the wafer itself, the sheet resistance value of the wafer is There is a problem that the shutter for wafer loading / unloading drops sharply. This is because the thermal oxidation furnace is designed to accommodate a plurality of wafers arranged in parallel in the depth direction, so that the wafer on the inlet side of the furnace is exposed to the atmosphere around the furnace for a long time when it is inserted into the furnace. This is because.

As a measure against such a problem, a thin (about 20 Å) thermal oxide film is formed before the main thermal oxidation (for example, during wafer loading) so that the n-type material diffuses into the wafer. Some attempts have been made to prevent the blocked N-type, but such a thin film cannot prevent the diffusion of the n-type substance, and is sensitive to the impurity profile of the charge-coupled image sensor (CCD). Such devices are not enough, and the same is true for highly integrated next-generation memories.

The present invention was devised in view of such conventional problems, and prevents thermal contamination of n-type and thermal oxidation of a semiconductor wafer capable of obtaining a constant resistance value over the entire surface of the wafer. Its purpose is to provide a method.

[0005]

The invention according to claim 1 of the present application is a method of thermally oxidizing a semiconductor wafer, wherein the surface of the semiconductor wafer is thermally oxidized to form an oxide film. Before the CVD on the surface of the semiconductor wafer
A method of solving this is to deposit a silicon-based film by the method.

According to the second aspect of the present invention, the silicon-based film formed on the surface of the semiconductor wafer by the CVD method is Si.
It is an O ₂ film.

[0007]

The invention according to claim 1 of the present application deposits a silicon-based film on the surface of a semiconductor wafer by the CVD method, so that a wafer of, for example, phosphorus (P) is removed during the subsequent thermal oxidation treatment. It has an effect of preventing diffusion of a substance to be n-type into the wafer. Therefore, it is possible to make the resistance value constant between the wafers that are exposed to the contaminated atmosphere or the like for different times.

According to the second aspect of the present invention, the CVD-SiO film prevents the entry of contaminants during the thermal oxidation process. Since the diffusion coefficient of phosphorus (P) in this CVD-SiO ₂ is as small as 0.1 at 1100 ° C., the CVD-Si
Phosphorus (P) is less likely to diffuse in the O ₂ film and has a high effect of preventing the arrival of phosphorus (P) to the semiconductor wafer.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the method for thermally oxidizing a semiconductor wafer according to the present invention are shown in the drawings below. A description will be given based on examples.

In this example, a silicon bare wafer was prepared and the process shown in the flow chart of FIG. 1 was performed.

First, the cleaning was carried out in the order of light etching → SC-1 (ammonia / hydrogen peroxide) cleaning for removing the organic duct → SC-2 (sulfuric acid / hydrogen peroxide) cleaning for removing the metal duct → light etch. .

Next, a SiO ₂ film is deposited on the surface of the silicon wafer by the CVD method so as to have a film thickness of 500 Å. This CV
The D condition is as shown below.

[0013] (CVD conditions) and normal pressure CVD, CVD gas _{-SiH 4, O 2, SiH 4} : O 2 = 1: 11 · carrier gas -N ₂ - Temperature -410 ° C. Then, after performing cleaning , SiSi wafer is put into a thermal oxidation furnace, Hcl, O ₂ and N ₂ gases are introduced and thermally oxidized to form an oxide film with a thickness of 1800Å. In the silicon wafer thermally oxidized in this manner, contaminants are CVD-SiO ₂
Since the film is blocked, the impurities are diffused in the wafer, so that the impurities are not diffused in the wafer.

Next, in order to evaluate the wafer processed by such a method, the sheet resistance was measured by the following evaluation method.

(1) The silicon wafer has a high resistance Psub.
> 1000 Ω · cm is used.

(2) Pre-cleaning (light etch → SC-1 →
(SC-2 → light etch) (3) CVD-SiO ₂ film thickness of 500Å and 1000Å
Make a sample of.

(4) An oxide film pull having a film thickness of 1800Å is formed by hydrochloric acid oxidation. At this time, slight O ₂ 140cc and 650cc
Make a sample of the conditions.

(5) The oxide film is removed with buffer hydrofluoric acid.

(6) Sheet resistance measurement (Omnimap VR
-30) The measurement results are shown in the graphs of FIGS. Figure 2
3 and FIG. 3 show the variation and the minimum value of the sheet resistance.

4 to 6 show the sheet resistance (source side, center, furnace inlet side) in the wafer.

From the graph showing the variation of the sheet resistance shown in FIG. 2, it can be seen that the wafer having the CVD-SiO ₂ film covered with a film thickness of 500 Å has the highest sheet resistance value.
However, it can be seen that the increase in the sheet resistance value is significantly suppressed as compared with the comparative example. In addition, the variations in the resistance values on the furnace source side (S), the furnace center (C), and the furnace inlet side (H) are small. Furthermore, the flow rate of slight O ₂ is 14 rather than 650 cc.
It was found that 0 cc did not contribute to n-type conversion.

From the graph showing the minimum sheet resistance value shown in FIG. 3, it can be seen that there is a large variation in the resistance value of the comparative example. Further, the wafer in which the CVD-SiO ₂ film was covered with a film thickness of 500 Å had a small in-plane variation of the resistance value regardless of the setting position in the thermal oxidation furnace, which was a good result.

From the graphs of FIGS. 4 to 6, in the comparative example, the sheet resistance value is considerably high (partially unmeasurable), which shows a sharp decrease in the resistance value on the orientation flat side, which is an n-type. I understand. However, CVD-Si
In the wafer covered with the O ₂ film, there was no large change in the resistance value in the plane, the resistance value was uniform, and the resistance value on the orientation flat side did not decrease. Therefore, it is understood that it is not n-type.

Although the embodiment has been described above, the present invention is not limited to this, and various design changes accompanying the gist of the configuration can be made.

For example, in the above embodiment, the CVD-
Although SiO ₂ was set to 500Å, the film thickness is 200Å to 20 considering the effect of blocking the invasion of impurities.
It will be possible in the range of 00Å.

In the above embodiment, atmospheric pressure CVD is used.
A SiO ₂ film was deposited by the method of ECR-CV.
It may be deposited by means such as the D method.

Further, in the above embodiment, the SiO ₂ film is used as the silicon-based film, but it is also possible to use a polysilicon film by the CVD method. However, since the diffusion coefficient of phosphorus (P) in polysilicon is 0.6 at 1100 ° C., which is larger than that of SiO ₂ , the effect of preventing the intrusion of impurities is slightly small.

Further, it goes without saying that the thermal oxidation furnace for the wafer may not be the one described above, and the present invention can be applied to each type of thermal oxidation.

[0029]

As is apparent from the above description, according to the inventions of claims 1 and 2, the wafer is n-type contaminated without being influenced by the wafer set position in the furnace and the flow rate of the oxidizing gas. The effect is that a substantially constant in-plane resistance value can be obtained. As described above, by suppressing the diffusion of impurities into the wafer when the oxide film is formed, it is possible to produce a semiconductor device having good element characteristics.

[Brief description of drawings]

FIG. 1 is a flowchart of an embodiment of the present invention.

FIG. 2 is a graph showing the degree of variation in sheet resistance.

FIG. 3 is a graph showing the minimum sheet resistance value.

FIG. 4 is a graph showing in-wafer sheet resistance of a wafer set on the furnace source side.

FIG. 5 is a graph showing in-wafer sheet resistance of a wafer set in a furnace center.

FIG. 6 is a graph showing the in-wafer sheet resistance of a wafer set on the furnace inlet side.

Claims (2)

[Claims] 1. A method for thermal oxidation of a semiconductor wafer, which comprises subjecting a surface of a semiconductor wafer to a thermal oxidation treatment to form an oxide film, wherein the surface of the semiconductor wafer is subjected to C oxidation before the thermal oxidation treatment.
A thermal oxidation method for a semiconductor wafer, which comprises depositing a silicon-based film by a VD method. 2. The thermal oxidation method for a semiconductor wafer according to claim 1, wherein the silicon-based film is a SiO ₂ film.