JPH06168799A - Timing control device - Google Patents

Abstract

PURPOSE:To realize low cost through simplification of a device, and reduce influence of an electrical noise by causing a timing pulse of a signal to a charged particle accelerator to be outputted on the basis of a trigger pulse. CONSTITUTION:Each type of pulse equipment of an accelerator for accelerating a charged particle is supplied with a signal from a pulse power supply 40. In addition, the timing of output from the power supply 40 is determined by a delay signal generated in a timing pulse generator 37 having a plurality of output channels, on the basis of the prescribed cycle of a trigger pulse outputted from a reference signal generator 36 under control by a computer 41. This timing pulse, after finely tuned with a delay circuit 38, is fed to the power supply 40 via an insulating amplifier 39. According to this construction, a device can be substantially simplified, compared with the constitution of a device requiring the number of subtraction counters corresponding to the number of pulse equipment. As a result, low cost can be realized, and the influence of an electrical noise can be reduced. In this case, a trigger pulse may be synchronized with the frequency of a commercial AC power supply line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timing controller for controlling the timing of signals to various pulse devices such as linacs and deflector electromagnets in a particle accelerator that accelerates charged particles to high energy.

[0002]

2. Description of the Related Art FIG. 11 shows, for example, JP-A-64-4839.
FIG. 12 is a block diagram showing a conventional timing control device shown in Japanese Unexamined Patent Publication No. 6-74, and FIG. 12 is a plan view showing an example of a particle accelerator to which the timing control device is applied. 12
In the above, 1 is a linear accelerator (hereinafter referred to as linac) as a pulse device that outputs a beam of charged particles having a predetermined kinetic energy, for example, an electron beam, and 2
Is a synchrotron as an accelerating ring for accelerating the electron beam output from the linac 1, and 3 is a synchrotron radiation (hereinafter referred to as SR) ring as a storage ring for accumulating the electron beam accelerated by the synchrotron 2. Is.

In the synchrotron 2, 10 is an inflector as a pulse device for deflecting and injecting an electron beam from the linac 1 with an electric field, and 11 is for circulating the incident electron beam in a ring. It is a bending electromagnet that deflects with a magnetic field. Reference numeral 12 is a high-frequency accelerating cavity for accelerating an electron beam circulating in the ring, 13 is a deflector electromagnet as a pulse device for taking out the accelerated electron beam, and 14 is this deflector electromagnet 13.
In addition, it is a kicker electromagnet as a pulse device used for emitting an accelerated electron beam.

In the SR ring 3, 11 is the deflecting electromagnet, and 15 is an SR inflector as a pulse device for injecting the accelerated electron beam emitted from the synchrotron 2 to high energy. 16
Is a high-frequency accelerating cavity for accelerating the accumulated electron beam to replenish the energy lost due to radiation loss, and 17 is a pertabeta electromagnet as a pulse device for making an incident orbit when the electron beam is incident. is there.

In FIG. 11, reference numeral 18 denotes a magnetic field measuring deflecting electromagnet which has exactly the same structure as the deflecting electromagnet 11 and is connected in series with them, and 19 is connected to the magnetic field measuring deflecting electromagnet. It is a bending electromagnet power supply. 20
Is a detection coil for detecting the magnetic field generated by the deflection electromagnet 18 for measuring the magnetic field, and 21 is a magnetic field detection device for generating the master pulse P based on the detection signal from the detection coil 20. Reference numeral 22 is a clock oscillator that generates a clock C, 23 is a D-type flip-flop that detects the rising edge of the master pulse P (where it changes from "L" to "H"), and ANDs with the clock C, and 24 is This D
It is an AND circuit that takes the logical product of the output of the type flip-flop 23 and the master pulse P.

25 _{1 to} 25 ₄ are drivers for distributing the output signals of the AND circuit 24 to generate the synchronous clocks C _{1 to} C ₄ , and 26 _{1 to} 26 ₄ are synchronous clocks C from the drivers 25 _{1 to} 25 _4. It is a subtraction counter that sequentially decreases the count value each time it receives _{1 to} C ₄ and generates an output signal when the count value becomes zero. 27 _{1 to} 27 ₄ are delay circuits for delaying the outputs of the subtraction counters 26 _{1 to} 26 ₄ , and 28 _{1 to} 28 ₄ are delay circuits 27 _{1 to} 27 _{4 respectively.}
It is a pulsar that operates pulse devices such as the deflector electromagnet 13, the kicker electromagnet 14, the SR inflector 15, the pertabeta electromagnet 17, and the like based on the output signal of.

Next, the operation will be described. Linac 1
Outputs an electron beam having a predetermined kinetic energy.
The electron beam output from the linac 1 is electrostatically deflected by the inflector 10 and enters the synchrotron 2. A deflection electromagnet 11 is provided in the synchrotron 2.
Are arranged in the shaded area in the figure, whereby the electron beam incident from the linac 1 is deflected to orbit the inside of the ring. Therefore, the electron beam is controlled so as to be within a predetermined orbit by the magnetic field generated by the deflection electromagnet 11.

The orbiting electron beam is a high frequency acceleration cavity 12
Will be accelerated when passing through. The electron beam accelerated to a high energy emits synchrotron radiation (SR) when passing through the deflecting electromagnet 11 and loses energy. Therefore, the electron beam is accelerated to correct the energy loss.
Further, the incident beam is bunched by the high-frequency acceleration cavity 12 to generate a high electron density portion and a low electron density portion on the orbit. Of course, as the energy of the electron beam increases, the magnetic field strength of the deflection electromagnet 11 also increases (accurately, the electron beam is accelerated so as to have energy matching the magnetic field strength of the deflection electromagnet 40).

The electron beam having reached a predetermined energy is taken out of the synchrotron 2 out of the orbit in the synchrotron 2 by the magnetic field generated by the kicker electromagnet 14 and the deflector electromagnet 13. The electron beam extracted here reaches the SR ring 3 and S
The magnetic field generated by the R inflector 15 and the perturbator electromagnet 17 enters the orbit in the SR ring 3. At this time, as in the case of the synchrotron 2 described above, a plurality of deflection electromagnets 11 are properly arranged in the SR ring 3, and a magnetic field corresponding to the energy of the incident electron beam is generated in advance. The electron beam is controlled by this magnetic field so as to be within a predetermined orbit.

The high-frequency acceleration cavity 16 in the SR ring 3 is an electron beam accelerator similar to the high-frequency acceleration cavity 12 in the synchrotron 2, and controls the electron beam to keep a constant energy. In short, the energy loss due to the emission of SR of the electron beam accumulated in the SR ring 3 is compensated.

As described above, in the particle accelerator using the synchrotron, various pulse electromagnets and the like are used for emitting and injecting the beam. These pulse devices are
The timing of the applied pulse signal is different, and the optimization is generally performed through a beam test. Therefore, it is necessary that the timing of the trigger pulse for all pulse devices can be adjusted. In this timing control, the highest speed / highest accuracy is required when the electron beam is made incident on the SR ring 3 from the synchrotron 2. Since the deflection electromagnet 11 is set to a magnetic field corresponding to a predetermined energy in the SR ring 3, the synchrotron 2 must accurately emit an electron beam with that energy. Therefore, it is necessary to accurately measure the magnetic field strength of the deflection electromagnet 11 of the synchrotron 2 which changes with time and emit the electron beam when the predetermined magnetic field strength is reached.

The coils of the deflection electromagnet 11 are connected in series and are energized by the deflection electromagnet power source 19 in a predetermined energization pattern. The central magnetic field of the magnetic poles generated by the deflection electromagnet 11 cannot be directly detected because it is in the orbit of the electron beam. Therefore, in an actual particle accelerator, a magnetic field measuring deflecting electromagnet 18 having exactly the same structure as the deflecting electromagnet 11 is added in series, and instead of the central magnetic field of the deflecting electromagnet 11 by the detection coil 20, the magnetic field measuring deflecting electromagnet 18 is replaced. The time change of the central magnetic field is detected as a voltage signal. When the magnetic field detection device 21 integrates the voltage signal detected by the detection coil 20 to detect the magnetic field generated by the bending electromagnet 11, and when the generated magnetic field thus obtained reaches a preset predetermined value. Then, the magnetic field detection device 21 outputs the master pulse P. The master pulse P is input to the D-type flip-flop 23, and the clock C having a 20 ns cycle from the clock oscillator 22 is input to the D-type flip-flop 23.

The D-type flip-flop 23 detects the rising edge of the master pulse P, calculates a logical product with the clock C, and outputs the logical product to the AND circuit 24. AND circuit 24
Takes the logical product of the input from the D-type flip-flop 23 and the master pulse P, branches it by a predetermined number, and inputs it to the drivers 25 _{1 to} 25 ₄ . Driver 25 _{1 to} 25 ₄
Uses it as the synchronization clocks C _{1 to} C ₄ for the subtraction counter 2
Outputs 6 _{1-26 4,} the subtraction counter 26 _{1-26 4} starts subtraction of the count value by receiving the synchronization clock C ₁ -C _4. In this way, since the synchronous clocks C2, C3, C4, and C5 are simultaneously input to the subtraction counters 26 _{1 to} 26 ₄ , each subtracts the count value every clock, and the subtraction of the count value is completed. And becomes zero, each of the subtraction counters 26 _{1 to} 26 ₄ outputs the delay circuit 27 ₁ to
Output to 27 ₄ .

[0014] Here, the delay circuit 27 ₁ to 27 ₄ by a time of at least one cycle of the clock C as described above, to use a settable delay time, for example, every 1 ns. As a result, a fine delay adjustment within one cycle of the clock C can be performed. A signal delay adjustment is performed pulser 28 ₂₁ to
Outputs to 8 _4, after converting into a predetermined signal, each kicker magnet 14, sent to the deflector electromagnets 13, SR inflector 15, and perturbator electromagnet 17 such as a pulse equipment operating them.

[0015]

Since the conventional timing control device is constructed as described above, not only the subtraction counters 26 _{1 to} 26 ₄ are required for the number of pulse devices but also the pulsers 28 _{1 to} 28 ₄ are required. Since the pulse from is directly transmitted to the pulse device, it is easily affected by noise, and in addition to the deflection electromagnet 11, an additional deflection electromagnet 18 for magnetic field measurement is provided to measure a magnetic field that changes with time, Since a master pulse is generated when a predetermined magnetic field is reached, there is a problem that the device configuration becomes complicated and the cost increases.

The present invention has been made to solve the above problems, and an object of the present invention is to obtain a timing control device which is less susceptible to noise with a simpler device configuration.

[0017]

According to a first aspect of the present invention, there is provided a timing control device which outputs a pulse signal from a plurality of output channels with a preset time delay based on a trigger pulse having a predetermined cycle. The output timing pulse generator is provided on the input side of the delay circuit for finely adjusting the timing of the pulse signal, and the delay circuit and the pulse device are electrically insulated by an insulating means.

The timing control device according to the invention described in claim 2 is synchronized with the frequency of the commercial AC line,
A reference signal generator for generating a trigger pulse to the timing pulse generator is provided.

Further, in the timing control device according to the invention as defined in claim 3, the pulse signal output from one output channel of the timing pulse generator is shared by several pulse devices.

According to a fourth aspect of the present invention, in the timing control device, a power supply output pattern to be sent to an AC power supply such as a high frequency power supply and a bending electromagnet power supply is written in a memory device in advance, and the AC power supply timing controller causes a timing pulse The output clock generated based on the pulse signal from the generator is sequentially discharged, and the timing pulse generator determines the timing of the pulse signal to each delay circuit based on the pulse signal to the AC power supply timing controller. It has a function to do.

The timing control device according to a fifth aspect of the present invention includes an AC power supply timing controller,
A clock circuit that starts the output clock generation with the pulse signal from the timing pulse generator and stops with the borrow signal, and a pulse number setting circuit that sends the borrow signal to the clock circuit when the output clock generated by the clock circuit reaches a predetermined number. It is composed of and.

A timing control device according to a sixth aspect of the present invention includes an AC power supply timing controller,
It is composed of a gate circuit that generates a gate signal for a predetermined time width upon reception of a pulse signal from a timing pulse generator, and a clock circuit that continuously generates an output clock for the time width of the gate signal.

In the timing control device according to the present invention, the AC power supply timing controller has a function of stopping the output of the output clock from the clock circuit when the beam current exceeds the reference value. It is a thing.

Further, in the timing control device according to the invention described in claim 8, the pulse signal is supplied to the output channel from which the pulse signal to the kicker power source of the timing pulse generator is output as a high frequency voltage for accelerating the charged particles. A synchronizing circuit is connected to synchronize the phase.

[0025]

In the timing pulse generator according to the present invention, the pulse signals are sequentially output from the plurality of output channels with a predetermined time delay based on the trigger pulse sent in a predetermined cycle. This greatly simplifies the device configuration, and the insulating means electrically insulates the delay circuit for fine adjustment of the timing of the pulse signal from the pulse device, thereby reducing the influence of electrical noise. Make it hard to receive.

Further, the reference signal generator in the invention described in claim 2 synchronizes the trigger pulse to the timing pulse generator with the frequency of the commercial AC line,
Increase the stability of the pulse power supply.

The timing pulse generator according to the third aspect of the present invention simplifies the device configuration by sharing the pulse signal output from one output channel with several pulse devices.

Further, the timing pulse generator in the invention described in claim 4 is an AC power supply which generates an output clock for sequentially discharging the power supply output pattern to the AC power supply written in the memory device in advance. The reference pulse signal is sent to the timing controller, and the timing of the pulse signal to each delay circuit is determined based on the pulse signal.

In the AC power supply timing controller according to the invention described in claim 5, the pulse signal from the timing pulse generator is received to start the output of the output clock by the clock circuit, and the output clock output from the clock circuit is When the predetermined number is reached, the output of the output clock is stopped by the borrow signal output from the pulse number setting circuit, thereby generating the output clock for discharging the power supply output pattern from the memory device.

According to the sixth aspect of the invention, the AC power supply timing controller outputs from the clock circuit during the time width of the gate signal generated by the gate circuit for a predetermined time after the pulse signal is received from the timing pulse generator. By outputting the clock, an output clock for discharging the power supply output pattern from the memory device is generated.

According to the seventh aspect of the invention, the AC power supply timing controller compares the beam current with the reference value, and stops the generation of the output clock from the clock circuit when the beam current exceeds the reference value. By doing so, the acceleration ring and the storage ring can be shared by the same ring.

According to the eighth aspect of the present invention, the synchronizing circuit synchronizes the pulse signal sent from the timing pulse generator to the kicker power source with the phase of the high-frequency voltage for beam acceleration, thereby extracting the number of bunches. To make the operation stable.

[0033]

【Example】

Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. 1 is a block diagram showing a general timing control device according to an embodiment of the present invention, and FIG. 2 is a plan view showing an example of a particle accelerator in which the timing control device of the present invention is used. In FIG. 2, 1 is a linac, 2 is a synchrotron as an acceleration ring, 3 is an SR ring as a storage ring, 10 is an inflector, 11
Is a deflecting electromagnet, 12 is a high frequency accelerating cavity, 13 is a deflector electromagnet, 14 is a kicker electromagnet, 15 is an SR inflector, and 16 is a high frequency accelerating cavity. Therefore, detailed description will be omitted.

30 to 32, together with the inflector 10,
A pertabeta electromagnet as a pulse device used for injection of a charged particle beam from the linac 1, for example, an electron beam. Numerals 33 and 34 are quadrupole electromagnets for focusing the electron beam circulating in the synchrotron 2, and two quadrupole electromagnets of different polarities (hereinafter, QF3
3 and QD34) together with the bending magnet 11
They are arranged in a periodic structure. 35 is the SR inflector 1
5 is an SR kicker electromagnet as a pulse device used for injection of an electron beam accelerated with high energy by the synchrotron 2 together with 5. A particle accelerator composed of such a linac 1, a synchrotron 2, and an SR ring 3 is called an SR device.

Further, in FIG. 1, reference numeral 36 is a reference signal generator for generating a trigger pulse at a predetermined cycle, and 37 is provided with a plurality of output channels, and a trigger sent from the reference signal generator 36. It is a timing pulse generator that receives a pulse and sequentially outputs a pulse signal from each output channel at a predetermined time interval. 38 is a delay circuit for finely adjusting the timing of the pulse signal output from each output channel of the timing pulse generator 37, and 39 is each delay circuit 3
8 is an isolation amplifier which is connected to 8 and electrically insulates the input side and the output side from each other. Reference numeral 40 denotes a pulse power source for various pulse devices such as a kicker electromagnet, which is connected to each delay circuit 38 via each isolation amplifier 39.
Reference numeral 1 is a computer as a control means for controlling the timing pulse generator 37.

FIG. 3 is a block diagram showing a concrete example in which the general timing control device shown in FIG. 1 is applied to the particle accelerator shown in FIG. The same reference numerals are given and the description thereof is omitted. In the figure, reference numeral 42 is an AC power supply timing controller that generates an output clock based on a pulse signal output from one of the output channels of the timing pulse generator 37. Reference numeral 43 denotes a memory device in which power supply output patterns to be sent to various AC power supplies to be described later are written in advance, and the power supply output patterns are sequentially discharged in accordance with the output clock from the AC power supply timing controller 42. 44 _{1 to} 44 ₄ are the above-mentioned AC power source, 44 ₁ is a high frequency power source sent to the high frequency acceleration cavities 12 and 16, and 44
₂ is a deflection electromagnet power source sent to the deflection electromagnet 11, 44 ₃
Is a QF power source sent to the QF 33, and 44 ₄ is a QD power source sent to the QD 34. In addition, each of these AC power sources 44
_{1-44 4} is the same be referred to as a pulsed power supply.

[0037] Incidentally, each of the pulse power with numeral 40 _{1-40 9} linac power 40 ₁ is sent to the linac 1, 40 ₂ inflector power sent to the inflector 10, 40 _{3-40 5} A pertabeta power source sent to each of the pertabeta electromagnets 30-32.
40 ₆ is a deflector power supply sent to the deflector electromagnet 13, 40 ₇ is an SR inflector power supply sent to the SR inflector 15, 40 ₈ is a kicker power supply sent to the kicker electromagnet 14, 40 ₉ is SR sent to the SR kicker electromagnet 36 It is a kicker power supply. Each of these pulse power supplies 4
The respective delay circuits connected to 0 ₁ to 40 ₉ via the isolation amplifier 39 are denoted by reference numerals 38 _{1 to} 38 ₉ with corresponding suffixes. Further, reference numeral 45 is a computer for writing the power output pattern in the memory device 43, and the AC power supply timing controller 42 and the memory device 43 are also electrically insulated by the isolation amplifier 39.

Next, the operation will be described. S shown in FIG.
The R device accelerates electrons to high energy using the linac 1 and the synchrotron 2 and accumulates them in the SR ring 3,
It supplies synchrotron radiation (SR) obtained from a high energy electron beam. SR is used for material analysis and semiconductor lithography. The linac 1 and the synchrotron 2 are operated at a repetition rate of 2 Hz.
The electron beam is injected into the SR ring 3 at a frequency of 2 Hz, and when the electron beam is sufficiently accumulated, the linac 1
And the operation of synchrotron 2 is stopped. Since the electron beam accumulated in the SR ring 3 gradually loses energy due to collision with residual gas, when the intensity of the electron beam decreases to a certain value, the linac 1 and the synchrotron 2 are operated again, The electron beam injection is restarted.

The linac 1 is supplied with microwaves from the linac power supply 40 _1, and the microwaves generate electrons of 20M.
Although the electron beam is accelerated to eV, the time that can be incident on the synchrotron 1 is 2 to 3 μs. Therefore, the pulse operation is performed so that the pulse width of the electron beam is almost the same.

The electron beam emitted from the linac 1 enters the synchrotron 2 through the inflector 10. The inflector 10 requires a high voltage and the inflector power supply 40 ₂ is pulsed to avoid discharge. The incident electron beam is lost by colliding with the electrode of the inflector 10 as it is, so that the magnetic field is generated only by the incidence of the three pertabeta electromagnets 30, 31, 32 to orbit the electron beam.
The magnetic field waveforms of the pertabeta electromagnets 30, 31, and 32 are half-sine waves, and since the electron beam is incident by using the trailing edge thereof, the pulse width thereof is about twice the pulse width of the beam. Each of these pertabeta electromagnets 30, 31, 32
Are pulse-operated by the perturbator power sources 40 ₃ , 40 ₄ , and 40 ₅ , respectively. Also, the pertabeta electromagnet 3
The number of 0, 31, 32 depends on the device, and 1 to 4 units are used.

The incident electron beam is reflected by six deflection electromagnets 1.
Although it is deflected by 1 and orbits, the electron beam must be focused by six QFs 33 and QDs 34 in order to stably orbit the electron beam. These are connected in series in an electric circuit, and therefore, the AC power supplies are three units of the bending electromagnet power supply 44 ₂ , the QF power supply 44 ₃ and the QD power supply 44 ₄ . A high frequency accelerating cavity 12 is used to accelerate the orbiting beam. When the energy of the electron beam changes due to the acceleration, the trajectory of the electron beam changes, so the magnetic field strengths of the deflection electromagnet 11 and the QFs 33 and QD 34 must be changed according to the beam energy. In reality, in the electron synchrotron, the electron beam is accelerated so as to correspond to the magnetic field strength.

Bending electromagnet 11 and QF33, QD34
The outputs of the AC power supplies 44 ₂ , 44 ₃ and 44 ₄ are synchronized with each other in order to accelerate the electron beam without loss.
It must be controlled accurately. In addition, since the beam capture efficiency is higher if the accelerating voltage is changed depending on the energy,
The high-frequency power source 44 _{1 is} also the three AC power sources 44 ₂ , 44
Synchronize with ₃ , 44 ₄ . Therefore, the control is performed using the memory device 43 as shown in FIG. That is, these AC power source 44 _{1-44 4} outputs a current or high-frequency voltage proportional thereto Given an arbitrary reference signal. Therefore, when the required power supply output pattern is determined, the reference signal pattern of one cycle required for it is divided into about 65000 and digitized, and written in the memory device 43 in advance using the computer 45. During the synchrotron operation, the power supply output patterns written in the memory device 43 are discharged one by one by the output clock from the AC power supply timing controller 42, converted into analog signals, and the AC power supplies 44 ₁ to 44 ₁ as the reference signals. ₄ 44 and input. By doing so, the four AC power sources 44 ₁ to 4
4 ₄ can perform synchronized output. In practice, the required reference signal is _{1 for} each AC power supply 44 ₁ -44 _4.
Since there are several types, such as voltage patterns, rather than types, the number of memory modules also varies accordingly.

The AC power supply timing controller 42 will be described below. As shown in the schematic configuration of FIG. 4, the AC power supply timing controller 42 includes a clock circuit 50 that can set an arbitrary clock cycle and a pulse number setting circuit 51 that is a subtractor. When receiving the pulse signal from the timing pulse generator 37, the clock circuit 50 starts clock output. This output clock is also sent to the pulse number setting circuit 51, and the pulse number setting circuit 51 starts subtraction of the set value. When the pulse number setting circuit 51 receives a preset pulse number, it generates a borrow signal (pulse) and inputs it to the clock circuit 50.
When the clock circuit 50 receives this borrow signal, it stops the output pulse that was continuously output. Therefore, the clock cycle is set so that the value obtained by multiplying the set number of the pulse number setting circuit 51 by about 65000 by the clock cycle of the clock circuit 50 is smaller than the cycle of the reference signal generator 36.

The electron beam is bunched when it is accelerated, and its interval depends on the operating frequency of the high-frequency acceleration cavity 12, but since this SR device is 130 MHz,
They are lined up at 7.7 ns intervals. Further, since the time required for the electrons to make one round is about 115 ns, 15 bunches are connected. The accelerated electron beam is emitted using the kicker electromagnet 14 and the deflector electromagnet 13.
The deflector electromagnet 13 is a deflection electromagnet having a narrow gap, which is 40 mm outside the beam center trajectory, and is kicked out by a kicker electromagnet 14 so that the electron beam enters the gap. Therefore, if the magnetic field waveform of the kicker electromagnet 14 is a rectangle with a rise time of zero, all 15 bunches can be taken out. However, in reality, the rise time is finite, and the bunch that has passed through the kicker electromagnet 14 until reaching a predetermined magnetic field strength collides with the vacuum chamber or the like and is lost. Therefore, the kicker electromagnet 1
The magnetic field waveform of 4 must be a fast pulsed magnetic field with a very fast rise. In this SR device, the rise time is about 40 ns, and 10 pulses can be extracted. On the other hand, the magnetic field of the deflector electromagnet 13 may be a DC magnetic field because it does not affect the orbiting beam, but a pulse current is generally used because of a cooling problem because a very large coil current is required. The pulse width is 1 to 2 ms, which is a half-sine wave.

The emitted electron beam is transmitted through the SR inflector 15 and the SR kicker electromagnet 35 to the SR ring 3
Is incident on. The SR inflector 15 has a structure similar to that of the deflector electromagnet 16, and the pulse magnetic field is almost the same. In addition, the SR kicker electromagnet 35 has a role of the pertabeta electromagnets 30, 31, in the synchrotron 2.
It is the same as 32, but it is called the same kicker electromagnet as the synchrotron 2 because a pulse with a fast rise is required because the circumference of the SR ring 3 is short and a high magnetic field is required because the beam energy is high. The pulse width is several hundred ns, but the timing width at which the beam can be incident is several tens of n.
s, the kicker electromagnet 14 of the synchrotron 2
It must be possible to adjust with the timing and a few ns or less.

As described above, many pulse devices are used in this SR device. FIG. 5 graphically shows these. FIG. 5A shows a change in the magnetic field strength of the deflecting electromagnet 11, or a change in beam energy equivalent thereto, and FIG.
FIG. 5C shows the time relationship between the beam pulse, the pulse voltage, and the pulse magnetic field by expanding the time at the time of extraction.

Here, the magnetic field waveform of the deflecting electromagnet 11 is a waveform close to a trapezoidal wave having a period of 2 Hz to be exact.
The scale shown in (a) may be considered as a triangular wave. The electron beam is incident at the lowest magnetic field without intensity change or at a slightly increased point. In order to increase the incidence efficiency, as shown in FIG. 5 (b), three perturbator electromagnets 30,
The timings of 31 and 32 are adjusted independently. Also, the timing for the beam pulse is important, and its adjustment is 3
The timing of the pertabeta electromagnets 30, 31, 32 of the table must be changed equally. After that, the beam is extracted with the required energy, but as shown in FIG. 5C, the timing of the kicker electromagnet 14 with respect to the timing of the deflector electromagnet 13 also needs to be adjusted, and the kicker electromagnet for fine adjustment of the extraction energy. The timing of 14 may be adjusted. Similarly, the timing of the SR inflector 15 and the SR kicker electromagnet 35 must be adjusted.

As described above, the output timing to these pulse devices has a great influence on the incidence efficiency and the emission efficiency of the electron beam, and therefore must be adjusted accurately. Therefore, in the timing pulse generator 37, those timings are input in advance by using the computer 41, and the timing pulse generator 37 outputs the pulse signal based on the trigger pulse from the reference signal generator 36. FIG. 3 is a block diagram of a timing control device applied to the SR device shown in FIG.

Here, the description of the timing pulse generator 37 will be added. When a trigger pulse is received from the reference signal generator 36, the pulse signal is first output from the first output channel with a set time delay, and then the pulse signal is output from the next output channel with a set time delay. Thereafter, the pulse signals are sequentially output to each of the last output channels with respective time delays. Then, the next trigger signal from the reference signal generator 36 causes the pulse signals to be sequentially output from the first output channel. Therefore, the time interval between the first output pulse signal and the last output pulse signal must be within the period of the trigger pulse from the reference signal generator 36. These time intervals can be input in advance by the computer 41. Also, without using the reference signal generator 36,
The calculator 41 can also serve as the reference signal generator 36.

[0050] The timing pulse generator 37 is like that contains collectively subtraction counter 26 _{1-26 4} in the prior art, also includes conventional clock oscillator 22. Note that the clock cycle is 1 μs, and is not limited to the high-speed clock that is characteristic of the conventional example. Therefore, the time interval of the pulse signal output from each output channel of the timing pulse generator 37 is at least 1 μm.
s. Therefore, fine adjustment of 1μs or less with respect to the pulse necessary equipment, adjusted by the delay circuit 38 ₁ to 38 _9. Therefore, the minimum set delay times of the delay circuits 38 _{1 to} 38 ₉ differ depending on the associated pulse equipment as described later.

The pulse signal from the first output channels outputted from the timing pulse generator 37 for the first time the AC power source that requires a memory device 43 such as a bending electromagnet power supply 44 _2, another for the pulse signal The timing of the pulses for all pulse power supplies 40 ₁ to 40 ₉ is determined. This is because the output timing of the power supply output pattern of the memory device 43 determines the timing of incidence and emission of the electron beam. In other words, since the energy of the incident beam is determined by the linac 1, it must be incident with the magnetic field strength of the deflection electromagnet 11 that matches the energy, and the extraction energy is also determined by the SR ring 3, so that energy It must be taken out with a suitable magnetic field strength.

[0052] magnetic field strength by the deflection electromagnet 11 because determined by the coil current supplied from the bending electromagnet power supply 44 _2, if accurately measured the relationship between the coil current and the magnetic field strength, the output coil current corresponding to the required energy The timing pulse generator 37 can output the pulse signals for the pulse power supplies 40 ₁ to 40 ₉ necessary for inputting and emitting the electron beam. The pattern of the coil current written in the memory device 43 can be known from the cycle of the output clock of the AC power supply timing controller 42, the time required to reach the required coil current. Therefore, when the same pattern is used, the contents of the timing pulse generator 37 must be rewritten when the cycle of the output clock is changed.

Next, the second output channel is the linac 1
To use for. The output pulse width of the linac power supply 40 ₁ is about 10 μs, and the beam pulse having a width of 2 to 3 μs is set around the middle thereof. Therefore, the output channel that outputs the pulse signal before the pulse signal for the inflector 10 and the pertabeta electromagnets 30, 31, 32 is used.

The third output channel is shared by the inflector 10 and the pertabeta electromagnets 30, 31, 32. These are because it is necessary to change the timing equally with respect to the beam pulse. Further, the pulse signal from each output channel of the timing pulse generator 37 is output with a delay of at least 1 μs, but if the timing of the three pertabeta electromagnets 30, 31, 32 shifts relatively by 1 μs, the electron beam Since it can not be incident,
It is better to input the same pulse signal to the delay circuits 38 ₃ , 38 ₄ , 38 ₅ connected to the _three pertabeta power sources 40 ₃ , 40 ₄ , 40 ₅ .

The fourth output channel is shared by the deflector electromagnet 13 and the SR inflector 15. The reason for making these common is to reduce the number of output channels of the timing pulse generator 37. The outputs of these pulse power supplies 40 ₆ and 40 ₇ have almost the same pulse waveform, and the pulse width is long as several ms. The fifth output channel is also used for the kicker power source 48 ₈ and the SR kicker power source 48 ₉ . The reason for making these common is that when finely adjusting the energy of the outgoing beam, if only the timing of the kicker power source 48 ₈ is changed, S
Since the incidence efficiency on the R ring 3 changes, the timing of the SR kicker power source 48 ₉ also changes at the same time.

The pulse signals output from the respective output channels of the timing pulse generator 37 are delayed by the delay circuits 38 ₁ ...
38 to fine-tune the timing at _9. This is not only for supplementing the minimum delay time of the timing pulse generator 37 described above, but also for making adjustment flexible. Inflector 10, linac 1, pertabeta electromagnet 30,
Delay circuits 38 ₁ to 38 ₅ for 31 and 32, 0.1 to 1
The delay time of 0 μs can be set, and the output jitter is 10 ns or less, which is 1/10 of the minimum delay setting time. The minimum set time is determined to be a value smaller by one digit or more because the pulse fall time of the pertabeta electromagnets 30, 31, 32 (electron beam is injected during that time) is about 2 μs. In addition, the delay circuits 38 ₆ and 38 ₇ for the deflector electromagnet 13 and the SR inflector 15 are 1 μs.
Delay time of 10ms can be set, and jitter is 0.1μ
s or less. Since these pulsed magnetic field waveforms are as long as several ms, a delay width on the order of ns is not necessary. Delay circuit 38 ₈ , 3 for the kicker electromagnet 14 and the SR kicker electromagnet 35
Since 8 ₉ is a pulse adjustment with a width of several tens of ns, the delay time setting range is 1 ns to 1 μs, and the jitter is 0.5 ns or less.

Finally, the electrical insulation between the delay circuits 38 _{1 to} 38 ₉ and the pulse power sources 40 ₁ to 40 ₉ will be described. Generally, the pulse power supplies 40 ₁ to 40 ₉ and the devices for timing adjustment are installed far apart. Therefore, in order to prevent malfunction of devices due to noise on the signal line, between the device for the pulsed power supply 40 _{1-40 9} and timing adjustment it is electrically insulated with an insulation amplifier 39. This also helps prevent noise generated from the pulse power supplies 40 ₁ to 40 ₉ itself. Isolation amplifier 49 may be only either the pulse power supply 40 _{1-40 9} side or the delay circuit 38 ₁ to 38 ₉ side, but who attached to both sides is more effective.

Example 2. In the above embodiment, the case where the reference signal generator 36 is provided independently has been described.
It is possible to omit the reference signal generator 36 by giving the computer 41 the role of the reference signal generator 36.

Example 3. The stability of the pulse power supply 40 can be increased by using, as the reference signal generator 36 in the above-described embodiment, one configured so as to be synchronized with the commercial AC line of 50 Hz or 60 Hz.
The pulsed power supply 40 generally has a circuit configuration in which the current of the commercial AC line is stored in a capacitor and is discharged in a pulsed manner. Therefore, the storage voltage is 50H of the commercial AC line.
Since it is affected by the fluctuations of z and 60 Hz, if the outputs are always performed in the same phase of the commercial AC line, the fluctuation of the power supply output becomes small.

That is, when the repetition of the linac 1 and the synchrotron 2 is exactly 2 Hz, it can be synchronized with the commercial AC lines of 50 Hz and 60 Hz. That is, in the case of 50 Hz, the trigger pulse may be output from the reference signal generator 36 every 25 cycles of the commercial AC line. However, in the case of 1.9 Hz, for example, synchronization cannot be achieved. At that time, as the principle is shown in the time chart of FIG. 6, an oscillator of 1.9 Hz is provided in the reference signal generator 36, and after a pulse is generated from the oscillator, for example, the voltage of the commercial AC line changes from negative to positive. The pulse may be output from the reference signal generator 36 at a phase that changes to. Therefore, 50H
In the case of z, a fluctuation of 20 ms or less occurs, and the pulse period from the reference signal generator 36 does not become exactly 500 ms but changes from 500 to 520 ms. However, there is no problem because all devices operate based on this pulse. Further, it is more effective if the oscillator in the reference signal generator 36 can change its frequency.

Example 4. Although the clock cycle in the timing pulse generator 37 is set to 1 μs in the above embodiment, it is not limited to this value.

Example 5. Although the number of output channels of the timing pulse generator 37 is five in the above embodiment, the number is not limited to this.

Example 6. In the above embodiment, the timing pulse generator 3 is used for some pulse power sources 40.
Although the case where the pulse signals output from the same output channel 7 are shared, the output channel of the timing pulse generator 37 is made to correspond to each pulse power source 40 if the clock cycle in the timing pulse generator 37 is early. You may do it. In addition, even if the clock cycle is not early, the delay circuit 38 can be used to
Alternatively, the pulse signals from the individual output channels of the timing pulse generator 37 can be applied respectively.

Example 7. In the above embodiment, the case where the electrical insulation between the delay circuit 38 and the pulse power supply 40 is performed by using the insulation amplifier has been described, but other insulation means such as an optical cable may be used. Has the same effect.

Example 8. In the above embodiment, the delay circuit 38 that manually sets the delay value is used, but if the computer that can set the delay value is used, more effective timing control can be performed.

Example 9. In the above embodiment, the computer 41 for the timing generator 37 and the computer 45 for the memory device 43 are used, but one computer may be shared, and the same effect as the above embodiment is obtained. Play.

Example 10. In the above embodiment, the AC power supply timing controller 42 is described as a case where the parameters are set manually, but the parameters may be set by a computer so that the clock cycle is automatically set only by inputting the number of pulses. It becomes possible to realize a more effective controller.

Example 11. In the above-described embodiment, the deflection electromagnet 11 and the QFs 33, Q are controlled by the memory device 23.
Although the one that controls the D34 is shown, if all the electromagnets of the synchrotron such as the hexapole electromagnet are controlled by the same method,
More effective.

Example 12 In the above embodiment, the AC power supply timing controller 4 is used when determining the timing of the pulse signal output from the timing pulse generator 37.
Although it was determined from the coil current pattern of the deflection electromagnet of the memory device 43 with reference to the pulse signal output to 2, the method of measuring the magnetic field strength of the deflection electromagnet and determining the timing of beam extraction is also used in the conventional example. Also has the same effect. In this case, in the block diagram shown in FIG.
Only the delay circuits 38 ₈ and 38 _{9 of the} kicker power source 40 ₈ and the SR kicker power source 40 ₉ are removed from the timing pulse generator 37, and the conventional method is adopted for the two delay circuits 38 ₈ and 38 ₉ . Thereby, the energy of the outgoing beam can be determined more accurately. Since the deflector power supply 40 ₆ and the SR inflector power supply 40 ₇ have long pulse widths, there is no problem even if the set values are slightly different.

Example 13 In the above embodiment, the clock circuit 5 is used as the AC power supply timing controller 42.
Although the generation of the output pulse of 0 is controlled by the pulse number setting circuit 51, the pulse number setting circuit 51 may be replaced by a gate circuit, and the same effect as that of the above embodiment can be obtained. FIG. 7 is a block diagram showing an example of such an AC power supply timing controller 42, and FIG. 8 is a time chart showing the time relationship of the waveforms of the respective parts. Figure 7
In the above, reference numeral 52 is the gate circuit for generating a gate signal having a predetermined time width when receiving a pulse signal from the timing pulse generator 37. The AC power supply timing controller 42 includes the gate circuit 52.
And a clock circuit 50 for generating an output clock for the time width of the gate signal from the gate circuit 52.

Next, the operation will be described. A pulse signal is input from the timing pulse generator 37 to the timing gate circuit 54 shown in FIG. Gate circuit 5
When the pulse signal 4 receives the pulse signal, it generates a gate signal having a predetermined time width with a predetermined time delay shown in FIG. When receiving the gate signal, the clock circuit 50 continuously outputs the output clock during the time width of the gate signal as shown in FIG. 8 (c). Therefore, the time width of the gate signal is T when the cycle of the output clock is T.
If the number of memories to be output from 3 is 65000, T × 6
Must be set to the value given by 5000. In addition,
The time width of the gate signal can be automatically set by configuring the gate circuit 52 so that it can be controlled by a computer.

Example 14 In the above embodiment, the beam is divided into the ring for accelerating and the ring for accumulating, but the beam may be accelerated and accumulated in the same ring. This can be achieved by a synchrotron, in which case the electromagnets such as the bending electromagnet and the quadrupole electromagnet of the synchrotron, and the power supply of the high-frequency acceleration cavity increase their output with acceleration as explained above, but reach the maximum value. The output must be held constant when it is reached. On the other hand, the beam current accelerated by the synchrotron changes with each acceleration due to changes in the energy of the electron beam from the linac 1. Therefore, it is effective to operate in the normal acceleration mode at first and shift to the accumulation mode when a predetermined acceleration beam current is obtained. Therefore, the AC power supply timing controller 42 is provided with a comparison circuit and a variable voltage generation circuit to compare the set voltage with a signal obtained by converting the accelerated beam current into a voltage, and stop the output clock when the beam current exceeds a set value. To do so. Because the output clock is held constant at that point output of which the respective alternating-current power supply 44 _{1-44 4} stops, so that could be migrated in the storage mode. The acceleration beam current can be detected as a voltage by a current monitor generally installed in the synchrotron, and the signal is input to the AC power supply timing controller 42.

The timing of comparison is performed in the flat portion of the maximum value of the coil current pattern (almost trapezoidal wave) of the deflection electromagnet 11. The voltage at the output terminal of the deflection magnet power supply 44 _2,
During acceleration, which changes with time, a voltage is generated that combines both the resistance and inductance of the coil. On the other hand, the inductance is zero in the flat part, and only the resistance is required. Therefore, if the output clock of the power supply timing controller is stopped during acceleration, an extra voltage will be generated, and as a result, the output current will change and the electron beam will be lost. Therefore, the output clock is stopped at the flat portion of the coil current pattern of the deflection electromagnet 11. Therefore, in order to change the energy of the stored beam, the pattern of the memory device 43 must be changed so that its maximum value corresponds to the predetermined energy.

Example 15. In the above embodiment, the case where the output clock of the AC power supply timing controller 42 is stopped at the maximum value of the pattern of the memory device 43 has been described. The timing for stopping the clock is not limited as long as it has a structure capable of holding the output current.

Example 16. Next, the embodiment shown in FIG. 9 will be described. 9 is a block diagram showing a device configuration for synchronizing the phase of the high frequency power supply 44 ₁ with the kicker power supply 44 ₈ and the SR kicker power supply 40 ₉ , and FIG. 10 is a timing diagram showing the operating principle thereof. In FIG. 9, 5
3 is a high frequency signal generator for generating a 130 MHz signal based on the power output pattern from the memory device 43, 5
Reference numeral 4 denotes a high-frequency amplifier for amplifying the signal and inputting it to the high-frequency acceleration cavity 12, and the high-frequency power supply 44 ₁ is generally formed by the high-frequency signal generator 53 and the high-frequency amplifier 54. Further, 46 receives the signal from the high frequency signal generator 53, and receives the kicker power source 40 ₈ and the SR kicker power source 4
₀₉ is a synchronizing circuit for synchronizing the high frequency power supply 44 ₁ .

Next, the operation will be described. Here, FIG.
The timing chart shown in FIG. 0 shows the bunch of the electron beam accelerated in the high frequency acceleration cavity 12 in FIG.
The rising waveform of the magnetic field of the kicker electromagnet 14 is shown in (b). The bunch passes the kicker electromagnet 14 at intervals of 7.7 ns. The bunch that is normally taken out is a bunch that passes through the kicker electromagnet 14 when the magnetic field waveform of the kicker electromagnet 14 is flat. For example, if the bunch passes the kicker magnetic field at the rising edge of the magnetic field shown by the solid line in FIG. 10B, the first bunch passes without being affected by the magnetic field and is taken out once.
The second to fifth bunches are not kicked out with a sufficient magnetic field, so they are lost by colliding with a vacuum chamber or the like. Therefore, in this case, 11 bunches out of 15 bunches are taken out. On the other hand, when passing through the rising edge of the magnetic field shown by the broken line in FIG. 10B, the second to sixth bunches are lost, and 10 bunches are taken out, which is 1 bunch less than the previous case. .

If the kicker power source 40 ₈ and the high frequency power source 44 ₁ are not synchronized with each other, the above-mentioned phenomenon occurs and the number of extraction bunches becomes 10 or 11 and becomes unstable. Therefore, the kicker power supply 40 is provided by providing the synchronization circuit 46.
₈ and high frequency power supply 44 ₁ are synchronized. The principle is the same as that of the reference signal generator 36 described above, and the commercial AC line may be considered as the high frequency signal generator 53. Therefore, in this case, the time variation of the output of the kicker power source 40 _{8 with} respect to the pulse signal from the timing pulse generator 37 is 7.
It occurs within the range of 7 ns, but there is no problem. In addition, the kicker power source 40 ₈ and the SR kicker power source 40 ₉ must be synchronized in order to keep the incident efficiency constant.
Delay circuit 38 ₉ for R kicker power supply 40 ₉ also receives the pulses from the synchronization circuit 46.

Example 17 In the above embodiment, the input of the delay circuit 38 ₉ for the SR kicker power source 40 ₉ is taken directly from the synchronizing circuit 46, but the kicker power source 40 ₈
May be taken from the output of the delay circuit 38 ₉ for
The same effect as in the above embodiment can be obtained.

[0079]

As described above, according to the first aspect of the present invention, pulse signals are output from a plurality of output channels with a preset time delay based on a trigger pulse having a predetermined cycle. Since the timing pulse generator is provided on the input side of the delay circuit for finely adjusting the timing of the pulse signal and the delay circuit and the pulse device are electrically insulated by the insulating means, the high speed Since the clock oscillator and the bending electromagnet for measuring the magnetic field are not required, the structure of the device can be greatly simplified and the cost can be reduced, and the timing control device that is not easily affected by electrical noise can be obtained.

Further, according to the invention described in claim 2, since the trigger pulse to the timing pulse generator is configured to be synchronized with the frequency of the commercial AC line, the stability of the pulse power supply can be enhanced. There is.

Further, according to the invention described in claim 3, since the pulse signal output from one output channel of the timing pulse generator is configured to be shared by several pulse devices, the device configuration is simplified. There is an effect that can be converted.

According to the invention described in claim 4, the power supply output pattern to be sent to the AC power supply is written in the memory device in advance, and the AC power supply timing controller generates it based on the pulse signal from the timing pulse generator. Since it is configured to sequentially discharge it by the output clock, the timing pulse generator is configured to have the function of determining the timing of the pulse signal to each delay circuit based on the pulse signal to the AC power supply timing controller. There is an effect that the AC power supply and the pulse power supply can be accurately synchronized with each other, and the incidence and emission efficiency of the beam can be improved.

Further, according to the invention described in claim 5, the clock circuit which starts the output of the output clock by the pulse signal from the timing pulse generator and stops by the borrow signal, and the output clock generated by the clock circuit are Since the AC power supply timing controller is formed with the pulse number setting circuit that generates a borrow signal when the number reaches a predetermined number, an output pulse to the memory device can be obtained with a simple circuit.

According to the invention described in claim 6, a gate circuit for generating a gate signal for a predetermined time width upon reception of a pulse signal from the timing pulse generator, and an output clock for the time width of the gate signal are provided. Since the AC power supply timing controller is formed with the clock circuit that continuously outputs, there is an effect that an output pulse to the memory device can be obtained with a simple circuit.

According to the invention described in claim 7, the AC power supply timing controller has a function of stopping the output of the output clock from the clock circuit when the beam current exceeds the reference value. Therefore, there is an effect that the acceleration ring and the accumulation ring can be shared by the same ring.

According to the invention described in claim 8, a synchronizing circuit for synchronizing the pulse signal with the phase of the high frequency power source is connected to the output channel of the timing pulse generator for outputting the pulse signal to the kicker power source. With this configuration, the number of bunches taken out becomes constant, and the operation of the particle accelerator can be stabilized.

[Brief description of drawings]

FIG. 1 is a block diagram showing a general timing control device according to an embodiment of the present invention.

FIG. 2 is a plan view showing an example of a particle accelerator to which the present invention is applied.

FIG. 3 is a block diagram showing a specific embodiment of the timing control device of the present invention when applied to the particle accelerator.

FIG. 4 is a block diagram showing a configuration of an AC power supply timing controller used in the above embodiment.

FIG. 5 is a time chart showing the operation timing of the pulse device in the above embodiment.

FIG. 6 is a time chart showing the principle for synchronizing the output of the reference signal generator with the commercial AC line in the above embodiment.

FIG. 7 is a block diagram showing another embodiment of the AC power supply timing controller.

FIG. 8 is a time chart showing a time relationship of waveforms of respective parts in the above-mentioned embodiment.

FIG. 9 is a block diagram showing a main part of another embodiment of the timing control device according to the present invention.

FIG. 10 is a time chart showing the temporal relationship between the rising magnetic field waveform of the kicker electromagnet and the bunch in the above-mentioned embodiment.

FIG. 11 is a block diagram showing a conventional timing control device.

FIG. 12 is a plan view showing an example of a particle accelerator to which it is applied.

[Explanation of symbols]

1 pulse equipment (linac) 10 pulse equipment (inflector) 13 pulse equipment (deflector electromagnet) 14 pulse equipment (kicker electromagnet) 15 pulse equipment (SR inflector) 30-32 pulse equipment (pertabeta electromagnet) 35 pulse equipment (SR kicker) Electromagnet) 36 Reference signal generator 37 Timing pulse generator 38, 38 _{1 to} 38 ₉ Delay circuit 39 Insulation means (insulation amplifier) 40, 40 ₁ to 40 ₉ Pulse power supply 41 Control means (computer) 42 AC power supply timing controller 43 Memory Equipment 44 _{1 to} 44 ₄ AC power supply 46 Synchronous circuit 50 Clock circuit 51 Pulse number setting circuit 52 Gate circuit

Claims (8)

[Claims] 1. A timing pulse generator having a plurality of output channels, which receives a trigger pulse sent at a predetermined cycle and sequentially outputs a pulse signal at a predetermined time interval from the output channel. A delay circuit for finely adjusting the timing of the pulse signal output from each output channel of the timing pulse generator; and the delay circuit for injecting, ejecting, accelerating and accumulating charged particles of a particle accelerator. Insulation means for electrically insulating from various pulse equipment required for
A timing control device comprising: a control unit that controls the timing pulse generator. 2. The timing control device according to claim 1, further comprising a reference signal generator for generating the trigger pulse applied to the timing pulse generator in synchronization with the frequency of the commercial AC line. 3. The timing control device according to claim 1, wherein some of the pulse devices share a pulse signal output from one output channel of the timing pulse generator. 4. An AC power supply timing controller for generating an output clock based on a pulse signal output from one of the output channels of the timing pulse generator, a high frequency power supply for beam acceleration of the charged particles, and the charged particles. The power output pattern to be sent to the AC power supply such as the deflection electromagnet power supply for beam deflection of is written in advance,
A memory device for sequentially discharging the power supply output pattern according to the output clock from the AC power supply timing controller is provided, and the timing pulse generator supplies the delay circuit to each of the delay circuits based on a pulse signal to the AC power supply timing controller. 4. The timing control device according to claim 1, wherein the timing control device has a function of determining the timing of the pulse signal. 5. A clock circuit in which the AC power supply timing controller receives a pulse signal from the timing pulse generator, starts continuous output clock output, and stops output of the output clock when a borrow signal is generated. 5. A pulse number setting circuit for generating the borrow signal and transmitting the borrow signal to the clock circuit when counting a preset number of output clocks generated by the clock circuit. Timing controller. 6. A gate circuit for generating a gate signal having a preset time width when the AC power supply timing controller receives a pulse signal from the timing pulse generator, and the gate signal received from the gate circuit. 5. The timing control device according to claim 4, further comprising a clock circuit that continuously generates an output clock only during the time width of. 7. The AC power source timing controller has a function of stopping generation of an output clock from the clock circuit when the beam current of the accelerated charged particles exceeds a preset reference value. The timing control device according to any one of claims 4 to 6, characterized in that. 8. A pulse signal output from the output channel of the timing pulse generator, the pulse signal being connected to an output channel associated with a kicker power source for extracting the accelerated beam of the charged particles. 8. The timing control device according to claim 4, further comprising a synchronization circuit for synchronizing the phase of a high frequency voltage for accelerating the charged particles.