JPH06167510A - Semiconductor acceleration sensor and manufacture thereof - Google Patents

Semiconductor acceleration sensor and manufacture thereof

Info

Publication number
JPH06167510A
JPH06167510A JP34556292A JP34556292A JPH06167510A JP H06167510 A JPH06167510 A JP H06167510A JP 34556292 A JP34556292 A JP 34556292A JP 34556292 A JP34556292 A JP 34556292A JP H06167510 A JPH06167510 A JP H06167510A
Authority
JP
Japan
Prior art keywords
mass
pedestal
silicon
rim
bonded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP34556292A
Other languages
Japanese (ja)
Other versions
JP3093066B2 (en
Inventor
Kazuaki Takami
一昭 高見
Shinobu Kadani
忍 甲谷
Takashi Kunimi
敬 国見
Tadashi Kobayashi
忠 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Akebono Brake Industry Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Akebono Brake Industry Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Akebono Brake Industry Co Ltd, Sanyo Electric Co Ltd filed Critical Akebono Brake Industry Co Ltd
Priority to JP04345562A priority Critical patent/JP3093066B2/en
Publication of JPH06167510A publication Critical patent/JPH06167510A/en
Application granted granted Critical
Publication of JP3093066B2 publication Critical patent/JP3093066B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To achieve higher productivity by preventing adhesion between the top surface of an opposed base and the undersurface of a square part. CONSTITUTION:A frame-shaped periphery part 5, a square support part 6 located almost at the center and a thin part 7 supporting the mass support part 6 are formed at a silicon sensor chip 4 and a square part 11 comprising glass is bonded on the undersurface of the square support part 6 while a rim part 3 is bonded on the periphery 5. An insulation film 21 is formed on the top surface of a silicon base 1 facing the square part 11, then, a gap 21 is formed between the film and the under-surface of the square part 11 and the base 1 is bonded on the undersurface of the rim part 3.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、自動車,航空機等の加
速度を感知する半導体加速度センサ及びその製造方法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor acceleration sensor for detecting the acceleration of an automobile, an aircraft or the like, and a method for manufacturing the same.

【0002】[0002]

【従来の技術】近年、自動車用安全装置のエアバックを
作動させるために、加速度を感知する半導体加速度セン
サの製品化が進められている。この種の従来の半導体加
速度センサは、特開平3−2535号公報(G01L
1/18)に記載されており、図6ないし図8に示す構
成になっている。
2. Description of the Related Art In recent years, in order to operate an airbag of a safety device for an automobile, a semiconductor acceleration sensor for detecting an acceleration has been commercialized. A conventional semiconductor acceleration sensor of this type is disclosed in Japanese Patent Application Laid-Open No. 3-25535 (G01L).
1/18), and has the configuration shown in FIGS. 6 to 8.

【0003】図6において、1はシリコン台座、2は台
座1の上面の中央部にエッチングにより形成されたギャ
ップ部、3は台座1の上面の周縁部に静電圧着により接
着されたガラスからなるリム部、4はリム部3の上面に
接着されたn型のシリコン基板からなるシリコンセンサ
チップ、5はチップ4の枠状の周縁部、6はチップ4の
ほぼ中央に位置するマス支持部、7は周縁部5とマス支
持部6との間にエッチングにより形成されたダイアフラ
ム状の薄肉部である。
In FIG. 6, 1 is a silicon pedestal, 2 is a gap portion formed by etching in the central portion of the upper surface of the pedestal 1, and 3 is glass that is adhered to the peripheral portion of the upper surface of the pedestal 1 by electrostatic pressure bonding. A rim portion, 4 is a silicon sensor chip made of an n-type silicon substrate adhered to the upper surface of the rim portion 5, 5 is a frame-shaped peripheral portion of the chip 4, 6 is a mass support portion located substantially in the center of the chip 4, Reference numeral 7 denotes a diaphragm-shaped thin portion formed by etching between the peripheral portion 5 and the mass support portion 6.

【0004】8はチップ1の上面の薄肉部7の上面に拡
散により形成された4本のピエゾ抵抗、9は抵抗8を含
むチップ4の上面に形成された二酸化シリコン膜からな
る保護膜、10は抵抗8に接続され外部へ接続されるア
ルミ配線、11はマス支持部6の下面に接着されたガラ
スからなるマス部であり、マス部11の下面と台座1の
上面との間に空隙12が形成されている。なお、台座1
はマス部11の変位を規制して薄肉部7の破損を防止す
る。
Reference numeral 8 denotes four piezoresistors formed by diffusion on the upper surface of the thin portion 7 on the upper surface of the chip 1, 9 indicates a protective film made of a silicon dioxide film formed on the upper surface of the chip 4 including the resistor 8. Is an aluminum wiring connected to the resistor 8 and is connected to the outside, and 11 is a mass portion made of glass adhered to the lower surface of the mass supporting portion 6, and a space 12 is provided between the lower surface of the mass portion 11 and the upper surface of the pedestal 1. Are formed. In addition, pedestal 1
Regulates the displacement of the mass portion 11 to prevent the thin portion 7 from being damaged.

【0005】このように構成された半導体加速度センサ
は、加速度が加わると、その方向にマス部11が変位
し、この変位により薄肉部7が変形し、ピエゾ抵抗8の
抵抗値が変化し、加速度が感知できる。
In the semiconductor acceleration sensor configured as described above, when acceleration is applied, the mass portion 11 is displaced in that direction, the thin portion 7 is deformed by this displacement, the resistance value of the piezoresistor 8 is changed, and the acceleration Can be detected.

【0006】つぎに台座1の製造方法について図7を参
照して説明する。図7Aに示すシリコンウエハ13の片
側鏡面14上に、図7Bに示すように酸化膜15を形成
し、図7Cに示すように、ギャップ部2となる部分の酸
化膜15をフォトリソグラフィ技術とエッチングにより
除去し、所定のパターンに形成する。つぎに図7Dに示
すように、所定のエッチング液、例えばフッ酸と硝酸の
混合されたエッチング液により深さ3μmのギャップ部
2を形成し、その後、図7Eに示すように、残存の酸化
膜15を除去する。
Next, a method of manufacturing the pedestal 1 will be described with reference to FIG. An oxide film 15 is formed on the one-sided mirror surface 14 of the silicon wafer 13 shown in FIG. 7A as shown in FIG. 7B, and as shown in FIG. 7C, the oxide film 15 in the portion to be the gap 2 is etched by photolithography and etching. And removed to form a predetermined pattern. Next, as shown in FIG. 7D, a gap portion 2 having a depth of 3 μm is formed by a predetermined etching solution, for example, an etching solution in which hydrofluoric acid and nitric acid are mixed, and thereafter, as shown in FIG. Remove 15.

【0007】つぎに、半導体加速度センサの製造方法に
ついて図8を参照して説明する。図8Aに示すチップ4
を有するセンサウエハ16に、図8Bに示すように、リ
ム部3となる多孔を有するリム用ガラス板17とマス部
11となるマスガラス片18を静電圧着技術により接着
する。この静電圧着時、例えば300℃の雰囲気中にお
いて、センサウエハ16と,リム用ガラス板17及びマ
スガラス片18とに100g/cm2 の加重を加えなが
ら、センサウエハ16と,リム用ガラス板17及びマス
ガラス片18との間に500Vを10分間印加して接着
する。
Next, a method of manufacturing the semiconductor acceleration sensor will be described with reference to FIG. Chip 4 shown in FIG. 8A
As shown in FIG. 8B, a porous glass plate 17 for rim which becomes the rim part 3 and a mass glass piece 18 which becomes the mass part 11 are adhered to the sensor wafer 16 having the above. During this electrostatic pressure bonding, for example, in the atmosphere of 300 ° C., the sensor wafer 16, the rim glass plate 17 and the mass glass piece 18 are applied with a load of 100 g / cm 2 on the sensor wafer 16, the rim glass plate 17 and the mass glass piece 18. 500V is applied to the piece 18 for 10 minutes to bond them.

【0008】その後、図8Cに示すように、リム用ガラ
ス板17と,台座1となる台座ウエハ19とを前記と同
様、静電圧着技術により接着する。つぎに、このように
形成された多層構造ウエハ20を図8Dに示すように、
ダイシングソーを用いて切断し、半導体加速度センサペ
レットに分離する。
After that, as shown in FIG. 8C, the rim glass plate 17 and the pedestal wafer 19 to be the pedestal 1 are bonded by the electrostatic pressure bonding technique as described above. Next, as shown in FIG. 8D, the multi-layer structure wafer 20 thus formed is
It is cut using a dicing saw and separated into semiconductor acceleration sensor pellets.

【0009】[0009]

【発明が解決しようとする課題】従来の前記半導体加速
度センサの製造方法において、リム用ガラス板17と台
座ウエハ19とを静電圧着技術により接着する場合、強
電界によりマス部11と台座1との界面で、マス部11
のガラス中の酸素イオンが移動して台座1のシリコンと
結合し、マス部11と台座1との間に二酸化シリコンが
形成され、マス部11が固定された状態になる。そのた
め、加速度を感知できなくなったり、歩留りが悪くなっ
たり、生産性が低くなったりするという問題点がある。
本発明は、前記の点に留意し、リム部と台座との接着時
にマス部と台座との接着を防止し、生産性を向上できる
半導体加速度センサ及びその製造方法を提供することを
目的とする。
In the conventional method of manufacturing a semiconductor acceleration sensor described above, when the glass plate for rim 17 and the pedestal wafer 19 are bonded by the electrostatic pressure bonding technique, the mass portion 11 and the pedestal 1 are attached to each other by a strong electric field. At the interface of
Oxygen ions in the glass move and bond with silicon of the pedestal 1, silicon dioxide is formed between the mass portion 11 and the pedestal 1, and the mass portion 11 is fixed. Therefore, there are problems that the acceleration cannot be detected, the yield is deteriorated, and the productivity is lowered.
The present invention has been made in consideration of the above points, and an object of the present invention is to provide a semiconductor acceleration sensor capable of preventing the mass portion and the pedestal from being bonded to each other when the rim portion and the pedestal are bonded to each other and improving the productivity, and a manufacturing method thereof. .

【0010】[0010]

【課題を解決するための手段】前記課題を解決するため
に、本発明の半導体加速度センサの製造方法は、シリコ
ンセンサチップに枠状の周縁部,ほぼ中央に位置したマ
ス支持部,マス支持部を支持した薄肉部を形成し、マス
支持部の下面にガラスからなるマス部を接着するととも
に、周縁部にリム部を接着し、マス部に対向したシリコ
ン台座の上面に絶縁膜を形成した後、マス部の下面との
間に空隙を形成してリム部の下面にシリコン台座を接着
するようにしたものである。
In order to solve the above-mentioned problems, a method for manufacturing a semiconductor acceleration sensor according to the present invention is directed to a silicon sensor chip in which a frame-shaped peripheral portion, a mass support portion located substantially at the center, and a mass support portion. After forming a thin part that supports the glass support, a mass part made of glass is adhered to the lower surface of the mass support part, a rim part is adhered to the peripheral part, and an insulating film is formed on the upper surface of the silicon pedestal facing the mass part. A space is formed between the lower surface of the mass portion and the lower surface of the rim portion so that the silicon pedestal is bonded.

【0011】また、本発明の半導体加速度センサは、枠
状の周縁部,ほぼ中央に位置したマス支持部,支持部を
支持した薄肉部を有するシリコンセンサチップと、支持
部の下面に接着されたガラスからなるマス部と、周縁部
の下面に接着されたリム部と、リム部の下面に接着され
たシリコン台座と、台座とマス部の下面との間に形成さ
れた空隙と、空隙のマス部に対向した台座の上面に形成
された凹凸層とを備えたものである。さらに、本発明の
半導体加速度センサは、前記凹凸層を台座に対向したマ
ス部の下面に形成したものである。
In the semiconductor acceleration sensor of the present invention, a silicon sensor chip having a frame-shaped peripheral edge portion, a mass support portion located substantially in the center, and a thin portion supporting the support portion is adhered to the lower surface of the support portion. A mass part made of glass, a rim part bonded to the lower surface of the peripheral part, a silicon pedestal bonded to the lower surface of the rim part, a void formed between the pedestal and the lower surface of the mass part, and a mass of the void. And a concavo-convex layer formed on the upper surface of the pedestal facing the section. Further, in the semiconductor acceleration sensor of the present invention, the uneven layer is formed on the lower surface of the mass portion facing the pedestal.

【0012】[0012]

【作用】前記のように構成された本発明の半導体加速度
センサの製造方法は、マス部に対向したシリコン台座の
上面に絶縁膜を形成した後、マス部の下面との間に空隙
を形成してリム部の下面に台座を接着するようにしたた
め、絶縁膜により台座のシリコン原子の移動が疎外さ
れ、台座とマス部との界面で、二酸化シリコン膜の形成
が防止され、台座とマス部の接着が防止でき、かつ、絶
縁膜は既存の半導体製造技術を用いて形成することがで
き、安価な半導体加速度センサが得られ、生産性が向上
される。
According to the method of manufacturing the semiconductor acceleration sensor of the present invention having the above-described structure, the insulating film is formed on the upper surface of the silicon pedestal facing the mass portion, and then the gap is formed between the insulating film and the lower surface of the mass portion. Since the pedestal is adhered to the lower surface of the rim portion by the insulating film, the movement of silicon atoms on the pedestal is alienated, the formation of the silicon dioxide film at the interface between the pedestal and the mass portion is prevented, and the pedestal and the mass portion are prevented from forming. Adhesion can be prevented, and the insulating film can be formed by using an existing semiconductor manufacturing technique, so that an inexpensive semiconductor acceleration sensor can be obtained and productivity is improved.

【0013】また、本発明の半導体加速度センサは、マ
ス部に対向した台座の上面または台座に対向したマス部
の下面に凹凸層を形成したため、強電界の発生が抑制さ
れ、台座とマス部との界面で二酸化シリコン膜の形成が
防止され、台座とマス部の接着が防止できる。
Further, in the semiconductor acceleration sensor of the present invention, since the uneven layer is formed on the upper surface of the pedestal facing the mass portion or on the lower surface of the mass portion facing the pedestal, generation of a strong electric field is suppressed, and the pedestal and the mass portion are separated from each other. The formation of the silicon dioxide film is prevented at the interface of the, and the adhesion between the pedestal and the mass portion can be prevented.

【0014】[0014]

【実施例】1実施例について図1及び図2を参照して説
明する。それらの図において図6ないし図8と同一符号
は同一もしくは相当するものを示し、図6と異なる点は
マス部11と対向した台座1の上面に、二酸化シリコン
膜,窒化シリコン膜等の絶縁膜21を形成し、その後リ
ム部3と台座1を接着するようにした点であり、つぎ
に、この絶縁膜21の製造方法について説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment will be described with reference to FIGS. 6 to 8 indicate the same or corresponding ones. The difference from FIG. 6 is that an insulating film such as a silicon dioxide film or a silicon nitride film is formed on the upper surface of the pedestal 1 facing the mass portion 11. 21 is formed, and then the rim portion 3 and the pedestal 1 are bonded together. Next, a method of manufacturing the insulating film 21 will be described.

【0015】図2A〜Dの製造工程は従来例の図7A〜
Dの製造工程と同一であり、図2Eに示すように、CV
D技術により全面にCVD酸化膜、即ち絶縁膜21を形
成し、つぎに図2Fに示すように、マス部11と対向す
る部分にフォトリソグラフィ技術により所定のレジスト
パターン22を形成する。その後、図2Gに示すよう
に、エッチングにより不要な酸化膜15,絶縁膜21及
びレジストパターン層22を除去する。
The manufacturing process of FIGS. 2A to 2D is the same as that of the conventional example shown in FIGS.
The manufacturing process is the same as that of D. As shown in FIG.
A CVD oxide film, that is, an insulating film 21 is formed on the entire surface by the D technique, and then, as shown in FIG. 2F, a predetermined resist pattern 22 is formed by the photolithography technique on the portion facing the mass portion 11. Then, as shown in FIG. 2G, unnecessary oxide film 15, insulating film 21, and resist pattern layer 22 are removed by etching.

【0016】つぎに他の実施例について図3及び図4を
参照して説明する。それらの図において、図1及び図2
と同一符号は同一もしくは相当するものを示し、図1と
異なる点は、図1の絶縁膜21の代わりに、凹凸層23
を形成し、リム部3と台座1の接着時、強電界の発生を
抑制し、マス部11と台座1の接着を防止するようにし
た点であり、つぎに、この凹凸層23の製造方法につい
て説明する。
Next, another embodiment will be described with reference to FIGS. In these figures, FIG. 1 and FIG.
1 indicates the same or corresponding ones, and the difference from FIG. 1 is that instead of the insulating film 21 of FIG.
Is formed, and when the rim portion 3 and the pedestal 1 are bonded together, generation of a strong electric field is suppressed to prevent the mass portion 11 and the pedestal 1 from being bonded together. Next, the method for manufacturing the uneven layer 23 is described. Will be described.

【0017】図4A〜Dまでは図2A〜Dと同様の製造
工程であり、図4Eに示すように、不要な酸化膜15を
除去し、その後、図4Fに示すように、所定のパターン
を有するメタルマスク24を用いてサンドブラスト粒子
25によりサンドブラスト処理し、マス部11に対向す
る台座1上に3μm以上の凹凸層23を形成する。
4A to 4D are the same manufacturing steps as FIGS. 2A to 2D, the unnecessary oxide film 15 is removed as shown in FIG. 4E, and then a predetermined pattern is formed as shown in FIG. 4F. Sandblasting is performed with sandblast particles 25 using the metal mask 24 that is provided to form a concavo-convex layer 23 of 3 μm or more on the pedestal 1 facing the mass portion 11.

【0018】つぎに、さらに他の実施例について図5を
参照して説明する。同図において、図1及び図3と同一
符号は同一もしくは相当するものを示し、図3と異なる
点は、図3の凹凸層23の代わりに台座1と対向したマ
ス部11の下面に凹凸層26が形成された点であり、台
座1と対向したマス部11の下面に前記と同様に、サン
ドブラスト処理して3μm以上の凹凸層26を形成す
る。
Next, another embodiment will be described with reference to FIG. In the figure, the same reference numerals as those in FIGS. 1 and 3 indicate the same or corresponding ones, and the difference from FIG. 3 is that the uneven layer is provided on the lower surface of the mass portion 11 facing the pedestal 1 instead of the uneven layer 23 of FIG. 26 is formed, and the uneven surface layer 26 having a thickness of 3 μm or more is formed on the lower surface of the mass portion 11 facing the pedestal 1 by sandblasting in the same manner as described above.

【0019】なお、前記実施例では、上面の中央部にギ
ャップ部2を形成した台座1を例にとって説明したが、
台座1にギャップ部2がなく、台座1が平坦な場合でも
よい。また、前記凹凸層23,26は研磨剤により研磨
処理してもよい。
In the above embodiment, the pedestal 1 having the gap 2 formed at the center of the upper surface has been described as an example.
The pedestal 1 may have no gap portion 2 and the pedestal 1 may be flat. Further, the uneven layers 23 and 26 may be polished with an abrasive.

【0020】[0020]

【発明の効果】本発明は以上説明したように構成されて
いるため、つぎに記載する効果を奏する。本発明の半導
体加速度センサの製造方法は、マス部11に対向したシ
リコン台座1の上面に絶縁膜21を形成した後、マス部
11の下面との間に空隙12を形成してリム部3の下面
に台座1を接着するようにしたため、台座1のシリコン
原子の移動を疎外することができ、台座1とマス部11
との界面で、二酸化シリコン膜の形成を防止することが
でき、台座1とマス部11の接着を防止することがで
き、生産性を向上することができる。
Since the present invention is configured as described above, it has the following effects. According to the method for manufacturing a semiconductor acceleration sensor of the present invention, after the insulating film 21 is formed on the upper surface of the silicon pedestal 1 facing the mass portion 11, the void 12 is formed between the insulating film 21 and the lower surface of the mass portion 11 to form the rim portion 3. Since the pedestal 1 is adhered to the lower surface, the movement of silicon atoms on the pedestal 1 can be isolated and the pedestal 1 and the mass portion 11 can be separated.
It is possible to prevent the formation of the silicon dioxide film at the interface with the, and to prevent the pedestal 1 and the mass portion 11 from adhering to each other, thereby improving the productivity.

【0021】また、本発明の半導体加速度センサは、マ
ス部11に対向した台座1の上面または台座1に対向し
たマス部11の下面に凹凸層23,26を形成したた
め、強電界の発生を抑制することができ、台座1とマス
部11との界面で二酸化シリコン膜の形成をすることが
でき、台座1とマス部11の接着を防止することができ
る。
In the semiconductor acceleration sensor of the present invention, since the uneven layers 23 and 26 are formed on the upper surface of the pedestal 1 facing the mass portion 11 or the lower surface of the mass portion 11 facing the pedestal 1, generation of a strong electric field is suppressed. Therefore, the silicon dioxide film can be formed at the interface between the pedestal 1 and the mass portion 11, and the adhesion between the pedestal 1 and the mass portion 11 can be prevented.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の1実施例の一部切断斜視図である。FIG. 1 is a partially cutaway perspective view of an embodiment of the present invention.

【図2】A〜Gは図1の一部の各工程図である。2A to 2G are process diagrams of a part of FIG.

【図3】本発明の他の実施例の一部切断斜視図である。FIG. 3 is a partially cutaway perspective view of another embodiment of the present invention.

【図4】A〜Gは図3の一部の各工程図である。4A to 4G are process diagrams of a part of FIG.

【図5】本発明のさらに他の実施例の一部切断斜視図で
ある。
FIG. 5 is a partially cutaway perspective view of still another embodiment of the present invention.

【図6】従来例の一部切断斜視図である。FIG. 6 is a partially cutaway perspective view of a conventional example.

【図7】A〜Eは図6の一部の各工程図である。7A to 7E are process diagrams of a part of FIG.

【図8】A〜Dは図6の各工程図である。8A to 8D are process diagrams of FIG.

【符号の説明】[Explanation of symbols]

1 台座 3 リム部 4 シリコンセンサチップ 5 周縁部 6 マス支持部 7 薄肉部 11 マス部 12 空隙 21 絶縁膜 23 凹凸層 26 凹凸層 1 pedestal 3 rim portion 4 silicon sensor chip 5 peripheral portion 6 mass support portion 7 thin portion 11 mass portion 12 void 21 insulating film 23 uneven layer 26 uneven layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 国見 敬 埼玉県羽生市東5丁目4番71号 曙ブレー キ工業株式会社開発本部内 (72)発明者 小林 忠 埼玉県羽生市東5丁目4番71号 株式会社 曙ブレーキ中央技術研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kei Kunimi 5-4-71 Higashi, Hanyu City, Saitama Prefecture, Akebono Break Industrial Co., Ltd. (72) Inventor Tadashi Kobayashi 5-471 Higashi, Hanyu City, Saitama Prefecture Akebono Brake Central Technology Research Institute Co., Ltd.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 シリコンセンサチップに枠状の周縁部,
ほぼ中央に位置したマス支持部,該マス支持部を支持し
た薄肉部を形成し、前記マス支持部の下面にガラスから
なるマス部を接着するとともに、前記周縁部にリム部を
接着し、前記マス部に対向したシリコン台座の上面に絶
縁膜を形成した後、前記マス部の下面との間に空隙を形
成して前記リム部の下面に前記シリコン台座を接着する
ことを特徴とする半導体加速度センサの製造方法。
1. A silicon sensor chip having a frame-shaped peripheral portion,
A mass supporting portion located substantially in the center and a thin portion supporting the mass supporting portion are formed, and a mass portion made of glass is bonded to the lower surface of the mass supporting portion, and a rim portion is bonded to the peripheral portion, After forming an insulating film on the upper surface of the silicon pedestal facing the mass portion, a gap is formed between the silicon pedestal and the lower surface of the mass portion to bond the silicon pedestal to the lower surface of the rim portion. Sensor manufacturing method.
【請求項2】 枠状の周縁部,ほぼ中央に位置したマス
支持部,該支持部を支持した薄肉部を有するシリコンセ
ンサチップと、前記支持部の下面に接着されたガラスか
らなるマス部と、前記周縁部の下面に接着されたリム部
と、該リム部の下面に接着されたシリコン台座と、該台
座と前記マス部の下面との間に形成された空隙と、該空
隙の前記マス部に対向した前記台座の上面に形成された
凹凸層とを備えた半導体加速度センサ。
2. A silicon sensor chip having a frame-shaped peripheral portion, a mass support portion located substantially at the center, a thin wall portion supporting the support portion, and a mass portion made of glass adhered to the lower surface of the support portion. A rim portion adhered to the lower surface of the peripheral portion, a silicon pedestal adhered to the lower surface of the rim portion, a void formed between the pedestal and the lower surface of the mass portion, and the mass of the void. Acceleration sensor provided with an uneven layer formed on the upper surface of the pedestal facing the section.
【請求項3】 枠状の周縁部,ほぼ中央に位置したマス
支持部,該支持部を支持した薄肉部を有するシリコンセ
ンサチップと、前記支持部の下面に接着されたガラスか
らなるマス部と、前記周縁部の下面に接着されたリム部
と、該リム部の下面に接着されたシリコン台座と、該台
座と前記マス部の下面との間に形成された空隙と、該空
隙の前記台座に対向した前記マス部の下面に形成された
凹凸層とを備えた半導体加速度センサ。
3. A silicon sensor chip having a frame-shaped peripheral portion, a mass support portion located substantially in the center, a thin portion supporting the support portion, and a mass portion made of glass adhered to the lower surface of the support portion. A rim portion bonded to the lower surface of the peripheral portion, a silicon pedestal bonded to the lower surface of the rim portion, a void formed between the pedestal and the lower surface of the mass portion, and the pedestal of the void And a concavo-convex layer formed on the lower surface of the mass portion facing the semiconductor acceleration sensor.
JP04345562A 1992-11-30 1992-11-30 Semiconductor acceleration sensor and method of manufacturing the same Expired - Fee Related JP3093066B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04345562A JP3093066B2 (en) 1992-11-30 1992-11-30 Semiconductor acceleration sensor and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04345562A JP3093066B2 (en) 1992-11-30 1992-11-30 Semiconductor acceleration sensor and method of manufacturing the same

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Publication Number Publication Date
JPH06167510A true JPH06167510A (en) 1994-06-14
JP3093066B2 JP3093066B2 (en) 2000-10-03

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Country Link
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