JPH06164566A - Phase synchronizing system - Google Patents

Abstract

PURPOSE:To obtain phase synchronism with fluctuation of transmission delay time precisely corrected by phase-comparing clock components extracted from a transmission line signals and measuring the fluctuation amount of transmission delay time. CONSTITUTION:In a main station 301, the clock component 328 of an STM-16 signal returned from a slave station 302 is extracted in a clock extraction part 308, and a frequency-dividing circuit 329 frequency-divides it to a 8kHz signal 330. The frequency-dividing signal 330 is phase-compared with an intra-station reference frame signal 331 generated in a clock supply device in a comparison part 333 and phase fluctuation from an initial state is measured. A half of the measured phase fluctuation is set to be phase fluctuation from the initial value of the delay time of a going transmission line, is transmitted to a synthesis part 313 as delay fluctuation information 334, is stored in a VC-32 reference phase signal and is transmitted to the slave station. The slave station 302 separates a reference phase pulse 319 from phase control information 335 in a separation part 318 and they are transmitted to a phase control part 320. The control part 320 phase-controls the pulse 319 based on information 335 and obtains a reference phase pulse 336 synchronized with the reference phase of the main station.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase synchronization system for establishing phase synchronization between geographically distant devices in a digital communication network.

[0002]

2. Description of the Related Art Conventionally, in order to establish frequency synchronization between a master device and a slave device, which are installed geographically separated from each other, a clock component (frequency component) is transmitted from a transmission path signal transmitted from the master device to the slave device. ) Is extracted, and the slave oscillator of the device is phase-locked according to the clock component.

In this system, as shown in FIG.
1 transmits the transmission line signal 804 synchronized with the reference frequency 803 of the main device, the slave device 802 synchronizes with the main device by phase-locking the clock component 805 of the transmission line signal with the oscillator 806 of the slave device. Frequency synchronization of the slave device is realized.

As a method of correcting the transmission line delay between the main device and the slave device to realize the phase synchronization between the two devices, the round trip delay time is measured using a folded transmission line and
There is a method of correcting 2 as a one-way delay time.

In this system, as shown in FIG.
1 transmits the reference phase signal 905 and the delay information 906 to the slave device 902 via the forward transmission path 903, and the slave device returns the reference phase signal to the main device via the backward transmission path 904 and also returns the reference phase signal. The phase of the signal is controlled by the phase controller 910 based on the delay information, and the phase signal 907 synchronized with the main device is generated. The delay information 906 is the phase difference Δ between the reference phase signal 905 and the reference phase signal 908 returned from the slave device in the delay measuring unit 909 of the master device.
D is measured and 1/2 of the measured D is created as delay information.

Assuming that the forward delay time is ΔT1 and the backward delay time is ΔT2, ΔD is ΔD = ΔT1 + ΔT2. Since the forward transmission path and the return transmission path generally pass through the same route and have substantially the same length, ΔT1 = ΔT2 can be set. Therefore, the forward delay time ΔT1
Can be calculated from the delay time ΔD of the folded transmission line by ΔT1 = ΔD / 2.

[0007]

In the frequency synchronization method described above, the phase relationship between the main device and the slave device fluctuates because the delay time between the transmission lines of the main device and the slave device fluctuates.
CCITT Recommendation (G.824) stipulates that the phase fluctuation between devices is 10 μs or less in the entire network. Since the phase fluctuation amount of the entire network is determined by the delay fluctuation amount of the transmission path + the error amount per one synchronization device × the number of subordinate connections, the number of subordinate connections of the synchronization device is limited. If the delay variation of the transmission line can be corrected, the number of subordinate connections can be increased, and the frequency synchronization network can be configured more flexibly.

CCITT Recommendation (G.707, G.70
8, G.I. 709), a network using a synchronous interface such as a network interface conforming to
After the transmission signal is transferred to the reference clock of the station in which the device is installed, processing such as demultiplexing is performed. When the above-mentioned phase synchronization system is applied to such a network, there is a problem that it is difficult to accurately determine the transmission delay, especially the variation due to the clock replacement, and a phase synchronization error occurs.

In addition, CCITT recommendation (G.707, G.707).
708, G.I. 709), the interface having an overhead area where information signals are not accommodated is used for network maintenance and management such as a network interface. If you send a phase signal,
When the reference phase signal is multiplexed with the high-speed transmission line signal, there is a problem that a large phase error occurs in the terminal device due to the overhead area.

If the transmission path signal is directly used as the reference phase signal, no phase error will occur, but in order to superimpose the reference phase signal on the transmission path signal, a large modification of the existing transmission device is required, which is economically feasible. Not preferable.

SUMMARY OF THE INVENTION It is an object of the present invention to solve such conventional problems and to realize a phase synchronization system with a small phase error.

[0012]

The present invention has been made to solve the above problems. That is, according to the present invention, the master device transmits the reference phase signal to one or more slave devices connected via the transmission path, the slave device returns the reference phase signal to the master device, and the master device transmits the reference phase signal. The transmission delay time between the main device and the slave device and its fluctuation are measured from the phase difference between the reference phase signal returned and the returned reference position transmission signal, and the transmission delay and its fluctuation information are transmitted to the slave device as phase control information. In the phase synchronization method, the slave device performs phase control of the reference phase signal transmitted from the main device based on the phase control information transmitted from the main device, and generates a signal synchronized with the phase generated by the main device. , The measurement of the fluctuation of the transmission delay time is
It is performed by comparing the phases of the clock components extracted from the transmission line signal, and the measurement of the initial value of the transmission line delay time and the transmission of the reference phase signal and the phase control information are performed at a low speed multiplexed on the transmission line signal. It is a phase synchronization method that is performed using a line.

[0013]

In the present invention, the variation of the transmission delay time is measured by
This is performed by comparing the phases of the clock components extracted from the transmission path signal. The transmission line signal is high-speed, and the clock component extracted therefrom reflects only the phase of the device that transmitted the transmission line signal and the delay variation of the transmission line, regardless of the presence of overhead in the transmission line signal. , Accurate phase synchronization can be realized.

Further, since the reference phase signal and the phase control information are transmitted using the low speed line, it is not necessary to modify the existing transmission device, and the efficient use of the transmission line can be realized.

[0015]

EXAMPLE [A] An example in which the present invention is applied to a transmission line network having a new synchronous interface defined in CCITT Recommendations (G.707, G.708, G.709) will be described below as an example. However, the present invention is not limited to this, and can also be applied to networks having other interfaces.

(1) Description of SDH The new synchronous interface specified in the CCITT recommendation is a synchronous transport module (STM), which is an information structure having the transmission speed of the network node interface, and a signal lower than the transmission line speed. To recognize a certain virtual container (VC), a section overhead (SOH) for transmitting the frame synchronization signal of STM and the management and maintenance information of the transmission path, a payload containing the virtual container, frequency synchronization by stuffing, and a VC frame. It is composed of pointers.

In the example of FIG. 1, as the frame structure of the STM-0 (101) having a transmission rate of 51.84 Mb / s, the SOH (102) and the VC-32 contained in the payload 103 in which the information signal is transmitted. Signal 104, VC-3
AU-32 pointer 105 for pointing the start position of two signals
It is shown. The VC-32 is a path overhead (POH) 106 that stores management information of the VC-32,
It is composed of a payload 107 that accommodates a lower speed information signal. STM-0 has a transmission speed of 622.08 Mb / s due to the simple accumulation in bytes.
4 or 2488.32 Mb / s STM-16 signal.

(2) Explanation of clock transfer The transmission device to which the new synchronization interface is applied operates in synchronization with the in-station reference clock of the station in which the transmission device is installed. In the transmission device that has received the transmission path signal transmitted from another station, the transmission path signal is transferred to the in-station reference clock to perform operations such as multiplexing and demultiplexing. Here, the clock replacement of the STM transmission path signal described above will be described.

FIG. 2 shows an example in which an STM-0 arriving at a certain station is transferred to another STM-0 synchronized with the in-station reference frame signal of the station. The intra-station reference frame signal is an 8 kHz signal generated by a clock supply device installed in the station. In the figure, 201 indicates an arrived STM-0 frame signal, and 202 indicates an STM-0 frame synchronized with the in-station reference frame signal.

The STM-0 frame signal 201 arrived and the STM-0 signal 202 synchronized with the intra-station reference frame signal
And the head phase difference between the frames is X bytes, and the AU-32 pointer 205 of the arrived STM-0 frame signal
Is Y, the AU-32 pointer 206
By setting the value of X to Y, the VC-32 (203) accommodated in the arriving STM-0 is transferred to the STM-0 synchronized with the in-station reference frame signal without changing the start position.
It can be accommodated as C-32 (204). Thereby, if the head position of the VC-32 signal is used as a reference, the transmission delay time between two stations having different intra-station reference frame signals can be measured.

Since the start position of the VC-32 is designated in byte units, if the phase of the intra-office reference frame signal fluctuates, a clock error causes a quantization error of 1 byte or less at the start position of the VC-32. . Further, even when the head position of the VC-32 overlaps with the SOH when changing the clock, the VC-32 is accommodated while avoiding the SOH.
An error occurs at the head position of C-32.

(3) A configuration diagram of an embodiment of the present invention based on the above is shown in FIG. In the embodiment, the STM- transmitted from the master station to the slave station by the frequency synchronization method shown in the conventional example.
This is an example in which the state in which the clock supply device of the slave station is in phase synchronization with the clock component of the 16-channel signal is developed to establish the phase synchronization between the master station and the slave station.

The feature of this embodiment is that the master station extracts the clock component of the STM-16 transmission line signal returned from the slave station to the master station, and determines the phase difference between the clock component and the clock supply device of the master station. The purpose is to obtain the fluctuation of the transmission delay time by measurement. In addition, the reference phase signal and the phase control information are sent to the STM.
-16 The VC-32 signal multiplexed on the transmission line signal is used to transmit from the master station to the slave station, and the VC-32 signal is returned from the slave station to the master station to measure the initial value of the transmission delay time. It is also a feature of this embodiment.

The phase synchronization operation of this embodiment will be described in detail below. [B] Description of Operation of Embodiment (1) Configuration of Embodiment As shown in FIG. 3, an STM-0 signal accommodating a VC-32 signal is sent to each of the master station 301 and the slave station 302 by S.
Terminal equipments 303 and 305 that multiplex into TM-16 transmission path signals and send them to the transmission path, and terminal equipment 304 that terminates STM-16 transmission path signals and separates them into STM-0 signals accommodating VC-32 signals. , 306. The terminal equipment also
Clock extraction units 307 and 308 are provided for extracting clock components from the STM-16 transmission path signal. The terminal devices of the master station and the slave station operate in synchronization with the frequencies generated by the clock supply devices 309 and 310 of the respective stations and the intra-station reference frame signals 331 and 332, except for the clock extraction unit.

(2) Measurement of initial value of delay time The reference phase pulse 312 generated in the reference phase generating section 311 of the master station is converted into the VC-32 reference phase signal in the synthesizing section 313 and accommodated in the STM-0 signal 314. After that, the terminal device 303 multiplexes the STM-16 transmission path signal 315,
It is transmitted to the slave station via the outward transmission path 316.

Normally, the terminal device uses an STM signal as an input interface, so that the VC-
The 32 reference phase signal is once accommodated in the STM-0 signal and then sent to the terminal device. At the slave station, the transmitted STM-
16 transmission line signals are transmitted by the terminal device 304 to the STM-0 signal 31
It is separated into 7. In the separating unit 318, the STM-0 signal 3
The reference phase pulse 319 is separated from the VC-32 reference phase signal accommodated in 17 and sent to the phase controller 320.

Also, the STM-0 signal 317 accommodating the VC-32 reference phase signal is folded back, and the terminal device 305 is returned.
And again multiplexed into the STM-16 transmission line signal 321 and
It is returned to the main station via the return transmission line 322. In the main station, the terminal device 306 separates the STM-0 signal 523, and then the separation unit 324 separates the reference phase pulse 325.

The delay measuring section 326 of the master station measures the time difference between the reference phase pulse 312 sent from the reference phase generating section and the reference phase pulse 325 returned from the slave station,
One half of this is set as the initial value of the delay time of the forward transmission path, and the initial delay time information 327 is sent to the combining unit 313.

(3) Configuration of Reference Phase Signal FIG. 4 is a diagram showing a configuration example of the VC-32 reference phase signal. Since the VC-32 reference phase signal 401 measures the transmission delay time, the reference phase pulse at 1 second intervals is superimposed. Since the VC-32 signal has a frame structure with a cycle of 8 kHz, the second signal identifier 403 is added to the VC-32 signal for every 8000 frames, and the leading position 402 of the frame to which the second signal identifier is added is extracted as a reference second pulse. Then
It is used to measure the initial value of the transmission delay time. Further, the phase control information 404 for performing delay correction is VC
It is accommodated in the payload part of the -32 signal.

(4) Phase relationship of signals FIG. 5 shows a second phase pulse which is a reference phase pulse when measuring the initial value of the delay time, a frame signal which is synchronized with the second pulse,
3 shows the phase relationship of intra-station reference frame signals.
The phase of the frame signal (b) synchronized with the second pulse is 800
Once every 0 pulse, it corresponds to the second pulse (a).

The VC-32 reference phase signal (c) is generated in synchronism with the frame signal synchronized with the second pulse, but the signal of the frame coincident with the second pulse (frame shown by hatching in the figure) has a second An identifier is added. The STM-0 signal accommodating the VC-32 reference phase signal is generated in synchronization with the intra-station reference frame signal (d) of the main station.
The phase at the head position of the VC-32 is held by the pointer instruction (e).

STM containing a VC-32 reference phase signal
The -0 signal is transmitted to the slave station via the forward transmission path, that is, with a delay of the forward delay time ΔT1 (f). ST synchronized with the transmitted reference frame signal (g) of the slave station
It is transferred to the M-0 signal (h). Since this is performed by the above-mentioned clock switching method, (f) and (g)
During this period, the start position of the VC-32 is held, and the second pulse (i) obtained by extracting the start position of the VC-32 to which the second identifier is added is longer than the second pulse (a) of the main station in the forward delay time ΔT1. Will be delayed only.

ST containing a VC-32 reference phase signal
The M-0 signal is returned from the slave station to the master station via the return transmission line (j). The returned signal is transferred to the STM-0 signal synchronized with the intra-station reference frame signal (k) (= (d)) of the main station (1). Since the leading position of the VC-32 is held between (j) and (l) also in this clock transfer, the second pulse (m) separated by the master station is separated from the second pulse (i) by the slave station. The delay time ΔT2 on the return path is delayed as compared with. Therefore, the delay amount ΔD of the reference phase pulse measured by the delay measuring unit of the main station is ΔD = ΔT1 + ΔT2. Assuming ΔT1 = ΔT2, the delay ΔT1 of the forward transmission path is obtained by ΔT1 = ΔD / 2.

(5) Measurement of variation in delay time Further, in the master station, the clock extraction unit 308 extracts the clock component 328 of the STM-16 signal returned from the slave station, and the frequency dividing circuit 329 converts it into the 8 kHz signal 330. It is dividing. The frequency comparison signal 330 and the intra-station reference frame signal 331 generated by the clock supply device are compared in phase by the phase comparison unit 333, and the phase fluctuation from the initial state is measured.
The half of the phase fluctuation measured in this way is taken as the phase fluctuation from the initial value of the delay time of the forward transmission path, and the delay fluctuation information 334
To the synthesizing unit 313.

An initial value of the delay time of the above-mentioned forward transmission path,
The phase fluctuation from the initial value of the delay time of the forward transmission path is contained in the VC-32 reference phase signal in the combining unit 313 as phase information and transmitted to the slave station. In the slave station, the reference phase pulse 319 and the phase control information 335 are separated by the separation unit and sent to the phase control unit 320. The phase control unit controls the phase of the reference phase pulse 319 based on the phase control information 335, and the reference phase pulse 336 synchronized with the reference phase of the master station.
Is being generated.

Here, paying attention to the clock of each device and each signal, in the slave station, the STM-0 signal 317 separated from the STM-16 transmission path signal is the intra-station reference frame signal of the slave station by the above-mentioned clock transfer method. It has been transferred to 332. The clock supply device 310 of the slave station is in phase synchronization with the clock component 337 extracted from the STM-16 signal by the clock extraction unit.

When the delay time of the forward transmission path changes, the phase of the clock supply device of the slave station changes accordingly,
The phase of the VC-32 reference phase signal accommodated in the STM-0 signal separated by the terminal device of the slave station accurately reproduces the delay fluctuation of the forward transmission path.

On the other hand, the clock supply device 309 of the master station has no relation to the STM-16 transmission path signal transmitted from the slave station, and therefore is not affected by the delay fluctuation of the return transmission path. Therefore, the VC-32 contained in the STM-0 signal 323 transferred to the intra-station reference frame signal 331 of the main station
The phase of the reference phase signal does not reproduce the return path delay variation, and as described in the clock replacement method, the VC-3
The leading position of the two signals will be accompanied by a phase error. In order to avoid this phase error, in this embodiment, the transmission line delay variation is measured using the clock component 328 extracted from the STM-16 transmission line signal.

Fluctuations from the initial values of the forward delay time and the backward delay time are defined as δT1 and δT2, respectively. Since the clock supply device 310 of the slave station changes its phase in accordance with the delay variation δT1 of the forward transmission path, the STM-16 transmission path signal 321 transmitted from the terminal device of the slave station to the master station in synchronization with it.
Also, the phase varies with the delay variation δT1 of the forward transmission path. Since the STM-16 transmission line signal 321 sent to the main station is further influenced by the delay variation δT2 of the return transmission line, the phase variation δD of the clock component 328 of the STM-16 transmission line signal extracted by the main station is δD = δT1 + δT2, which is equal to the sum of the delay variation with the forward path and the delay variation with the return path. Since the outbound path and the inbound path are installed under the same environment, the delay variations of both are substantially equal, and δT1 = δT2 is established. Therefore, the delay variation δT1 of the forward transmission path is δT1 = δD / 2, and the STM returned from the slave station as in the present embodiment.
It is obtained by measuring 1/2 of the fluctuation of the phase difference between the clock component of the −16 signal and the clock supply device of the master station. An example of measuring the delay variation characteristics of the forward path and the backward path in an actual transmission path is described in the literature “Imaoka, Kihara: IEICE Transactions BI, Vol. J74-BI, No. 4, pp. 3”.
52-359, 1991 ".

(6) Combining Unit The composing unit of the master station is realized by the structure shown in FIG. In the synthesizing section, the synchronous frame signal generating section 603 generates a frame pulse 607 synchronized with the reference phase pulse 604.
The VC-32 reference phase signal generation unit 601 generates a VC32 reference phase signal 605 based on the frame signal 607 synchronized with the reference phase pulse. An identifier of the reference phase pulse is added to the VC32 reference phase signal as shown in FIG. 4, and initial delay time information 609 and delay variation information 610 are superimposed. VC32 reference phase signal is VC-3
The 2-STM-0 conversion unit 603 uses the intra-station reference frame 608.
It is accommodated in the STM-0 signal 606 synchronized with and is sent to the terminal device.

(7) Separation Unit The separation unit for the master station and the slave station is realized by the structure shown in FIG.
The ST separated from the STM-16 transmission path signal by the terminal device
The M-0 signal 703 is sent to the STM-0-VC-32 conversion unit 7
At 01, it is converted into a VC-32 reference phase signal 704, and at the separating section 702, the reference phase pulse 705 and the phase control information 706 are extracted. VC-3 arriving at the separation section of the main station
Since the phase control information is not superimposed on the two reference phase signals, the function of extracting the phase information is unnecessary in the separation unit of the main station.

(8) Phase control section The phase control section receives the phase control information and controls the phase of the reference phase pulse. Initially, the phase control is corrected by the initial delay time ΔD / 2 of the forward path measured by the delay measurement section of the main station, and the delay variation after that is corrected by the forward path delay measurement measured by the phase difference measurement section of the main station. Phase control is performed at δD / 2. The phase controller can be realized by a counter and a phase locked oscillator.

(9) Terminal Station Device The terminal station device can be realized by a multiple repeater device called module A. The module A includes an STM-0 interface section and a clock extraction section. For the module A, refer to the document “Ueda, Tsuji, Tsuboi: Synchronous terminal equipment applying a new synchronous interface, NTT R & D, Vol.
39, No. 4, pp. 627-638, 1990 ".

(10) Clock Supply Device The clock supply device is a clock supply module (CS
It can be realized by a device called M). The CSM is composed of a phase-locked oscillator that oscillates in phase with the clock component of the transmission path signal extracted by the clock extraction unit of the terminal device. Regarding CSM, refer to the document “Tsuji, Katsuta: New network synchronizer with high stability, NTT R & D, Vol.
9, No. 4, pp. 649-658, 1990 ".

(11) Counter In the delay measuring section and the phase comparing section, the time interval between two input pulses is counted and measured by the counter. When the frequency of the counter is f and the number of counts is N, the time interval (or phase difference) ΔT can be obtained by ΔT = N / f.

As described above, the configuration of FIG.
Phase synchronization can be established between the master station and the slave stations, with the transmission delay time and its fluctuations corrected. In addition, multiple connections of this structure can realize highly accurate phase synchronization among a large number of stations.

[0047]

As described above, according to the present invention,
It is possible to realize phase synchronization in which fluctuations in transmission delay time are accurately corrected. This phase synchronization eliminates the phase error due to the transfer of the clock of the transmission signal, and has an advantage that it can be realized without making a major modification to the existing transmission device.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a frame structure of an STM-0 signal.

FIG. 2 is a diagram for explaining clock replacement of an STM-0 signal.

FIG. 3 is a diagram showing an embodiment of the present invention.

FIG. 4 is a diagram showing a configuration example of a VC-32 reference phase signal.

FIG. 5 is a diagram showing a phase relationship of each signal.

FIG. 6 is a diagram illustrating a configuration example of a combining unit.

FIG. 7 is a diagram illustrating a configuration example of a separation unit.

FIG. 8 is a diagram illustrating a conventional frequency synchronization method.

FIG. 9 is a diagram illustrating a conventional phase synchronization technique.

[Explanation of symbols]

101 STM-0 signal 102 Section overhead 103 Payload 104, 403, 404 VC-32 signal 105 AU-32 pointer 106 Path overhead 107 VC-32 payload 201 STM-0 signal arriving at a station 202 Synchronized with an intra-station reference frame STM-0 signal 205 AU-32 pointer of 401 206 AU-32 pointer of 402 301, 801, 901 Main device 302, 802, 902 Slave devices 303 to 306 Terminal device 307, 308 Clock extraction unit 309 Clock supply of main station Device 310 Clock supply device for slave station 311 and 910 Reference phase signal generator 312, 319, 325, 604 and 705 Reference phase pulse 313 Combiner 314, 317, 323, 606 and 703 Reference phase signal is accommodated STM-0 signal 315, 321 STM-16 transmission line signal 316, 903 Forward transmission line 318, 324 Separation unit 320, 911 Phase control unit 322, 904 Return transmission line 326 Initial delay measurement unit 327, 609 Initial delay time information 328, 337 Transmission line clock component 329 Frequency division unit 330 8 kHz signal 331, 332 In-station reference frame signal 333 Phase comparison unit 334, 610 Delay variation information 335, 404, 706 Phase control information 401, 605, 704 VC-32 Reference phase signal 402 VC-32 start position 403 seconds signal identifier 601 VC-32 reference signal generation unit 602 VC-32-STM-0 conversion unit 603 synchronization frame signal generation unit 607 frame signal synchronized with reference phase pulse 701 STM-0-VC- 32 converter 702 VC- 2 Reference signal separation unit 803 Master station frequency 804 Transmission line signal 805 Clock component of transmission line signal 806 Slave oscillator 807 Frequency synchronized with master station 808 Master oscillator 809,810 Transmission device 905 Reference phase signal 906 Delay information 907 Synchronized with main station Phase signal 908 Returned reference position transmission signal 909 Delay measurement unit

Claims (1)

[Claims] 1. The main unit is connected via a transmission line.
The reference phase signal is transmitted to one or more slave devices, the slave device returns the reference phase signal to the master device, and the master device determines the master device from the phase difference between the transmitted reference phase signal and the returned standard position transmission signal. The transmission delay time between the slave and the slave device and its fluctuation are measured, and the transmission delay and its fluctuation information are transmitted to the slave device as phase control information.The slave device, based on the phase control information transmitted from the master device, In the phase synchronization method that controls the phase of the reference phase signal sent from the equipment and generates the signal synchronized with the phase generated by the main equipment, in the measurement of the variation of the transmission delay time, the clock component extracted from the transmission path signal is measured. , And the initial value of the transmission line delay time and the transmission of the reference phase signal and phase control information are performed using a low-speed line multiplexed on the transmission line signal. Features and That phase synchronization method.