JPH06152413A - Interpolating circuit - Google Patents

Abstract

PURPOSE:To interpolate not only for between the reference voltages of a differential amplifier but also for the outside of that range. CONSTITUTION:When two differential amplifiers are defined as A and B and respective non-inverted outputs and inverted outputs are expressed by AP, AN, BP and BN, an interpolating voltage VG (AB) is generated by dividing a voltage between the non-inverted output AP of the differential amplifier A and the inverted output BN of the amplifier B at a voltage divider means. Similarly, interpolating voltage groups VG (AA) and VG (BB) are generated by respectively dividing voltages between the non-inverted output AP of the differential amplifier A and the inverted output AN and between the non- inverted output BP of the differential amplifier B and the inverted output BN at the voltage dividing means. Then, comparator groups compare the interpolating voltage groups VG (AB) with VG (AA) and also interpolating voltage groups VG (AB) with VG (BB).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interpolation circuit used in an analog / digital converter for converting an analog signal into a digital signal.

[0002]

2. Description of the Related Art FIGS. 5 and 6 show a conventionally proposed interpolation circuit and its principle (IEEE J. of Solid-State ci).
rcuits, vol.SC-22, No.6, Dec.1987). As shown in FIG. 5, in the conventional circuit, the voltage dividing means 2 divides the voltage between the non-inverting output AP of the differential amplifier A and the non-inverting output BP of the differential amplifier B to obtain the inverting output AN of the differential amplifier A. The voltage dividing means 1 divides the voltage between the output of the differential amplifier B and the inverted output BN of the differential amplifier B. Here, the voltage generated by the voltage division between the outputs of the differential amplifier will be referred to as an interpolation voltage, and the collection thereof will be referred to as an interpolation voltage group.

The interpolation voltage group generated by the voltage division between the non-inverted outputs and the interpolation voltage group generated by the voltage division between the inverted outputs are
As shown in FIG. 6, the reference voltages VA and VB of the differential amplifier intersect. Therefore, the A / D conversion can be performed by comparing the two voltages intersecting at the intersection indicated by the circle with the comparator group 5.

[0004]

However, in this interpolation circuit, between the reference voltages of the two differential amplifiers, that is,
Interpolation can only be performed between VA and VB. In the case of the serial-parallel type A / D converter, the A / D conversion is performed by expanding the range of the conversion in the second stage to be wider than the conversion range in the first stage in order to suppress the error due to the upper and lower voltage offsets. However, since the conventional circuit shown in FIG. 5 can interpolate only between the reference voltages of the differential amplifier, a special circuit configuration is required to expand the range, resulting in an increase in the number of elements and power consumption.

The present invention has been made in view of the problems described above, and an object thereof is to provide a circuit which can interpolate not only between the reference voltages of two differential amplifiers but also outside the range.

[0006]

[Means for Solving the Problems]

(1) Assume that two differential amplifiers are A and B, and their non-inverting output and inverting output are represented by AP, AN, BP, and BN. Non-inverting output AP of differential amplifier A and inverting output B of B
The voltage dividing means divides the voltage between N to generate the interpolation voltage VG (AB). Similarly, between the non-inverting output AP and the inverting output AN of the differential amplifier A and the non-inverting output BP of the differential amplifier B.
And the inverting output BN are divided by voltage dividing means to generate interpolation voltage groups VG (AA) and VG (BB). And
Between interpolation voltage group VG (AB) and VG (AA), and interpolation voltage group VG
Comparing between (AB) and VG (BB) with a comparator group.

(2) The voltage between the non-inverted output AP and the inverted output AN of the differential amplifier A, and between the non-inverted output BP and the inverted output BN of the differential amplifier B are divided by the voltage dividing means, and the interpolated voltage is obtained. Generate groups VG (AA) and VG (BB). Similarly, a voltage dividing means is provided between the non-inverting output AP of the differential amplifier A and the inverting output BN of the differential amplifier B, and between the inverting output AN of the differential amplifier A and the non-inverting output BP of the differential amplifier B, respectively. The voltage is divided by to generate interpolation voltage groups VG (AB) and VG (BA).
Then, the interpolation voltage groups VG (AA) and VG (BB) and the interpolation voltage groups VG (AB) and VG (BA) are compared by the comparator group.

[0008]

[Action]

(1) Between the outputs of AP and AN, BP and BN, AP and BN,
Consider a case where the voltage dividing means divides the signal into n equal parts. Here, the reference voltages of the differential amplifiers A and B are set to VA and VB, respectively.
And half of the voltage difference is VH. AP and BN
The locus drawn by the point internally dividing (1 ≦ m ≦ n / 2) vs nm is between the locus drawn by the point internally dividing BP and BN by nm vs m and between VA−VH and VA + VH. The locus drawn by points that not only internally divide mn to m but also AP and AN into nm and m, and m to nm between VA-VH and VA + VH.
Divide into On the other hand, if n / 2 <m ≦ n−1, AP
And the trajectory drawn by the point that internally divides AN into nm vs. m, and VB-
At the same time as internally dividing between VH and VB + VH into nm-m, at the same time as internally dividing BP and BN into nm-m, the locus drawn between VB-VH and VB + VH becomes m-n-m. Divide internally. In this way, the voltage range from VA-VH to VB + VH can be equally divided into 2n. Moreover, the differential gain at each comparison point is equal at all points.

(2) Interpolation voltage group VG (AA) generated by dividing the output AP and AN of the differential amplifier A and interpolation generated by dividing the output BP and BN of the differential amplifier B. Voltage group VG (B
B) intersects between the respective reference voltages VA and VB. Therefore, by weighting the dividing ratio, V
Interpolation between A and VB is possible. Further, the interpolation voltage group VG (AB) generated by dividing the non-inverting output AP of the differential amplifier A and the inverting output BN of the differential amplifier B is an interpolation voltage group generated by dividing the voltage between AN and BP. Group VG (BA) and reference voltage VA and VB
Meet outside between. Therefore, it is possible to interpolate between the reference voltages by weighting the dividing ratio.

[0010]

【Example】

(Embodiment 1) FIG. 1 shows an embodiment of claim 1 in which n = 8 is equally divided between AP and AN, BP and BN, and AP and BN. A and B are differential amplifiers, 1, 2 and 3 are voltage dividing means, and 5 and 6 are comparator groups. The non-inverting output AP and the inverting output AN of the differential amplifier A are divided by the voltage dividing means 1 to generate an interpolation voltage group VG (AA). Similarly, the non-inverting output BP and the inverting output BN of the differential amplifier B are the voltage dividing means 3
Then, the non-inverting output AP of the differential amplifier A and the inverting output BN of the differential amplifier B are divided by the voltage dividing means 2 to generate interpolation voltage groups VG (BB) and VG (AB), respectively. Each of the interpolation voltages thus obtained changes as shown in FIG. 2 with respect to the input voltage Vin.

Therefore, a double range between VA and VB can be A / D converted by comparing two voltages intersecting at each intersection indicated by a circle in FIG. 2 by the comparator group. Here, the above is proved in the coordinate system shown in FIG. However, the interpolation voltages of the interpolation voltage groups VG (AA), VG (AB), and VG (BB) are represented by α, β, and γ. The outputs AP, AN, BP, and BN of the two differential amplifiers are represented by (Equation 1), (Equation 2), (Equation 3), (Equation 4), respectively. However,
x = Vin.

[0012]

[Equation 1]

[0013]

[Equation 2]

[0014]

[Equation 3]

[0015]

[Equation 4]

AP and AN, AP and BN, BP and BN
= 2k, the j-th interpolation voltage α (j), β (j), γ (j) (j = 0, ± 1, ±
2, ..., ± k) can be expressed by (Equation 5), (Equation 6), (Equation 7), respectively.

[0017]

[Equation 5]

[0018]

[Equation 6]

[0019]

[Equation 7]

(1) The intersection of β (i) and α (-k + i) is obtained from the area (Equation 8) where -a≤x≤0.

[0021]

[Equation 8]

From (Equation 8), it can be seen that these intersection points equally divide k from -a to 0. On the other hand, the differential gain at each intersection becomes b / a from (Equation 9), and is always constant regardless of k.

[0023]

[Equation 9]

(2) The intersection of β (i) and γ (-k + i) is obtained from the region of 0≤x≤a (Equation 10).

[0025]

[Equation 10]

From (Equation 10), it is understood that 0 to a are equally divided into k by these intersections. Further, the differential gain at each intersection becomes b / a from (Equation 11), and is always constant regardless of k.

[0027]

[Equation 11]

In the range of a≤x≤3a, it is clear from the symmetry that n = 2k is equally divided for the same reason. Therefore, the interval of −a ≦ x ≦ 3a is 2n.
= 4k = 16 will be equally divided. As described above, according to the present circuit, the double range between the reference voltages of the differential amplifier can be interpolated, and moreover, the differential gain at each comparison point can be kept constant.

(Embodiment 2) FIG. 3 shows an embodiment according to claim 2 in the case where VA and VB are divided into eight equal parts.
The output voltage AP and AN of the differential amplifier A is divided by the voltage dividing means 1 at a ratio of 20: 2: 3: 10. Similarly, between the output voltages BP and BN of the differential amplifier B is divided by the voltage dividing means 2 at a ratio of 10: 3: 2: 20. The respective interpolation voltages generated in this way are compared by the comparator group 5,
As shown in FIG. 4, A / D conversion is performed between VA and VB.

Further, between the non-inverting output AP of the differential amplifier A and the inverting output BN of the differential amplifier B, and between the inverting output AN of the differential amplifier A and the non-inverting output BP of the differential amplifier B, respectively. Interpolation voltage group obtained by dividing the voltage by the voltage dividing means 3 and 4.
VG (AB) and VG (BA) are generated, and both are compared by the comparator group 6 to perform A / D conversion between outside and outside of the reference voltage.

[0031]

As described above, the interpolation circuit of the present invention can interpolate not only between the reference voltages of two differential amplifiers but also outside the range. Therefore, the same section can be interpolated with a smaller number of differential amplifiers as compared with the conventional circuit, so that the number of elements and the occupied area can be significantly reduced.

[Brief description of drawings]

FIG. 1 is an interpolation circuit diagram showing an embodiment according to claim 1 of the present invention.

FIG. 2 is an explanatory diagram showing an interpolation method of the embodiment of FIG.

FIG. 3 is an interpolation circuit diagram showing an embodiment of claim 2 of the present invention.

FIG. 4 is an explanatory diagram showing an interpolation method of the embodiment of FIG.

FIG. 5 is an interpolation circuit diagram showing a conventional example related to the present invention.

6 is an explanatory diagram showing an interpolation method of the conventional example of FIG.

[Explanation of symbols]

 A, B differential amplifiers 1, 2, 3, 4 voltage dividing means 5, 6 comparator group

Claims (2)

[Claims] 1. A voltage dividing means divides the voltage between the non-inverting output and the inverting output of two differential amplifiers A and B, and the non-inverting output of one differential amplifier A and the other differential amplifier B. An interpolating circuit, characterized in that a voltage dividing means divides the voltage between the inverted outputs of. 2. An interpolation circuit, wherein the voltage dividing means divides the voltage between the inverting output of the differential amplifier A and the non-inverting output of the differential amplifier B according to claim 1.