JPH06152272A - Constant current circuit - Google Patents

Abstract

PURPOSE:To provide the constant current circuit which does not have the set current value changed by the variance of a supply potential and the variance of the threshold voltage of transistors TRs constituting the constant current circuit and is superior in stability against noise. CONSTITUTION:Gates of P-channel MOB TRs 10 and 11 are connected in common and this common connection point is connected to the drain of the TR 11 to constitute a current mirror circuit. The drain of the TR 10 is connected to one end of a resistance 12 and the gate of an N-channel MOS TR 13, and the other end of the resistance 12 is connected to the drain of the TR 13. The drain of the TR 13 is connected to the gate of an N-channel MOS TR 14 also, and the source is connected to the earth potential. The source of the TR 14 is connected to the earth potential through a current setting resistance 15. A constant current is obtained from the drain of an N-channel MOS TR 16 whose gate is connected to the gate of the TR 14 in common.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant current circuit composed of MOS transistors, and more particularly to a constant current circuit which suppresses the influence of variations in the power supply voltage and the threshold voltage of the transistor on the output current.

[0002]

2. Description of the Related Art FIG. 4 shows the structure of a combination circuit of a conventional constant current circuit composed of MOS transistors and a circuit using its output current. In this circuit, the gates of two N-channel MOS transistors 41 and 42 are connected in common to form a current mirror circuit,
A resistor 43 for current setting is connected between the drain of the transistor 41 and the power supply potential VDD, and a load 44 for flowing a constant current is connected between the drain of the MOS transistor 42 on the output side and the power supply potential VDD. There is.

In this circuit, the current I flowing through the resistor 43 is represented by the following equations 1 and 2 where the drain voltage and threshold voltage of the transistor 41 are V41 and Vth, respectively, and the resistance value of the resistor 43 is R43. It

[0004]

[Equation 1] Here, Kn in the above two equations is a constant determined by the manufacturing process of the transistor 41. From the above formula 1 and formula 2, V
When 41 is deleted, the following three equations are obtained.

[0005]

[Equation 2]

By the way, since the transistors 41 and 42 form a current mirror circuit, a current corresponding to the dimension (channel width / channel length) ratio of the transistors 41 and 42 flows through the load 44 using the current I as an input current. . As a result, a constant current is supplied to the load 44 regardless of the impedance across the load 44.

[0007]

However, as is apparent from the above equation 3, the value of the current I changes according to the fluctuation of the power supply potential VDD. Further, it is understood that the current I does not reach the designed value when the threshold voltage Vth of the transistor deviates from the designed value due to variations in manufacturing. Also, when the gate voltage of the transistor changes due to disturbance noise,
There is a problem that the current I fluctuates.

The present invention has been made in consideration of the above circumstances, and an object thereof is to change a set current value due to fluctuations in power supply potential and variations in threshold voltage of MOS transistors forming a constant current circuit. It is another object of the present invention to provide a constant current circuit having excellent stability against noise.

[0009]

SUMMARY OF THE INVENTION The constant current circuit of the present invention is a first conductivity type first source whose source is coupled to a first potential.
, A first resistor having one end connected to the drain of the first transistor, a source connected to the first potential, a gate connected to the gate of the first transistor, and a gate / drain First shorted between
A second transistor of conductivity type, a second conductivity type of which the source is connected to the second potential, the drain is connected to the other end of the first resistor, and the gate is connected to one end of the first resistor. A third transistor, a drain thereof is connected to a drain of the second transistor, and a gate thereof is connected to the other end of the first resistor; and a fourth transistor of a second conductivity type, and the fourth transistor. And a second resistor connected between the source and the second potential.

[0010]

When a current flows through the first resistor, a potential drop occurs between both ends of the first resistor, and a difference occurs between the gate potentials of the second and third transistors. Since the first and second transistors form a current mirror circuit, equal drain currents tend to flow in both transistors. on the other hand,
Since the gate potentials of the third and fourth transistors are not equal, the conductance of the first transistor is gm1,
When the conductance of the second transistor is gm2, the conductance of the third transistor is gm3, and the conductance of the fourth transistor is gm4, the gate potential difference between the second and third transistors caused by the provision of the first resistor is given. The decrease in the drain current of the fourth transistor based on the following equation is (gm3 / gm4). (Gm2 / g
The circuit balances at a current value equal to m1).

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a circuit diagram of a constant current circuit according to the first embodiment of the present invention. In the figure, P channel MOS
The source of the transistor 10 is connected to the positive power supply potential VDD. Similarly, the source of the P-channel MOS transistor 11 is also connected to this power supply potential VDD. The gates of both the transistors 10 and 11 are commonly connected, and the gate common connection point is connected to the drain of the transistor 11,
Both transistors form a current mirror circuit.
One end of a resistor 12 is connected to the source of the transistor 10. The source of the N-channel MOS transistor 13 is connected to the ground potential. The source of the N-channel MOS transistor 14 is connected to the ground potential via the resistor 15. The drain of the transistor 13 is connected to the other end of the resistor 12, and the gate is connected to one end of the resistor 12. The drain of the transistor 14 is connected to the drain of the transistor 11, and the gate is connected to the other end of the resistor 12.

Further, the source of the N-channel MOS transistor 16 is connected to the ground potential, the gate is connected to the gate of the transistor 14, and the load 17 is connected between the drain and the power supply potential VDD.

Generally, the constant current circuit is used in an integrated circuit using a battery as a power source, and thus it is desired that the current consumption is small. Therefore, the MOS transistor forming the constant current circuit is usually operated in the weak inversion region.

In the above constant current circuit, the transistor 10
And 11 dimension ratio (channel width W and channel length L
And the drain currents of the transistors 10 and 11 are I10 and I11, the transistors 10 and 11 form a current mirror circuit. Therefore, between I10 and I11, The following relations are established.

[0016]

[Equation 3] The Kp is a constant determined by the dimension ratio.

Further, the threshold voltage of the transistor 13 is set to V
It is known that the drain current I10 of the transistor 13 in the weak inversion region is represented by the following equation (5), where th is the dimension ratio, S13 is the gate voltage, and V1 is the gate voltage.

[0018]

[Equation 4] Incidentally, I0 and K are constants determined by the process.

The drain current I14 of the transistor 14 is given by the following equation because the resistor 15 is connected to the source side when the gate voltage is V2 and there is a voltage drop in the resistor 15. The threshold voltage of the transistor 14 is Vth, which is the same as that of the transistor 13, and the dimension ratio is S.
14 and the resistance value of the resistor 15 is R15.

[0020]

[Equation 5] In addition, the resistance value of the resistor 12 is R12 between V1 and V2.
Then, there is the following relationship.

[0021]

[Equation 6] Here, the relationship between the dimension ratio S13 and S14 is S14 / S
Assuming that 13 = Kn, the currents I10 and I11 can be expressed by the following equations 4 to 7:

[0022]

[Equation 7]

Both the currents I10 and I11 represented by the above equations 8 and 9 are independent of the power supply potential VDD and the threshold voltage Vth. Therefore, the currents I10 and I11 are always constant without being influenced by the fluctuation of the power supply potential VDD and the fluctuation of the threshold voltage of the MOS transistors constituting the circuit. Since the value of the current I11 is constant, the transistor
Transistor whose gate is commonly connected to 14
The value of the current flowing through the load 17 via 17 is also constant, and is constant with respect to fluctuations in the power supply potential VDD and variations in the threshold voltage of the transistor. Next, the noise resistance of the constant current circuit will be described.

When the gate voltage of the transistor 13 increases by ΔV1 from V1 at the time of equilibrium due to disturbance noise, changes in the currents flowing through the transistors 10 and 13 from the current I10 at the time of equilibrium are respectively taken as ΔI10 'and ΔI10', and ΔI10 '. / Δ
Find I10 as the loop gain for the current. ΔI10
Is obtained from Equation 5 as follows.

[0025]

[Equation 8] When the following first-order approximation is applied to the above equation 10,

[0026]

[Equation 9] The following Expression 12 is obtained.

[0027]

[Equation 10] Further, the change amount ΔI11 of the current I11 at this time is obtained from the above equations 6 and 7 as follows.

[0028]

[Equation 11] By the way, since there is a relation of ΔI10 ′ = ΔI11 / Kp, the loop gain ΔI10 ′ / ΔI10 is obtained from the equation 13 as follows.

[0029]

[Equation 12] Here, if Kp = 2 and R12 = R15, for example, the following equation is obtained.

[0030]

[Equation 13] Therefore, if the dimension ratio of the transistor is set so that Kn / Kp = e, the loop gain becomes 0. Also, even if this setting is difficult,

[0031]

[Equation 14] Therefore, the error can be suppressed to about 1/3, the loop gain becomes small, and high noise resistance can be obtained. In this embodiment, the resistor 15 is the transistor 1
It acts as a current setting resistor that determines the input current value of the current mirror circuit consisting of 0 and 11.

FIG. 2 is a circuit diagram of a constant current circuit according to the second embodiment of the present invention. This constant current circuit is obtained by inserting a current mirror circuit composed of transistors 10 and 11 and a current mirror circuit composed of P-channel MOS transistors 20 and 21 between the supply point of the power source potential VDD and the constant current circuit. Point is the same as the constant current circuit of FIG.

That is, a P channel MOS transistor
The source of 20 is connected to the power supply potential VDD, and the drain is connected to the source of the transistor 10. Similarly, the source of the P-channel MOS transistor 21 is connected to the power supply potential VDD, and the drain is connected to the source of the transistor 11. The gates of both transistors 20 and 21 are commonly connected, and the common gate connection point is connected to the drain of transistor 20.

Therefore, the transistors 10 and 20 and the transistors 11 and 21 are cascode-connected. Since the cascode-connected MOS transistor has a low dependency of the drain current on the source-gate voltage, in this circuit, the stability of the drain current of the transistor 10 and the drain current of the transistor 11 with respect to the set values is the first. It is improved as compared with the embodiment circuit. The common connection point of the gates of the transistors 20 and 21 may be connected to the drain side of the transistor 21 as in the circuit of the third embodiment shown in FIG.

[0035]

As described above, according to the present invention,
It is possible to provide a constant current circuit in which the set current value does not change due to fluctuations in the power supply potential and variations in the threshold voltage of transistors included in the constant current circuit, and which has excellent stability against noise.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a constant current circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a constant current circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a constant current circuit according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a conventional constant current circuit.

[Explanation of symbols]

10, 11, 20, 21 ... P-channel MOS transistor, 12,
15 ... Resistor, 13, 14, 16 ... N-channel MOS transistor, 17 ... Load.

Claims (2)

[Claims] 1. A first transistor of a first conductivity type having a source coupled to a first potential, a first resistor having one end connected to a drain of the first transistor, and a source having the first transistor. Connected to the electric potential of the first gate
A second transistor of the first conductivity type connected to the gate of the transistor of which the gate and drain are short-circuited, the source of which is connected to the second potential, and the drain of which is connected to the other end of the first resistor. A second transistor of the second conductivity type whose gate is connected to one end of the first resistor, a drain of which is connected to the drain of the second transistor, and a gate of which is connected to the other end of the first resistor Constant current circuit, comprising: a second transistor of the second conductivity type that is formed; and a second resistor connected between the source of the fourth transistor and a second potential. 2. A fifth transistor of the first conductivity type, wherein a source / drain is inserted between the first potential and the source of the first transistor, and a gate / drain is short-circuited, A source-drain is inserted between the first potential and the source of the second transistor, and the gate has the fifth potential.
The sixth of the first conductivity type connected to the gate of the transistor of
The constant current circuit according to claim 1, further comprising: