JPH06140881A - Multivibrator - Google Patents

Abstract

PURPOSE:To generate a control signal(enable signal) which is correct as for time by connecting a capacitor and a resistor for controlling the time constant of a pulse output to the output side of an output control circuit. CONSTITUTION:When the control signal CIN is turned on, a power source is supplied from a power source supply terminal VDD2 to a power source. Though a transistor(TR) Tr3 is not turned on, the high-level enable signal COUT is outputted from a control signal output terminal COUT. A reference clock is simultaneously inputted from a reference oscillation circuit 12 to a counter 13 with turning of an input CAN. Then, the reference clock is inputted from the output Qn to the input terminal B of the output control circuit 14 at every four input so that a high level, that is, the pulse of fixed time width decided by the time constant of an external resistor RX1 and an external capacitor CX1 is outputted from output control Q. Therefore, the enable signal which is synchronized with the reference clock of the output of the circuit 12 is generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multivibrator, and more particularly to a clock synchronous one-shot multivibrator used to generate a time control signal (= enable signal). .

[0002]

2. Description of the Related Art As a method of creating a time control signal (enable signal) in an electronic circuit, a method of creating it by software using a microcomputer and a hardware using a multivibrator IC are available. There is a method to create it as software. In the case of the software method, a time-accurate enable signal can be created by adjusting the operation clock of the microcomputer, but it is necessary to control the microcomputer itself when the system is newly designed. Need to be developed as software. This development usually requires a great deal of work, so if you want to create an enable signal without software development of a microcomputer, one-shot
A hardware-like method using a multivibrator IC is used.

One-shot multivibrator IC
Keeps one stable state unless a trigger pulse is input from the outside, and when one trigger pulse is input, it outputs a pulse with a constant width that is determined by the time constant of the external resistor and capacitor. It is a circuit that has and is usually used for pulse shaping and delay. Har
When it is created by a hardware method, the pulse of the constant width output from the multivibrator IC is used as an enable signal. Assuming that the value of the externally attached resistor is R _X3 and the value of the capacitor is C _X3 , the time t _W3 at which the pulse having the constant width is output is t _W3 = k ₃ · R _X3 · C
It becomes _X3 . However, k ₃ is a constant coefficient.

[0004]

However, when an enable signal is created using a conventional one-shot multivibrator IC, it takes time for the reasons shown in (1) and (2) below. There is a problem in that it is not possible to create a globally accurate enable signal. (1) There is a limit to the value that can be set for the externally attached resistor R _X3 and capacitor C _X3 . For example, in order to accurately synchronize the output time t _{W3 of the} pulse with the clock, the value of the resistor R _X3 may have to be set with an accuracy of the second decimal point or less such as 1.07 kΩ. It is difficult to set the values of the resistor R _X3 and the capacitor C _X3 with the above accuracy.

(2) The values of the externally attached resistor R _X3 and capacitor C _X3 fluctuate due to temperature, and the pulse output time t _W3 cannot be held constant.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a one-shot multivibrator capable of producing an enable signal which is time-accurate.

[0007]

To achieve the above object, a multivibrator (1) according to the present invention includes a counter which operates by receiving a reference oscillation signal from a control input and a reference oscillation circuit, and the counter. And an output control circuit that operates by receiving a control input from the output control circuit, and a capacitor and a resistor that control the time constant of the pulse output are connected to the output side of the output control circuit.

Further, the multivibrator (2) according to the present invention operates by receiving a control input and a reference oscillation signal from the reference oscillation circuit, and a counter operating by receiving an output signal and a control input from the counter. An output control circuit, a logical multiplication circuit is interposed between the counter and the control circuit, and a capacitor and a resistor for controlling a time constant of pulse output are connected to an output side of the output control circuit. Is characterized by.

[0009]

The reference oscillation signal in the reference oscillation circuit, that is, the oscillation time (= 1 cycle) of the reference clock is a, the number of oscillations of the reference clock counted by the counter is b, and E _T = a × b. ‥ become as control signal time - is set to (= rice Bull time) E _T, temporally accurate rice - it is possible to create a table signal.

In the multivibrator according to the present invention, for example, a counter that operates at the falling edge of the reference clock is used as the counter, and the output control circuit operates at the rising edge of the counter output. . When the output signal (the rising edge) is input from the counter to the output control circuit, a pulse having a constant time width determined by the time constant of the resistor and the capacitor connected to the output side is output from the output control circuit. Is output. Further, in the multivibrator according to the present invention, at the same time when the control input is turned on, the reference clock is oscillated and the enable signal is turned on.
The bull signal is turned off at the same time when the pulse output having the constant width rises. And the off state of the enable signal is
It is held while the pulse having the constant width is output (= t _W ).

However, the output time t of the pulse of the constant width is
_W Is the logical output time t of the counter _C Less than twice the
For example, the enable signal will cycle on and off.
In order to prevent the repetition of the on / off, t_W >
2t_C The values of the resistors and capacitors are set so that
Is determined. By doing this, the pulse of the constant width is
Output control by the counter output before falling
Since the circuit is restarted, the one from the output control circuit
The constant width pulse continues to be output without interruption, and the
The off state of the bull signal is continuously maintained. And
The state is held until the reset signal is input.

In the case of the above-mentioned multivibrator (1), if the output of the m-th stage of the counter is connected to the output control circuit, the counter outputs a × 2 ^m-1 (however,
A pulse having a time width of m = 1, 2, ...
^It is output every ^m-1 hour and is input to the output control circuit. When the pulse is input, the output control circuit outputs the pulse having the constant width, and at the same time, the enable signal is turned off. As described above, the reference clock oscillates (rises) at the same time when the control signal is input, and the counter operates at the falling edge of the reference clock. Therefore, the output of the m-th counter is the time T from the reference clock. = A × (2 ^m-1 −0.5) It stands up with a delay.
Therefore, the enable signal is turned off when the time T elapses after the reference clock rises. Therefore, E _T = a × (2 ^m-1 −0.5)
Therefore, using the multivibrator (1),
It is possible to accurately create an enable signal that is (2 ^N -0.5) times the reference clock. Note that N = 0, 1,
2, ...

In the case of the above-mentioned multivibrator (2)
If a logical multiplication circuit is inserted between the counter and the output control circuit,
It is equipped. In the logical multiplication circuit,
All the inputs are logically multiplied with the counter output.
Signal goes to the output control circuit only when becomes high level.
It is designed to be output to the road. For example, the coun
Output of the i-th stage and the output of the j-th stage (1≤i <j
And) are connected to the logical multiplication circuit.
And the flip-flops that make up each stage of the counter
It operates at the falling edge of the stage and the output of the jth stage rises.
When rising, the output of the i-th stage always falls, so control
When the input is turned on, a signal is first output from the logical multiplication circuit.
The only thing that works is [a x
(2^j-1 −0.5) + a × 2^i-1 × 1/2 + a × 1 /
2) It is a time point after a lapse of time. If arranged, a x (2
^j-1 +2^i-1 ). Therefore, the output control circuit
It is also a reference clock that the pulse of the constant width is first output from
Ax (2^j-1 +2^i-1 )time
The time has passed, and the enable signal is turned off at this point.
To be done. That is, use the multivibrator (2)
E_T = A x (2^j-1 +2 ^i-1 ) ... rice
It is possible to create a bull signal.

Further, even if the number of stages output from the counter to the logical multiplication circuit is increased or decreased, the relation of the formula does not essentially change. For example, if only the first stage outputs to the logical multiplication circuit, the term of 2 ^j-1 in the equation is deleted, and conversely the output of the kth stage (where 1 ≤ i <j <k)
Also, if is also connected to the logical multiplication circuit, it becomes a form in which the term of 2 ^k-1 is added in () in the equation. As can be seen from the above, in the multivibrator (2), the energy of E _T = a × M (M = 1, 2, ...)
Bull signals are created accurately.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the multivibrator according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram schematically showing the circuit configuration of a multivibrator 10 according to the first embodiment. The multivibrator 10 includes an input control circuit 11, a reference oscillation circuit 12, a counter 13, an output control circuit 14 and the like.

The input control circuit 11 includes a transistor Tr ₁ ,
Transistor Tr ₂ and resistor R ₁ , resistor R ₂ , resistor R ₃
, A resistor R ₄ , and the input control circuit 11 has a power input terminal V _DD1 and a control input terminal C _{IN as} input terminals and a power supply terminal V _IN as an output terminal.
_DD2 is formed. The power input terminal V _DD1 is connected to the emitter E of the transistor Tr ₁ and the collector C
Is connected to the power supply terminal V _DD2 . A resistor R ₁ is interposed between the emitter E of the transistor Tr ₁ and the base B, and the base B is connected to the collector C of the transistor Tr ₂ via the resistor R _2. There is. The emitter E of the transistor Tr ₂ is grounded, and the base B is grounded via the resistor R ₄ . The control input terminal C _IN is connected to the base B of the transistor Tr ₂ via the resistor R ₃ .

The power supply terminal V _DD2 of the input control circuit 11 is connected to a reference oscillation circuit 12, a counter 13 and an output control circuit 14 each composed of a crystal oscillator, and the output side of the reference oscillation circuit 12 is a counter. 13 is connected to the reference clock input terminal CLK _INV , the output terminal Q _n of the counter 13 is connected to the input terminal B of the output control circuit 14, and the input terminal A _INV of the output control circuit 14 is grounded. In addition to the above, the counter 13 and the output control circuit 14 are also provided with reset signal input terminals CLR, and these input terminals CLR are respectively reset terminals RE.
It is connected to S.

An output control terminal is provided on the output side of the output control circuit 14.
Child Q and resistance terminal R_X , Capacitance terminal C_X Is formed
Cage, resistance terminal R_X Is the external resistance R_X1Through the power supply end
Child V _DD2 Connected to the capacitance terminal C_X Is the external capacitor C
_X1Power supply terminal V via_{DD 2} Connected to the output control end
Child Q is resistance R₆ Through transistor Tr₃ Base B
It is connected to the. Transistor Tr₃ The emitter E of
It is grounded, and the collector C has a control signal (enable signal).
No.) Output terminal C_OUT Connected to the resistor R_Five Through
And power supply terminal V_DD2 Is also connected to.

FIG. 2 schematically shows the circuit configuration of the counter 13.
It is the block diagram shown, and the counter 13 is a D-flip.
・ Flop (DF₁ ~ DF_n ) Connected in series
Has become. Output Q of each stage_INV Is the inverter 13a_-1
~ 13a_-nThrough Q₁ ~ Q _n To be taken out as
It has become. In addition, the reference clock input of the counter 13
Terminal CLK_INV Is connected to the first stage via the inverter 13b.
Lip Flop DF ₁ Connect to the clock input terminal CK of
The reset signal input terminal CLR is an inverter.
Flip-flop DF via 13c₁ ~ DF_n Nori
Each of them is connected to a set signal input terminal R.

The operation of the multivibrator 10 constructed as described above will be described with reference to FIG. FIG. 3 is a timing chart showing the operation of each part of the multivibrator 10.
It is

The multi-vibrator 10 is a concrete embodiment of the multi-vibrator (1) described in "Means for Solving the Problems". Therefore, when a control signal of 350 μs is generated using a reference clock having an oscillation time a of 100 μs, the equation described in “Operation” is used.
From E _T = a × (2 ^m-1 −0.5), 350 = 100 ×
(2 ^m-1 −0.5), and m = 3. Therefore, in the case of the first embodiment, the output Q ₃ of the third stage is used as the output of the counter 13.

When the control input C _IN is turned on, the transistors Tr ₁ and Tr ₂ are turned on, and power is supplied to each circuit from the power supply terminal V _DD2 . Counter 13
The output Q ₃ of the output control circuit 14 and the output control Q of the output control circuit 14 are low level in the initial state.
_The transistor Tr ₃ does not turn on even when power is supplied from _{DD 2} . Therefore, from the control signal output terminal C _OUT ,
At the same time when the control input C _IN is turned on and power is supplied, a high level enable signal C _OUT is output.

At the same time when the control input C _IN is turned on, a reference clock having an oscillation time of 100 μs is input to the CLK _INV terminal of the counter 13 from the reference oscillation circuit 12. Since the counter 13 operates at the falling edge of the reference clock, Q ₃ becomes high level (turns on) at the fourth falling edge of the clock after the reference clock is oscillated, and the next fourth clock is generated. It goes low (turns off) at the falling edge of. Thereafter, as shown in FIG. 3, the on / off operation is repeated every time the reference clock is input four times.

The output Q _{3 of the} counter 13 is input to the input terminal B of the output control circuit 14. When a high level (rising edge) is input to the input terminal B from Q ₃ , the output control circuit 14 outputs a high level for a certain period of time, that is, the time constant of the external resistor R _X1 and the external capacitor C _X1. A pulse having a constant time width t _W1 determined by is output. When the output control Q becomes high level, the transistor Tr ₃ is turned on, so that the control signal output terminal C _OUT goes low.
The level becomes level and the enable signal C _OUT turns off. Therefore, as shown in FIG. 3, the enable signal C _OUT is
When the control input C _IN is turned on, it rises at the same time, the output Q _{3 of the} counter 13 rises, and the output control Q of the output control circuit 14 becomes high level and it falls at the same time. As described above, the output Q ₃ of the counter is turned on / off at every falling edge of the fourth clock. Therefore, Q ₃ rises first after the control input C _IN is turned on because the reference clock is oscillated. From the fourth falling edge of the clock. That is, at the time of oscillation 3.5 times after the rise of the reference clock, the output Q ₃ of the counter 13 and the output control Q of the output control circuit 14 become high level, and the enable signal C _OUT is turned off. After all,
From the control signal output terminal C _OUT , 100 μs × 3.5 =
The enable signal C _OUT is output for a time of 350 μs.

By the way, the time width t _W1 of the pulse if the output from the output control Q is is shorter than twice the logic output time t _C1Q3 output Q ₃ of the counter 13, the output of Q ₃ is B - Level of Sometimes the output control Q falls. As a result, rice - is ON enable signal C _{OU T} again, and then so that the Q ₃ is again turned off at that rises, the control signal output C _OUT will be thus repeatedly turned on and off. Therefore, in the first embodiment, as described in "_Operation" , the values of the external resistor R _X1 and the external capacitor C _X1 are set so that t _W1 > 2t _C1Q3 in order to prevent the ON / OFF. ing. By doing so, as shown in FIG. 3, the output control Q is always restarted by the rising edge of Q ₃ before it goes to the low level, and the output control Q is in the high level state, that is, when the output is turned on. The low level state of the bull signal C _OUT is continuously maintained.
The state is maintained until the reset signal RES is input and the multivibrator 10 is initialized (in other words, the data to be fetched is changed by the enable signal C _OUT ).

As described above, in the first embodiment, by restarting the output control Q of the output control circuit 14 with the output Q ₃ of the counter 13, the temperature coefficient of the external resistor R _X1 and the external capacitor C _X1 etc. It is possible to absorb the error caused by the above, and it is possible to create a time-accurate enable signal synchronized with the reference clock transmitted from the reference oscillation circuit 12.

Next, a second embodiment of the multivibrator according to the present invention will be described. FIG. 4 is a block diagram schematically showing the circuit configuration of the multivibrator 20 according to the second embodiment. The difference between the multivibrator 20 and the multivibrator 10 shown in FIG. 1 is that in the case of the multivibrator 20, the counter 13 and the output control circuit 1 are different.
4, the logical multiplication circuit 21 is interposed between the reference oscillation circuit 12 and the reference oscillation circuit 4, and the output side of the reference oscillation circuit 12 and the output side of the counter 13 are connected to the input side of the logical multiplication circuit 21. In the logical multiplication circuit 21, the high level is output from the output Q _LM to the input terminal B of the output control circuit 14 only when all of the reference clock input to the logical multiplication circuit 21 and the output of the counter 13 become high level. It is supposed to be done.

The operation of the multivibrator 20 constructed as above will be described with reference to FIG. FIG. 5 is a timing chart showing the operation of each part in the multivibrator 20. The multi-vibrator 20 is a concrete embodiment of the multi-vibrator (2) described in the section "Means for solving the problem". Multi-vibration
(2), E _T = a × M (M = 1, 2, ...
) Can be created. Therefore, to create a control output signal of E _T = 500 μs using a reference clock with an oscillation time a of 100 μs, M
It suffices to set the sizes of i, j, k, etc. in the equation so that = 5. In the equation, if i = 1 and j = 3, then M = 5. Therefore, in the second embodiment, among the counter outputs Q _{1 to} Q _n , Q ₁ and Q ₃ are logically multiplied by the logical multiplication circuit 21 together with the reference clock output.

As can be seen from FIG. 5, the output Q ₃ of the counter 13 rises at the fourth falling edge of the clock after the control input C _IN is turned on and the reference clock is oscillated. ₁ (and Q ₂ ) fall. Therefore, it is in the high level portion of the sixth clock that the control input C _IN is turned on and the high level is first output from the output Q _LM of the logical multiplication circuit 21 to the input terminal B. The output control circuit 14 is driven at the rising edge of the sixth clock, and the output control Q outputs a pulse having a constant time width t _W2 determined by the time constant of the external resistor R _X2 and the external capacitor C _X2. −
The bull signal C _OUT is turned off. Therefore, the output time of the enable signal C _OUT is 5 reference clocks, and E _T =
100 μs × 5 = 500 μs.

From the logical multiplication circuit 21, the sixth clock
Next to Ku, 8th, 8th is 14th, 14th is next
Is the 16th clock at the high level part of the clock
Output to_LMOutputs a high level signal from the output control circuit.
The output control Q of the path 14 is restarted, but the restart interval is
The longer interval T_again Is always the counter output Q ₃ 
Output cycle is shorter than the output cycle of
The time width T of the pulse_W2Counter output Q₃ The logic of
Output time T_C2Q3If you make it bigger than twice,
Bull signal C_OUT Is continuously maintained at a low level.
It will be possible. Therefore, in the second embodiment, t_W2
> 2t_C2Q3External resistance R_X2And external conden
SA C_X2The value of is set. Enable signal C_OUT Of the above
The state is maintained until the reset signal RES is input.
It

As described above, in the second embodiment, the logical multiplication circuit 21 is interposed between the counter 13 and the output control circuit 14, and the output Q of the logical multiplication circuit 21.
The output control Q of the control output circuit 14 is restarted by _LM , and the error due to the temperature coefficient of the external resistor R _X2 and the external capacitor C _X2 can be absorbed. Further, by arbitrarily combining the outputs Q _{1 to} Q _n of the counter 13 input to the logical multiplication circuit 21, the reference clock oscillation time a
It is possible to accurately create a control signal for a time that is an integral multiple of.

In the second embodiment, the counter 13
Logic output time t_C Value of the counter output Q₃ When the logical output of
Interval t_C2Q3However, more generally, the counter output Q₁ 
~ Q _n Of the outputs that are input to the logical multiplication circuit 21
, The logical output time of the output with the largest value of n is t_C When
Just do it. In addition, in the above-mentioned first and second embodiments,
In addition, a multivibrator with a built-in reference oscillation circuit 12
However, the reference clock can be used as an external input.
good.

[0033]

As described in detail above, in the multivibrator according to the present invention, a counter that operates by receiving a control input and a reference signal from a reference oscillation circuit, and an output signal and a control input from the counter are received. When a capacitor and a resistor for controlling the time constant of the pulse output are connected to the output side of the output control circuit, the output control circuit operates in response to the output signal from the counter. It is restarted, and the error due to the temperature coefficient of the capacitor and the resistor can be absorbed by the restart. With the multivibrator according to the present invention,
The clock oscillation time of the reference oscillation signal is (2 ^N −
0.5) times control signal can be created accurately. Here, N = 0, 1, 2, ...

In the multivibrator according to the present invention, a counter which operates by receiving a control input and a reference signal from a reference oscillation circuit, and an output control circuit which operates by receiving an output signal and a control input from the counter And a logical multiplication circuit is interposed between the counter and the control circuit, and a capacitor and a resistor for controlling the time constant of the pulse output are connected to the output side of the output circuit,
The output control circuit is restarted by the output signal from the logical multiplication circuit, and the restart can absorb the error due to the temperature coefficient of the capacitor and the resistor. If the multivibrator according to the present invention is used, it is an integral multiple (M) of the clock oscillation time in the reference oscillation signal.
Double, M = 1, 2, ...) can be accurately generated.

[Brief description of drawings]

FIG. 1 is a first part of a multivibrator according to the present invention.
It is a schematic block diagram which showed the circuit structure of an Example.

FIG. 2 is a schematic block diagram showing an internal configuration of a counter 13.

FIG. 3 is a timing chart showing the operation of each part in the multivibrator according to the first embodiment.

FIG. 4 is a schematic block diagram showing a circuit configuration of a multivibrator according to a second embodiment.

FIG. 5 is a timing chart showing the operation of each part in the multivibrator according to the second embodiment.

[Explanation of symbols]

10, 20 Multivibrator 12 Reference oscillator circuit 13 Counter 14 Output control circuit 21 Logical multiplication circuit R _X1 , R _X2 external resistance C _X1 , C _X2 external capacitor C _IN control input C _OUT control signal output (enable signal output )

Claims (2)

[Claims] 1. An output of the output control circuit, comprising: a counter that operates by receiving a control input and a reference signal from a reference oscillation circuit; and an output control circuit that operates by receiving an output signal from the counter and a control input. A multi-vibrator characterized in that a capacitor and a resistor for controlling the time constant of pulse output are connected to the side. 2. A counter and a control circuit comprising: a counter that operates by receiving a reference signal from a control input and a reference oscillation circuit; and an output control circuit that operates by receiving an output signal and a control input from the counter. And a capacitor for controlling the time constant of the pulse output and a resistor are connected to the output side of the output control circuit.