JPH0613381A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To prevent semiconductor device from being polluted by a Cu wiring. CONSTITUTION:The title semiconductor device has a PSG(phosphorus glass) film 3, an Si film 10, and a Cu film 12 provided on a semiconductor element. It is desirable that a film of a high-melting-point metal or its alloy or a nitride such as a TiN film 11 should be provided between the Si film 10 and the Cu film 12. As the PSG(phosphorus glass) film 3, an insulating film such as silicon oxynitride etc., can be acceptable. Besides, a silicide film containing exessive Si also can be acceptable as the Si film 10, and an alloy film containing Cu as its main component can be acceptable as the Cu film 12.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a copper (Cu) film or Cu.
Alloy film containing as a main component (hereinafter simply referred to as Cu alloy film)
And a manufacturing method thereof.

[0002]

2. Description of the Related Art In order to reduce the wiring delay time of a semiconductor device, studies are underway to apply Cu having a low electric resistance. The problem of contamination of the semiconductor element by Cu from the Cu film or Cu alloy film is one of the important problems of Cu wiring. However, sufficient guidelines have not been obtained regarding the method of preventing Cu contamination. Conventionally, a Cu film on a semiconductor device has been used by being limited to the uppermost layer of a multilayer wiring which is sufficiently separated from a semiconductor element such as a bonding bump or a power supply line. Further, in the lower signal line, Cu is used as an alloy film of aluminum (Al) and Cu or the like, but Cu contamination did not pose a problem in such a usage method. It may have been stabilized by forming an alloy such as Al ₂ Cu. However, when the wiring material is pure Cu or a Cu alloy film, it is known that the device characteristics are adversely affected. In order to use the Cu wiring for the lower layer signal line, it is necessary to newly take measures to prevent Cu contamination.

The simplest method for preventing Cu contamination is C
This is a method of covering the semiconductor element with an insulating film that makes it difficult for u to diffuse and transmit. Usually, a thermal oxidation (hereinafter referred to as Th-SiO ₂ ) film used as an insulating film of a semiconductor device has a high Cu diffusion rate and does not serve as a protective film. Therefore, silicon nitride (SiN) film, silicon oxynitride (S
A method using an iON) film or a phosphorus glass (hereinafter referred to as PSG) film as a protective film has been proposed. C of SiN film
For the effect of suppressing u diffusion, refer to 1989 Procedures AY-A-V SII Multi-level Interconnection Conference (Proc).
eedings IEEE VLSI Multilevel Interconnection
Conf. ) Pp. 258-263. As for the PSG film, the proceedings of the 39th Joint Lecture on Applied Physics, 30a-V-6, pp. 678 (19
91 Spring).

[0004]

Atomic absorption spectrometry was carried out in order to quantitatively measure the diffusion rate of Cu in various protective films. The analytical sample was prepared according to the following procedure. The Si substrate was thermally oxidized to form a Th-SiO ₂ film having a thickness of 10 nm. Next, the substrate was covered with a protective film having a thickness of 100 nm. As a protective film, a phosphorus glass (hereinafter abbreviated as atmospheric pressure CVD-PSG) film formed by an atmospheric pressure CVD method (chemical vapor deposition method),
A silicon nitride (hereinafter abbreviated as plasma CVD-SiN) film formed by a plasma CVD method and a silicon nitride (hereinafter abbreviated as low pressure CVD-SiN) film formed by a low pressure CVD method were examined. Moreover, the Si substrate is thermally oxidized to a thickness of 100 n.
A sample having a Th-SiO ₂ film of m as a protective film was also examined. A Cu film was vapor-deposited on these protective films as a Cu diffusion source. This sample was heat-treated to intentionally diffuse Cu in the Si substrate. After removing the Cu film and the protective film by wet etching, the amount of Cu in the Si substrate was quantified by an atomic absorption method. The results are shown in Fig. 1. Reduced pressure C
It has been found that the protective films other than the VD-SiN film have an insufficient diffusion suppressing effect.

For example, atmospheric pressure CVD-P having a thickness of 100 nm
When the Si substrate is coated with the SG film, 450
C of 5 × 10 ¹⁰ atom / cm ² by heat treatment for 1 hour at ℃
It is expected that u atoms diffusely permeate the protective film. However, due to the thicker PSG film and the lower temperature of the wiring process, Cu
Although the amount of diffused and transmitted light is reduced, it is difficult to form connection holes that connect the wiring layers up and down due to the thick film, and there is a limit to the low temperature of the wiring process. Occurs.

On the other hand, there are practical restrictions on the low pressure CVD-SiN film. The greatest limitation of the low pressure CVD-SiN film is that the film forming temperature is as high as 700 to 800 ° C.
The film formation must of course be performed before the wiring process, and the low pressure CVD-SiN film is inevitably used near the element. The low pressure CVD-SiN film has a high stress, and there is a concern that the hot carrier may deteriorate the MOS characteristics. In addition, semiconductor elements that require a shallow pn junction such as a high-speed bipolar must avoid excessive heat treatment,
The use of low pressure CVD-SiN films with high formation temperatures is not preferred. Another problem is that the dielectric constant of the low pressure CVD-SiN film is about twice as high as that of the SiO ₂ film. Low pressure CVD-
When the SiN film is thickened, the wiring capacitance increases.

An object of the present invention is to prevent the diffusion of Cu into the element region without significantly increasing the thickness of the protective film or lowering the temperature of the wiring process and without increasing the wiring capacitance or stress. An object is to provide a device and a manufacturing method thereof.

[0008]

In order to achieve the above object, a semiconductor device according to the present invention comprises a semiconductor element and at least one element selected from the group consisting of P and N, having Si, O. An insulating film covering the semiconductor element, a conductor layer made of a copper film or an alloy film containing copper as a main component, and silicon and excess Si provided between the conductor layer and the insulating film.
And a silicon or silicon compound film made of at least one material selected from the group consisting of silicides containing It is preferable that a barrier film containing at least a refractory metal, an alloy thereof, or a nitride thereof is provided between the silicon or silicon compound film and the conductor layer.

Further, the insulating film is preferably a film containing at least one film of a PSG film and a silicon oxynitride film. The thickness of the insulating film is preferably 100 nm or more, and preferably about 500 nm or less. When the silicon or silicon compound film is a silicide containing excess Si, the general formula MSi
_x (where M is at least one metal element selected from the group consisting of tungsten, titanium, molybdenum, tantalum, nickel, cobalt and zirconium, x
Is a value in the range of x> 2). If the silicon or silicon compound film has a thickness of 10 nm or more, a sufficient effect is recognized. The upper limit of the film thickness is not particularly limited, but it is preferably about 200 nm or less in order to prevent thickening of the entire protective film.

In addition, as a preferred example of the method for manufacturing a semiconductor device of the present invention, an insulating film such as a PSG film is formed on a semiconductor element formed on a substrate, and a silicon or silicon compound film is formed thereon. Forming a connection hole in the silicon or silicon compound film, forming a barrier film and a conductor layer on the silicon or silicon compound film and the connection hole, and forming the conductor layer, the barrier film and the outer peripheral portion of the silicon or silicon compound film. Etching is performed in substantially the same pattern.

[0011]

[Function] The PSG film and the plasma CVD-SiON film are
It has a higher Cu diffusion suppressing effect than the h-SiO ₂ film.
For example, the diffusion rate of Cu in the PSG film is 1/60 of that in the Th—SiO ₂ film, as can be seen from FIG. PS
By using the G film, a certain degree of contamination prevention effect is first obtained. On the other hand, it is conventionally known that Cu is likely to be unevenly distributed at the Si / SiO ₂ interface. This phenomenon is explained as Cu atoms are gettered to excess Si at the Si / SiO ₂ interface. Also in the present invention, it is considered that the Si film or the silicide film containing excess Si getters Cu atoms diffused from the Cu wiring into the insulating film. Therefore, S
The i film or the silicide film containing excess Si prevents an increase in Cu concentration in the insulating film adjacent thereto. as a result,
The Cu concentration gradient in the protective film is reduced, and the amount of Cu diffused and transmitted through the protective film is reduced.

[0012]

EXAMPLES Example 1 FIG. 2A shows the underlying structure of Cu laminated wiring. After oxidizing the Si substrate 1 to form a Th-SiO ₂ film 2, MO film is formed.
An S-transistor (not shown, provided at the back of the paper) was formed. Next, the PSG film 3 was deposited by the atmospheric pressure CVD method. The film thickness of the PSG film 3 is 250 nm. In addition,
As the phosphorus (P) concentration in PSG, a value converted to the phosphorus pentoxide (P ₂ O ₅ ) concentration is used. In this embodiment, P _{2 in} the film is
The O ₅ concentration is 1.0 mol%. The Si substrate 1 is heat-treated at 700 ° C. for 10 minutes in a nitrogen (N ₂ ) stream,
The PSG film 3 was densified. Next, a connection hole penetrating the Th-SiO ₂ film 2 and the PSG film 3 is provided, and selective CVD is performed here.
Then, tungsten (W) was embedded by the method to form a W plug 4. W with a film thickness of 100 nm formed on it by sputtering
A laminated wiring is formed by stacking a film 5 and an Al alloy film 6 having a film thickness of 500 nm containing 0.5% Cu and 1.5% Si,
It has a predetermined pattern. Furthermore, an oxide film formed by plasma CVD using tetraethoxysilane as a raw material (hereinafter,
Plasma TEOS-SiO film) 7, coating insulating film 8 made of organic silicon compound as a raw material, and plasma TEOS-
The surface of the Si substrate 1 was covered with a three-layer interlayer insulating film made of the SiO film 9. The thickness of each insulating film is 300 nm /
It was set to 200 nm / 500 nm. Plasma TEOS-S
The formation temperature of the iO films 7 and 9 is 400 ° C. The coated insulating film 8 was heat-treated at 450 ° C. for 30 minutes in an N ₂ gas flow to be cured.

Next, as shown in FIG. 2B, a film thickness of 50 is formed on the plasma TEOS-SiO film 9 by the sputtering method.
nm Si film 10 was deposited. Substrate temperature during deposition is 30
It was set to 0 ° C. Subsequently, as shown in FIG. 2C, a connection hole was formed in the Si film 10 and the three-layer interlayer insulating film by dry etching.

Next, as shown in FIG.
0 nm titanium nitride (TiN) film 11 and film thickness 850 nm
And the Cu film 12 were continuously deposited by the sputtering method. The substrate temperature during deposition was 300 ° C. Subsequently, as shown in FIG. 3B, the Cu film 12, the TiN film 11 and the Si film 10 were wiring processed by a dry etching method.
The dry etching of the Cu film 12 was performed at a substrate temperature of 320 ° C. using a mixed gas of silicon tetrachloride and chlorine. next,
As shown in FIG. 3C, the Cu film 12 has a film thickness of 300 nm.
Plasma TEOS-SiO film 13, coating insulating film 14 having a thickness of 200 nm, and plasma CVD-S having a thickness of 100 nm
It was covered with a three-layer insulating film composed of the iN film 15. Finally, heat treatment was performed at 450 ° C. for 30 minutes in a hydrogen (H ₂ ) stream. The semiconductor device thus manufactured is subjected to heat treatment at a maximum temperature of 450 ° C. for 1 hour 30 minutes or more after Cu deposition. For comparison, the Cu film 12 is made of Al
A semiconductor device in which a -0.5% Cu film was replaced was produced, but no difference in element characteristics due to contamination was observed between the two.

In this embodiment, the P ₂ O ₅ concentration of the PSG film 3 is 1.0 mol%, but the P ₂ O ₅ concentration is 0.5 mol%.
It was effective in the above range. Further, the TiN film 1 is used as a diffusion barrier film for preventing the reaction between the Si film 10 and the Cu film 12.
1 was used, but W, molybdenum (Mo), tantalum (T
a), refractory metal such as zirconium (Zr), titanium-
The same effect was obtained with a refractory metal alloy such as a tungsten alloy (TiW) or a refractory metal nitride such as tungsten nitride (WN).

Although the sputtering method is used as the method for forming the Si film 10, the contamination prevention effect is obtained even with the Si film formed by the high frequency excitation plasma CVD method at a frequency of 13.56 MHz and the microwave excitation plasma CVD method at 2.45 GHz. Made little difference. In this embodiment, the thickness of the Si film 10 is set to 50 nm with a margin taken into consideration, but it was also confirmed that 10 nm or more is sufficient. Furthermore, the Cu film 12 is replaced with Cu-0.3% Zr or Cu as a Cu alloy film.
The effect was the same even when -1% Be was used.

Embodiment 2 This embodiment will be described with reference to FIG. Plasma TEOS-
The structure of the layer below the SiO film 9 and the manufacturing method are exactly the same as in the first embodiment. Hereinafter, the structure of the layer above the plasma TEOS-SiO film 9 and the manufacturing method will be described. First, a three-layer interlayer insulating film (plasma TEOS-Si) similar to that of Example 1 is used.
Connection holes were opened in the O film 7, the coating insulating film 8, and the plasma TEOS-SiO film 9). Next, tungsten silicide (WSi _x) film 21 containing excessive Si was formed by CVD. The substrate temperature during film formation is 350 ° C. A mixed gas of 10 sccm of tungsten hexafluoride, 1000 sccm of monosilane and argon was supplied as a reaction gas,
The reaction was carried out under reduced pressure with a gas pressure of 0.65 Torr. The composition of the formed WSi _x film 21 is x = 2.5, and the film thickness is 50 n.
m. Next, a TiN film 11 having a film thickness of 100 nm and a Cu film 12 having a film thickness of 850 nm were successively deposited by a sputtering method. The substrate temperature during deposition was 300 ° C. C
The u film 12, the TiN film 11, and the WSi _x film 21 were wiring processed by a dry etching method.

Thereafter, the film thickness of 300 is obtained by the same method as in the first embodiment.
nm plasma TEOS-SiO film (not shown), coating insulating film (not shown) having a film thickness of 200 nm, and film thickness of 100 nm
Plasma CVD-SiN film (not shown) is coated with three layers insulating film composed of, finally 450 ° C. with H ₂ gas stream,
Heat treatment was performed for 30 minutes. Also in this example, there was no characteristic deterioration due to contamination. Excess S contained in the WSi _x film 21
It is presumed that i has the same function as the Si film 10 of the first embodiment.

The TiN film 11 of this embodiment has a film thickness of 100 nm.
W film may be used. If a W membrane is used, W in the same reaction vessel
Since it can be deposited continuously with the Si _x film 21, the productivity is increased. Although the WSi _x film is used in the present embodiment, a titanium silicide (TiSi _x ) film and a molybdenum silicide (Mo
Si _x ) film, tantalum silicide (TaSi _x ) film, cobalt silicide (CoSi _x ) film, nickel silicide (NiSi _x ) film, zirconium silicide (ZrS)
The contamination prevention effect was also obtained with the i _x ) film. The composition x of these silicides is 2.5, but x ranges from 2.1 to 3.0.
The effect was recognized even in the range of.

Embodiment 3 This embodiment will be described with reference to FIG. In this embodiment, instead of the Al-0.5% Cu-1.5% Si / W wiring of the first embodiment, a W film 5 having a film thickness of 100 nm and an Al film having a film thickness of 30 nm are used.
Si / Al-0.5 composed of an Al alloy film 6 made of -0.5% Cu-1.5% Si and a Si film 31 having a film thickness of 10 nm
% Cu-1.5% Si / W wiring was formed. Three-layer interlayer insulating film (plasma TEOS-SiO film 7, coating insulating film 8,
After coating with the plasma TEOS-SiO film 9), the connection hole was opened and the W plug 32 was embedded by the selective CVD method.
Subsequently, a TiN film 11 having a film thickness of 50 nm and a film thickness of 900 nm
The Cu film 12 was laminated and processed by the dry etching method. Hereinafter, it is the same as that of the first embodiment. Also in this example, there was no characteristic deterioration due to contamination.

Embodiment 4 This embodiment will be described with reference to FIG. In this embodiment, instead of the Si / Al-0.5% Cu-1.5% Si / W wiring of the third embodiment, a WSi _x film 41 having a film thickness of 50 nm and a film thickness of 100 is used.
The W film 44 of Cu film 43 and 50nm in nm of W film 42 and 300nm are laminated and a W / Cu / W / WSi _x wire. Hereinafter, it is the same as that of the third embodiment. Also in this example, there was no characteristic deterioration due to contamination.

Embodiment 5 This embodiment will be described with reference to FIG. In this embodiment, the PSG film 3 and the plasma TEO of the embodiment 1 shown in FIGS.
The S-SiO film 7 is replaced with the plasma TEOS-SiO film 5 respectively.
1 and silicon oxynitride film 52. The substrate temperature is 350 ° C., the reaction gas is monosilane, ammonia,
A mixed gas of nitrous oxide (partial pressure ratio 20: 20: 1) was used. A gas pressure was 1 Torr and a high-frequency power of 500 W was discharged to form a film. Also in this example, there was no characteristic deterioration due to contamination.

[0023]

According to the semiconductor device of the present invention, the diffusion amount of Cu into the element region can be reduced without increasing the thickness of the protective film and lowering the wiring process temperature. Therefore, for example, the joint releasability can be improved without lowering the reliability of the connection hole.
It is possible to prevent an increase in the current and a change in the threshold of the MOS device. Further, according to the method for manufacturing a semiconductor device of the present invention, the above semiconductor device can be easily manufactured.

[Brief description of drawings]

FIG. 1 is a diagram showing a comparison of Cu diffusion suppressing effects of various protective films.

FIG. 2 is a vertical cross-sectional view of the semiconductor device for explaining the manufacturing process according to the first embodiment of the present invention.

FIG. 3 is a vertical cross-sectional view of the semiconductor device for explaining the manufacturing process according to the first embodiment of the present invention.

FIG. 4 is a vertical sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a vertical sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a vertical sectional view of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a vertical sectional view of a semiconductor device according to a fifth embodiment of the present invention.

[Explanation of symbols]

1 Si substrate 2 Th-SiO ₂ film 3 PSG film 4 and 32 W plugs 5,42,44 W film 6 Al alloy film 7,9,13,51 plasma TEOS-SiO film 8, 14 coating insulating film 10, 31 Si Film 11 TiN film 12, 43 Cu film 15 Plasma CVD-SiN film 21, 41 WSi _x film 52 Silicon oxynitride film

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Kenji Hinode 1-280, Higashi Koikeku, Kokubunji, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd. (72) Inventor Yoshio Honma 1-280, Higashi Koikeku, Kokubunji, Tokyo Hitachi, Ltd. Central Research Laboratory (72) Inventor Nobuyoshi Kobayashi 1-280, Higashi Koikeku, Kokubunji, Tokyo Stock Company Hitachi Ltd. Central Research Institute (72) Inventor Naoki Yamamoto 1-280, Higashi Koikeku, Kokubunji, Tokyo Hitachi Central Research Laboratory (72) Inventor Atsushi Hiraiwa 1-280 Higashi Koigokubo, Kokubunji, Tokyo Stock Company Hitachi Central Research Laboratory (72) Inventor Toshio Kojima 1-280 Higashi Koikeku, Tokyo Kokubunji City Hitachi Ltd. Central Research Laboratory (72) Inventor Kenji Murakami Josui, Kodaira City, Tokyo 5-20-1 Hommachi Hitachi Cho-LS Engineering Co., Ltd. Inside the company

Claims (10)

[Claims] 1. A semiconductor element, an insulating film which contains Si, O, and contains at least one element selected from the group consisting of P and N, and which covers the semiconductor element, and a copper film or copper as a main component. A conductor layer made of an alloy film as a component, and silicon or a silicon compound made of at least one material selected from the group consisting of silicon and silicide containing excess Si provided between the conductor layer and the insulating film. A semiconductor device having a film. 2. The semiconductor device according to claim 1, further comprising a barrier film containing at least a refractory metal, an alloy thereof or a nitride thereof between the silicon or silicon compound film and the conductor layer. Semiconductor device. 3. The semiconductor device according to claim 1, wherein the silicon or silicon compound film is provided on the insulating film, and the conductor layer is provided on the silicon or silicon compound film. A semiconductor device characterized by the above. 4. A substrate, a semiconductor element provided on the substrate, an insulating film covering the semiconductor element, containing Si, O, and containing at least one element selected from the group consisting of P and N, and A silicon or silicon compound film made of at least one material selected from the group consisting of silicon and silicide containing excess Si, a barrier film containing at least a refractory metal, its alloy or its nitride, and a copper film or copper A semiconductor device having a laminated film with a conductor layer made of an alloy film as a component, the laminated film being provided on the insulating film. 5. The semiconductor device according to claim 1, wherein the insulating film is a film containing at least one film selected from the group consisting of a phosphorus glass film and a silicon oxynitride film. There is a semiconductor device. 6. The semiconductor device according to claim 5, wherein the phosphorus glass film contains 0.5 mol% or more of phosphorus in terms of phosphorus pentoxide. 7. The semiconductor device according to claim 1, wherein the insulating film has a film thickness of 100 nm or more. 8. The semiconductor device according to any one of claims 1 7, the silicon or silicon compound film, the formula MSi _x (however, M is tungsten, titanium, molybdenum, tantalum, nickel, cobalt And at least one metal element selected from the group consisting of zirconium and x is a silicide containing excess Si represented by x> 2. 9. The semiconductor device according to claim 1, wherein the silicon or silicon compound film has a film thickness of 10 nm or more. 10. A semiconductor element is formed on a substrate, and an insulating film containing Si, O and at least one element selected from the group consisting of P and N is formed on the semiconductor element.
A silicon or silicon compound film made of at least one material selected from the group consisting of silicon and silicide containing excess Si is formed on the insulating film, and a connection hole is formed in the silicon or silicon compound film, and the silicon or silicon compound film is formed. A barrier film containing at least a refractory metal, an alloy thereof or a nitride thereof on the connection hole, and a conductor layer formed of a copper film or an alloy film containing copper as a main component on the barrier film. A method of manufacturing a semiconductor device, comprising forming the semiconductor device by etching the outer peripheral portions of the barrier film and the silicon or silicon compound film into substantially the same pattern.