JPH06133447A - Ground fault detector - Google Patents

Abstract

PURPOSE:To provide a ground fault detector which facilitates the reduction of misoperations caused by the superposition of an abnormal peak voltage such as a lightning surge upon an AC voltage. CONSTITUTION:As the output (0) of a controller 17 is not turned to 'H' if the detection output of a lightning surge or the like detected by a zero phase current transformer CT has a pattern in the order of positive, negative and positive and its waveform level does not exceed the reference levels L1 and L1' of comparators 10 and 11, a charge/discharge circuit 12 does not perform a second time charging of a capacitor C4 and the discharge of the capacitor C4 is continued. When the voltage drop of the capacitor C4 in each discharge process reaches a certain rate, the charge/discharge circuit 12 reduces a discharge time constant to make the capacitor C4 discharged quickly. If a third time charging is performed and the voltage of the capacitor C4 does not reach the threshold Vth3 of a judging circuit 15, therefore, the conditions with which a grounding detection signal is generated, like at the time when the grounding is detected, are not realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ground fault detecting device for detecting a leak current, a ground fault current and the like.

[0002]

2. Description of the Related Art Generally, a ground fault detector of this type compares an output voltage of a zero-phase current transformer provided in an AC circuit with a predetermined threshold value, and charges and discharges a capacitor according to the compared output. The time delay determination is performed, and the ground fault signal is transmitted when the voltage of the capacitor exceeds a predetermined threshold value.

However, in the above ground fault detecting device,
For example, when an abnormal peak voltage such as lightning surge is superimposed on the AC circuit and a peak current flows to the ground through a varistor or lightning arrester equipped in the AC circuit to protect the load equipment, the output corresponding to that peak current When a voltage is output from the zero-phase current transformer, an output voltage with a long wave tail length appears in the polarity on the opposite side after that, and due to the output voltage with a long wave tail length output to the opposite side polarity, In some cases, the voltage of the capacitor was sufficiently charged to exceed a predetermined threshold value and a ground fault signal was transmitted.

Therefore, the positive side of the output voltage output from the zero-phase current transformer is provided in order to prevent unnecessary operation with respect to the generation of the output voltage having a long wave tail output from the zero-phase current transformer. Alternatively, a method has been proposed in which the number of times the negative output voltage is generated is counted to determine the ground fault. This one compares the output voltage of the zero-phase current transformer with a predetermined threshold value on the positive side or negative side and counts the number of times when it exceeds the threshold value. For abnormal peak voltage,
The ground fault is distinguished by continuously distinguishing the ground fault currents by the number of times.

[0005]

However, the ground fault detection device for counting the number of times the positive side or negative side output voltage is generated to discriminate the ground fault has the following problems. In other words, the zero-phase current transformer that detects the leakage current in the AC circuit is designed to insert the conductor of the AC circuit, which is the primary winding, into the center through hole of the core. When it is inserted, the zero-phase current transformer has a bias characteristic, and for example, when a large current such as the current at the time of starting the motor flows in the AC circuit, the zero-phase current transformer generates the detection output and this output at the same time. The waveform was sometimes output as a distorted waveform.

The output voltage of this distorted waveform intermittently exceeds a predetermined threshold value on the positive side or the negative side, and a predetermined count is performed, which is a factor for determining the ground fault. The present invention has been made in view of the above problems, and an object thereof is to reduce malfunction due to superimposition of an abnormal peak voltage such as a lightning surge on an AC circuit, and to achieve zero-phase current transformation. An object of the present invention is to provide a ground fault detection device in which malfunctions are reduced even for a detection output having a distorted waveform that is output due to a bias characteristic of a container.

[0007]

DISCLOSURE OF THE INVENTION The present invention is directed to a zero-phase current transformer for detecting a leakage current in an alternating current circuit, and a waveform level and a reference level on the positive side of alternating detection outputs of the zero-phase current transformer. For comparing the negative side waveform level of the detection output with the reference level, charging means for controlling the charging of the capacitor, the voltage of the capacitor and the first level A first determination unit that compares a threshold value, a second determination unit that compares the voltage of the capacitor with a second threshold value that is higher than the first threshold value by a certain level, and a capacitor voltage and a constant value that is greater than the second threshold value. A third judging means for comparing with a third threshold having a high level, and a controlling means for controlling the charging means and the discharging means based on the outputs of the both comparing means and the first to third judging means, The control means controls the first output of the positive side comparing means. If there is a rise, the charging means causes the capacitor to be charged, and if there is an output from the first determining means in the charging process, the charging is stopped and the discharging means causes discharging. If there is an output from the negative side comparing means before the voltage drop of the capacitor exceeds a certain range during the discharging process, the charging means causes the capacitor to be charged for the second time, and the second determining means during the charging process. If there is an output from the positive side comparing means until the voltage drop of the capacitor exceeds a certain range in the discharging process, the charging is stopped and the discharging means performs discharging. The charging means causes the capacitor to be charged for the third time, and a ground fault detection signal is generated if there is an output from the third determining means in the charging process.

[0008]

According to the present invention, the ground fault detection signal is generated only when the waveform of the alternating detection output from the zero-phase current transformer continues to be positive, negative, and positive as in the case of occurrence of a ground fault. In addition, a transient current due to a lightning surge, etc., or a detection output with waveform distortion that occurs at motor startup due to the bias characteristics of the zero-phase current transformer, does not generate a ground fault detection signal and has high reliability. Is obtained.

[0009]

FIG. 2 shows a circuit configuration of the present embodiment. In this embodiment, a zero-phase current transformer CT having an AC electric line inserted therein as shown in FIG. 2 has a leakage current due to a ground fault in the AC electric line. A detection output is generated when it flows, and the alternating detection output is a waveform shaping circuit composed of a clamp diode D ₁ , D ₂ and a low-pass filter composed of resistors R ₁ , R ₂ , capacitors C ₁ , C _2. It is input to the ground fault current detection circuit unit 2 including an IC circuit via the unit 1.

This ground fault current detection circuit section 2 is a direct current by a rectifying / smoothing circuit composed of a diode D ₃ , resistors R ₃ , R ₄ and a capacitor C ₃ which are connected to an AC circuit via an exciting coil of an electromagnetic trip device 3. Power source Vcc is obtained, ground fault detection signal
OUT is connected to the trigger circuit of the thyristor 4 inserted between the electromagnetic trip device 3 and the AC circuit. Next, the circuit configuration of the ground fault current detection circuit unit 2 will be described with reference to FIG.

First, the zero-phase current transformer C is passed through the waveform shaping circuit 1.
The detection output from T to each input, comparator circuit 11 for comparing a comparison circuit 10 for comparing the level with a reference level L ₁ of the positive side of the waveform, the level and the reference level L ₁ 'and negative side waveform When a charge and discharge circuit 12 for charging the external capacitor C ₄ discharge and the voltage of the capacitor C ₄ and the threshold value Vth
A first determination circuit 13 for comparing ₁ and a capacitor C ₄
Second determination circuit 14 for comparing the voltage of with the threshold Vth ₂
A third determination circuit 15 for comparing the voltage of the capacitor C ₄ with the threshold value Vth _3; and a threshold circuit 16 including a series circuit of resistors R _{11 to} R ₁₃ for setting the threshold values Vth _{1 to} Vth _3. , The outputs S ₁ and S of the comparison circuits 10 and 11
₂ and the outputs S ₃ , S ₄ , S of the decision circuits 13, 14, 15
The control signal O of the charging / discharging circuit 12 is generated based on ₅ and the control circuit 17 including a logic circuit for controlling the generation of the ground fault detection signal OUT and the reference circuits L ₁ and L ₂ are provided to the comparison circuits 11 and 12. And a reference voltage circuit (not shown) for providing

The charging / discharging circuit 12 performs charging when the control signal O from the control circuit 17 is "H" and discharging when the control signal O is "L". Thus, in a normal state, the outputs S ₁ and S ₂ of the comparison circuits 10 and 11 are both “H”, and the capacitor C ₄ is not charged, so the outputs S _{3 of the} determination circuits 13 to 15 are generated.
~ S ₅ are both "L".

At this time, the NOR gate NR _{1 of the} control circuit 17
The outputs of NR ₃ are both “L”, the output of NOR gate NR ₄ is “H”, the output of NOR gate NR ₅ is “L”, the output of NOR gate NR ₆ is “H”, and the NOR gate N at the final stage
The output of R ₇ becomes “L”. That is, the control signal O of the control circuit 17 becomes "L", and the charging / discharging circuit 12 is in the discharging operation state.

Next, a ground fault occurs and a detection output is generated in the zero-phase current transformer CT, and a detection output having a waveform as shown in FIG. The first waveform level of the input waveform on the positive side of the input waveform is compared circuit 10
When the reference level L _{1 of} is exceeded, the output S _{1 of the} comparison circuit 10
Becomes "L", and therefore the NOR gate N of the control circuit 17
The output of R ₁ is inverted to “H”, so NOR gate NR
The output of ₆ is also inverted to "L". By this inversion, the output of the NOR gate NR _{7 at} the final stage is inverted to "H".

First, the waveform level on the negative side is compared circuit 11
Reference level L₁’, The output S of the comparison circuit 11₂
Is inverted to "L", NOR gate NR₂Output
Changes to "H", and NOR gate NR_FourOutput goes to "H"
Invert, but NOR gate NR _Five, NR₆Output is initial
The control signal O of the control circuit 17 is "
It remains L ″.

Now, as described above, the output of the NOR gate NR ₇ is inverted to "H", and the control signal O of the control circuit 17 is "H".
Then, the charging / discharging circuit 12 causes the charging current IA to flow through the capacitor C _{4 according} to a predetermined charging time constant and performs the first charging as shown in FIG. 3B. When the charging voltage of the capacitor C ₄ rises and reaches the threshold value Vth ₁ of the determination circuit 13, the determination circuit 13 inverts the output S ₃ from “L” to “H”. By this inversion, the NOR gate N of the control circuit 17
R ₁ inverts the output from "H" to "L". Therefore, the output of the NOR gate NR ₆ is inverted from “H” to “L”, and as a result, the output of the NOR gate NR ₇ returns to “L” and the control signal O of the control circuit 13 becomes “L”. Therefore, the charging / discharging circuit 12 stops charging the capacitor C _{4 and} causes the capacitor C ₄ to have a discharging time constant larger than the charging time constant.
The charge of ₄ is discharged as shown in FIG. After this discharge is started, the waveform level on the positive side of the input waveform changes to the comparator circuit 10.
Below the reference level L _{1 of} , the output S ₁ of the comparison circuit 10 is inverted to "H". The output of each NOR gate NR ₁ ~NR ₇ of this inversion control circuit 17 is not inverted, thus the control signal O of the control circuit 17 also remains "L", the charge and discharge circuit 12 continues the discharging operation.

Here, the judgment circuit 13 has a hysteresis function of holding the output from the threshold Vth ₁ to the range where the input voltage drops to a predetermined rate, while the discharge time constant is a time corresponding to about half cycle of the power supply frequency. The voltage of the capacitor C ₄ is set so as not to drop below the value of the predetermined ratio of the threshold value Vth ₁ during the period. When the negative waveform level exceeds the reference level L ₁ ′ of the comparison circuit 11, the comparison circuit 11 inverts the output S ₂ from “H” to “L”. By this inversion, the NOR gate NR ₂ of the control circuit 17 inverts the output from “L” to “H”, and the NOR gate NR ₄ becomes “H”.
The output is inverted from H ”to“ L. ”Therefore, the determination circuit 1
The NOR gate NR ₅ receiving the output S ₃ of No. ₃ and the output of the NOR gate NOR ₄ inverts the output from “L” to “H”. Therefore, the output of the NOR gate NR ₆ becomes “L”, and the output of the NOR gate NOR ₇ , that is, the control signal O of the control circuit 17 becomes “H”.

When the control signal O of the control circuit 17 becomes "H", the charging / discharging circuit 12 stops discharging and causes the charging current IA to flow through the capacitor C ₄ with the above-mentioned charging time constant to perform the second charging. When the voltage of the capacitor C ₄ rises by the second charge and reaches the threshold value Vth ₂ , the decision circuit 14 inverts its output S ₄ from “L” to “H”. By this inversion, the NOR gate NR ₂ of the control circuit 17 inverts the output from “H” to “L”. Therefore, the output of NOR gate NR ₄ changes from “L” to “H” and the output of NOR gate NR ₅ changes to “H”.
The output of the NOR gate NR ₆ is inverted from “L” to “H”, and the output of the NOR gate NR ₆ is inverted from “L” to “H.” As a result, the output of the NOR gate NR ₇ returns to “L” and the control of the control circuit 13 is performed. The signal O becomes “L.” Therefore, the charge / discharge circuit 12 stops charging the capacitor C ₄ and discharges the charge of the capacitor C ₄ with the above discharge time constant as shown in FIG. After the start, when the waveform level on the negative side of the input waveform falls below the reference level L ₁ 'of the comparison circuit 11, the output S ₂ of this comparison circuit 11 is inverted to "H". The outputs of NR _{1 to} NR ₇ are not inverted, so that the control signal O of the control circuit 17 remains “L”, and the charge / discharge circuit 12 continues the discharging operation.

Here, the determination circuit 14 also has a hysteresis function similar to that of the determination circuit 13, and the discharge time constant is also set to correspond thereto. Now, in the second cycle, when the waveform level on the positive side exceeds the reference level L ₁ of the comparison circuit 10, the comparison circuit 10 changes the output S ₁ from “H” to “L”.
Flip again. By this inversion, the output S of the comparison circuit 10
The NOR gate NR ₃ of the control circuit 17, which receives the inverted output of the output S ₄ of the determination circuit 14 together with ₁ , outputs “L”.
To "H". Therefore NOR gate NR ₄ is
The output is inverted from "H" to "L", and by this inversion, the output of the NOR gate NR ₅ is inverted from "L" to "H". Therefore, the output of the NOR gate NR ₆ becomes "L" and the output of the NOR gate NOR ₇ . That is, the control signal O of the control circuit 17 is "
H ".

When the control signal O of the control circuit 17 becomes "H", the charging / discharging circuit 12 stops discharging and supplies the charging current IA to the capacitor C ₄ with the above-mentioned charging time constant to perform the third charging. When the voltage of the capacitor C ₄ rises by the third charge and reaches the threshold value Vth ₃ , the determination circuit 15 inverts its output S ₅ from “L” to “H”. By this inversion, the transistor Q ₁ is turned on, and the ground fault current detection circuit section 2 generates the ground fault detection signal OUT shown in FIG. 3 (c). This ground fault detection signal OUT triggers the thyristor 4 to conduct,
The electromagnetic tripping device 3 is driven, and the AC circuit is interrupted by the circuit breaker 5. Further, the transistor Q ₂ is turned on, and the resistors R _{11 to} R ₁₃ of the threshold circuit 16 are short-circuited in the series circuit of the transistor Q ₂ and the diode D _10, and the output S _{5 of the} determination circuit 15
Hold the state of. Further, the transistor Q ₃ is turned on, and the resistor R ₀ connected to the transistor Q ₃ is connected in parallel to the capacitor C ₄ .

On the other hand, the output of the NOR gate NR ₇ of the control circuit 17, that is, the control signal O of the control circuit 17 is the determination circuit 15
Output becomes "H", so it is inverted to "L". By this inversion, the charging / discharging circuit 12 starts discharging, but since the resistor R ₀ is connected in parallel as described above, the discharging time constant becomes small, and the discharging current IC larger than the first and second discharging currents ID. Will flow. Charging and discharging circuit 12 to rapidly discharge the capacitor C ₄ by reducing the discharge time constant when the drops below the value of the predetermined percentage of the voltage threshold Vth ₃ of the capacitor C _4.

In the above operation, a ground fault occurs and the zero-phase current transformer C
This is the operation when the waveform of the detection output alternating from T continues for approximately more than a cycle. However, as shown in FIG. 4, when a transient detection output is generated from the zero-phase current transformer CT due to lightning surge or the like, Alternatively, as shown in FIG. 5, when a detection output having waveform distortion is generated at the time of starting the motor due to the bias characteristics of the zero-phase current transformer CT, the waveform levels are positive, negative, and positive in order. Reference levels L ₁ and L of the comparison circuits 10 and 11
_Since it does not exceed ₁ ', the ground fault detection signal OUT as described above is not output. In addition, (a) and (b) of FIG.
(C) and (a) (b) (c) of FIG. 5 are (a) of FIG.
It corresponds to (b) and (c), respectively, and similarly.

That is, if the negative waveform level of the input waveform does not exceed the reference level L ₁ 'of the comparison circuit 11 in the first discharging process, the second charging is not performed and the discharging is continued.
Further, even if the second charging is performed, the positive waveform level of the input waveform remains in the comparison circuit 11 in the discharging process corresponding to the charging.
If the reference level L ₁ is not exceeded, the discharge is continued. Then, when the voltage drop of the capacitor C ₄ progresses to a certain rate in each discharging process, the charging / discharging circuit 12 reduces the discharging time constant at that time to perform rapid discharging.

Therefore, the third charging is performed and the determination circuit
Threshold Vth of 15₃Capacitor C _FourVoltage does not reach
In the above case, the ground fault detection signal OUT is
The conditions that occur are not met.

[0025]

The present invention is configured as described above, and when the control means has the rising edge of the first output of the positive side comparing means,
When the capacitor is charged by the charging means and the output from the first judging means is generated in the charging process, the charging is stopped and the discharging means is caused to discharge, and the voltage drop of the capacitor is constant during the discharging process. If there is an output from the negative side comparing means before exceeding the range, the charging means causes the capacitor to be charged for the second time, and if there is an output from the second determining means in this charging process, the charging is stopped and If the second side output from the positive side comparing means is generated before the voltage drop of the capacitor exceeds a certain range in the discharging process by the discharging means, the third charging of the capacitor is performed by the charging means. Let's do this in the charging process
Since the ground fault detection signal is generated if there is an output of the judgment means, only when the waveform of the alternating detection output from the zero-phase current transformer continues to be positive, negative, or positive, as when a ground fault occurs. A ground fault detection signal can be generated at the output, and a ground fault detection signal can be generated at the detection output generated at motor startup due to transient current due to lightning surge, etc. and bias characteristics of the zero-phase current transformer. There is an effect that high reliability is obtained.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a ground fault current detection circuit unit according to the present invention.

FIG. 2 is a circuit configuration diagram of the above.

FIG. 3 is a waveform diagram for explaining the operation of the above.

FIG. 4 is a waveform diagram for explaining the operation when a lightning surge occurs in the above.

FIG. 5 is a waveform diagram for explaining the operation when the above distortion waveform is generated.

[Explanation of symbols]

 2 Ground Fault Current Detection Circuit Section 10 Comparison Circuit 11 Comparison Circuit 12 Charge / Discharge Circuit 13 Judgment Circuit 14 Judgment Circuit 15 Judgment Circuit 16 Threshold Circuit 17 Control Circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hitoshi Makinaga 1048, Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Works Co., Ltd. (72) Masaharu Kitado, 1048, Kadoma, Kadoma, Osaka Matsushita Electric Works Co., Ltd. (72) Inventor Minoru Kuroda 1048 Kadoma, Kadoma-shi, Osaka Prefecture Matsushita Electric Works Co., Ltd. (72) Inventor Yasuo Nagai 111 Nishiyote-cho, Takasaki-shi, Gunma Hitachi, Ltd. Takasaki Plant (72) Inventor Yuji Tsukui 5-22-1, Kamisuihoncho, Kodaira-shi, Tokyo Inside Hitachi Microcomputer System Co., Ltd.

Claims (1)

[Claims] 1. A zero-phase current transformer for detecting a leak current in an alternating current circuit, and a positive-side comparing means for comparing the level of a waveform on the positive side of an alternating detection output of the zero-phase current transformer with a reference level. A negative side comparison means for comparing the level of the negative side waveform of the detection output with a reference level, a charging means for controlling the charging of the capacitor, and a first side for comparing the voltage of the capacitor with a first threshold value. And a second determining means for comparing the voltage of the capacitor with a second threshold having a constant level higher than the first threshold, and a third threshold having a constant voltage higher than the second threshold for the capacitor voltage. A third judging means for comparing, and a controlling means for controlling the charging means and the discharging means based on the outputs of the both comparing means and the first to third judging means,
The control means causes the charging means to charge the capacitor when the first output of the positive side comparison means rises, and stops the charging when there is an output from the first determination means in the charging process. Then, the discharging means performs discharging, and if there is an output from the negative side comparing means before the voltage drop of the capacitor exceeds a certain range in the discharging process, the charging means performs the second charging of the capacitor. If there is an output from the second determining means in the charging process, the charging is stopped and the discharging means performs discharging, and the positive voltage is exceeded until the voltage drop of the capacitor exceeds a certain range in the discharging process. If there is a second output from the side comparing means, the charging means causes the capacitor to be charged for the third time, and if there is an output from the third determining means during this charging process, a ground fault is detected. Ground fault sensing device which is characterized in that to generate the issue.