JPH0612772A - Device for recording and reproducing information - Google Patents

Abstract

PURPOSE:To write unrecorded data by making a storage part storing data transiently and a backup source protecting the data attachable to/detachable from freely a device body and connecting the storage part and the source to a normal device at a fault time. CONSTITUTION:While recording in a buffer memory 11 through a pickup 6, even when recording operation is interrupted caused by the stop of power supply or the occurrence of the fault in the device, no unrecorded data disappears since the data is protected by a backup battery 12. The memory 11 and the battery 12 are loaded on the same package 13, and the package 13 is connected with an information recording and reproducing device body by a connector 5. Then, the memory 11 and the battery 12 are taken off from the defective device the package 13 and all, and by connecting them to other normal device, the unrecorded data in the memory 11 is restoration-processed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information recording / reproducing apparatus for recording / reproducing information on / from a recording medium.

[0002]

2. Description of the Related Art FIG. 9 is a block diagram showing a general magneto-optical information recording / reproducing apparatus (hereinafter referred to as recording / reproducing apparatus). In FIG. 9, reference numeral 1 is a CPU block that controls the entire recording / reproducing apparatus, and includes a CPU, a ROM, and a RAM.
Reference numeral 2 is an interface block for communicating commands and data with the host system 9, 3 is a data control block for writing the contents of the buffer memory to the medium, and reading the contents of the medium to the buffer memory, and 4 is a signal processing block. The signal processing block 4 is a modulation / demodulation circuit for converting between data words and channel words and writing data to a medium.
It is composed of a synchronizing signal generating circuit for generating a reference signal for reading. A pickup 6 is composed of a laser for writing data on the medium, a sensor for detecting the reflected light from the medium, and the like. 7 is a pickup drive control block for controlling the positioning of the pickup 6;
Is a medium control block for controlling the rotation of the medium, and 9 is a host system connected to the recording / reproducing apparatus. Furthermore, 10
Is a connector for connecting the recording / reproducing apparatus and the host system 9, and 11 is a buffer memory for temporarily holding write data from the host system 9 and read data from the medium.

FIG. 10 is a flow chart showing the flow of a conventional write processing procedure to a medium. Hereinafter, a conventional data writing procedure will be described with reference to FIGS. 9 and 10. First, when a write command (write command) is issued from the host system 9, the CPU block 1 receives the write address and the data size through the interface block 2 (S1). Next, CPU block 1
Controls the interface block 2 and the data control block 3 to read the print data (block unit of 512 bytes or 1024 bytes) from the host system 9 into the buffer memory 11 through the path shown in FIG. 9 (S2). When this data reading is completed, the CPU block 1 controls the pickup drive control block 7,
The pickup 6 is moved to the designated writing address (S3). When the movement of the pickup 6 is completed, the CPU
The block 1 controls the data control block 3 to erase the data of one block size on the medium (S4), and C
The PU block 1 moves the pickup 6 again to the designated writing address (S5). After that, the CPU block 1 controls the data control block 3 to write the record data on the buffer memory 11 to the medium (S6). At this time, the data in the buffer memory 11 is transferred by the data control block 3 to the signal processing block 4 through the path of FIG. 9 and converted into channel data. After this conversion, the channel data is transferred to the pickup 6 through the path shown in FIG. 9 and written on the medium by laser light. The CPU block 1 judges whether or not the data of the size designated by the host system 9 has been written on the medium (S7), and if it has not been written, increments the designated address by 1 (S8), and then returns to S2. And repeat the process. Then, when the CPU block 1 has finished writing the data of the designated size, it notifies the host system 9 of the completion of writing (S9).

[0004]

However, in the conventional information recording method, since one data write has two positionings (S3 and S5), the seek operation of the pickup and the waiting for rotation of the medium are factors. However, there is a problem that the writing operation is considerably slower than that of the hard disk. In particular, this tendency was remarkable when many small files were written on the medium. Therefore, in order to deal with this problem, there is a method of collectively writing recording data. In this batch writing method, the recording / reproducing apparatus notifies the host system 9 of the completion of writing at the time when the recording data from the host system is read into the internal buffer (that is, the data transfer of the path of FIG. 9). . With this batch write method, write commands can be continuously received until the buffer memory is full, and data writing to the medium is free when there is no command from the host system or when the internal buffer memory is full. Data is written all at once in time. Therefore, it is possible to shorten the apparent processing time for the host system.

However, in the above batch writing method, when the power of the recording / reproducing apparatus is turned off, or when the recording / reproducing apparatus fails, the data disappears from the buffer memory before being recorded on the medium. There is a drawback that As a measure to prevent the loss of the contents of the buffer memory when the power is off, as a measure to protect the contents of the buffer memory with a battery and to protect the contents of the buffer memory due to a device failure, a measure to install an external device to back up the contents of the buffer memory However, even with these measures, the power off can be dealt with, but the device failure cannot be dealt with, or even if it can be dealt with, the device becomes large-scale and the cost is too high. .

Further, in the conventional information recording / reproducing apparatus, a voltage for detecting the power supply voltage is used for the purpose of accurately recording / reproducing information or not erasing the information in the adjacent sector during the recording operation. A detection circuit may be provided. In such a device, when the detected voltage becomes equal to or lower than a predetermined reference voltage, a reset signal is output to temporarily stop the operation of the device. However, in the above-mentioned conventional information recording / reproducing apparatus, for example, when the apparatus is incorporated in a personal computer and the power source is also supplied from the personal computer, the devices incorporated in the personal computer are collectively operated when the power source is turned on. Since the operation is started, the power supply current suddenly increases and the power supply voltage temporarily drops. In such a case, when the detection voltage of the voltage detection circuit becomes lower than the reference voltage, a reset signal is erroneously output and the device cannot be started.

The present invention has been made in view of the above conventional circumstances, and an object thereof is to provide an information recording / reproducing apparatus capable of easily protecting data in a buffer memory even when the apparatus fails. Especially. It is another object of the present invention to provide an information recording / reproducing apparatus which prevents the reset signal from being output accidentally when the power is turned on.

[0008]

SUMMARY OF THE INVENTION An object of the present invention is to have storage means for temporarily storing data sent from a host control device, and when this data is recorded on an information recording medium, In an information recording / reproducing apparatus for collectively recording information after a predetermined amount of data is stored in the storage means, a backup power supply for protecting the data in the storage means is provided, and the backup power supply and the storage means Is mounted on the same substrate, and the substrate is detachably attached to the apparatus main body.

Further, an object of the present invention is to detect a power supply voltage and compare a detected voltage of this detecting means with a reference voltage with a plurality of voltage detecting means for outputting the detected voltages at different ratios. Means for outputting a reset signal indicating an abnormality in the power supply voltage when the detected voltage becomes lower than the reference voltage, and one of the plurality of voltage detecting means is selected according to the operating state of the device. And an information recording / reproducing device.

[0010]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the information recording / reproducing apparatus of the present invention. In FIG. 1, the same parts as those of the conventional device shown in FIG. 9 are designated by the same reference numerals, and detailed description thereof will be omitted in the present embodiment. In FIG.
Reference numeral 12 is a backup battery for protecting the data in the buffer memory 11, and together with the buffer memory 11,
It is mounted on the package 13. The package 13 is connected to the apparatus main body by the connector 5, and therefore the buffer memory 11 and the backup battery 12 are configured to be attachable to and detachable from the apparatus main body. In this embodiment, the batch writing method is adopted as the information writing method.

2A and 2B are explanatory views showing the data structure of the buffer memory 11, respectively. In these examples, the buffer memory 11 has an address area for storing the write address specified by the host system 9. FIG. 2A shows an example in which address areas 1a to na are provided corresponding to the respective write data blocks 1 to n, and before writing the data of each data block, the corresponding addresses of the medium to which the data is written respectively. Written to area. In addition, when there is no data in the buffer memory or after writing the data to the medium, an invalid address is written in the address area. FIG. 2B shows an example in which write addresses are centrally managed by the address table 14. The address of the first data block 1 corresponds to the first table 14a in the address table 14, and the address of the final data block n corresponds to the final table 14n. When data is present in the buffer memory in the address table 14, an address is written corresponding to the data, and an invalid address is written when there is no data or after writing to the medium. Note that in this embodiment, the buffer memory 11 will be described assuming that the centralized management system of FIG.

FIG. 3 is a flow chart showing the flow of the recording processing procedure on the recording medium of this embodiment. Below, FIG.
The recording operation of this embodiment will be described with reference to FIGS. In FIG. 3, when there is a recording command from the host system 9, the CPU block 1 controls the data control block 3 to read the final table in the address table 14 in the buffer memory 11, and the buffer memory 11 is full. That is, it is checked whether or not there is a free area in the buffer memory 11 (S1). If it is full, the write process to the medium is executed, and if it is not full, the write command of the host system 9 is executed. Here, the host system 9 when the buffer memory 11 is not full first
The processing of the write command will be described. First, the CPU
The block 1 controls the interface block 2 and the data control block 3 to read the print data (512-byte or 1024-byte block unit) sent from the host system 9 and read it into the buffer memory 11 through the path of FIG. 1 (S2). . Next, the CPU block 1 controls the data control block 3 to make the buffer memory 11
A free table in which fffffH has been written is searched for from the address table 14 (S3). In the example of FIG. 2B, the final table 14n corresponds to this. After finding the empty table, the CPU block 1 controls the data control block 3 to write the write address designated by the host system 9 into the empty table 14n of the buffer memory 11 (S4). The CPU block 1 is a host system 9
The recording data from (1) is read into the unused data block n corresponding to the empty table 14n of the buffer memory 11 by controlling the interface block 2 and the data control block 3 (S5).

The CPU block 1 judges whether or not the data of the size designated by the host system 9 has been read into the buffer memory 11 (S6). If the writing has not been completed, the designated address is incremented by 1 (S7). ),
Return to S1. Then, the same processing is executed from S1, and the processing from S1 to S7 is repeated until the data of the designated size is read into the buffer memory 11. In this way, when the data of the specified size is read into the buffer memory 11,
The CPU block 1 notifies the host system 9 of the completion of writing (S9). The above processing is performed every time a write command is issued from the host system 9, and the remaining capacity of the buffer memory 11 gradually decreases, but the data in the buffer memory 11 is not yet written in the recording medium. As described above, the CPU block 1 monitors in S1 whether the buffer memory 11 is full, the data is accumulated in the buffer memory 11, and eventually the buffer memory 11
When the capacity of is full, writing to the recording medium is started for the first time. When writing this data, the CPU
Block 1 controls interface block 2,
Since the command is not accepted during the writing process, the host system 9 is notified that the drive is busy (S9). Next, the CPU block 1 controls the data control block 3 to read the write address from the address table 14 (S10). Here, first, the address information (00001H) of the leading table 14a of the address table 14 is read. The CPU block 1 controls the pickup drive control block 7 to move the pickup 6 to the read address (S11).

When the movement of the pickup 6 is completed, the CP
The U block 1 controls the data control block 3 to erase the data of one block size on the medium (S12),
After this erasing, the pickup 6 is moved again to the writing address (S13). The CPU block 1 controls the data control block 3 to write the data of the data block 1 of the buffer memory 11 corresponding to the address of the head address table 14a to the medium (S14). In this case, the data is transferred by the data control block 3 to the signal processing block 4 via the path of FIG. 1 and converted into channel data. Then, this channel data is sent to the pickup 6 through the path of FIG. 1 and written on the recording medium by the laser light. When the data writing for one block size is completed, the CPU block 1 controls the data control block 3 to start the head table 14a of the address table 14.
Write ffffH to and buffer memory 1 corresponding to this
Data block 1 of 1 is set as an unused block (S1
5). Next, the CPU block 1 judges whether all the valid address tables in the address table 14 have been cleared (S16), and if they have not been cleared, the process returns to S10 and the same processing as described above is executed. In this embodiment, the second address table 14b shown in FIG. 2B is detected as the valid address table, and the data of the next data block 2 is written in the address of that table. When all the data in the buffer memory 11 has been recorded on the recording medium in this way, the CPU block 1 notifies the host system 9 of the drive busy clear (S17), and the command from the host system 9 can be accepted again. Become.

In the present embodiment, when the power supply to the apparatus is stopped while the data in the buffer memory 11 is being recorded on the recording medium, the unrecorded data on the recording medium disappears because the backup battery 12 protects the data. There is no such thing.
Further, if the recording operation is stopped due to a failure of the apparatus while recording the data in the buffer memory 11, the unrecorded data will not be lost because it is protected by the backup battery 12 as well. In this case, since the buffer memory 11 and the backup battery 12 are mounted on the same package 13 and the package 13 is connected to the main body of the apparatus by the connector 5 as described above, the buffer memory 11 and the backup battery 12 fail. Can be removed from the device. Therefore, the removed package 13
Is connected to another normal device, the unrecorded data in the buffer memory 11 can be recovered.

FIG. 4 is a flow chart showing the recovery processing of the unrecorded data. In FIG. 4, the unrecorded data recovery process is the drive ready state immediately after power-on,
That is, it is executed in a state in which the data can be written in and read from the recording medium. In this drive ready state,
Similarly to the above, the drive busy is notified to the host system 9 to set the drive busy state (S1), and it is determined whether all the valid address tables of the address table 14 have been cleared (S2). Here, the buffer memory 1
Since the unrecorded data remains in No. 1, the valid address table is detected, and the data of one block size corresponding to the address information of the table is written in the recording medium in S3 to S7. Further, the data block for which recording has been completed in S8 is set as an unused block. The above processing of S3 to S8 is shown in FIG.
Since it is the same as the processing of S10 to S15, detailed description thereof will be omitted. When all the unrecorded data in the buffer memory 11 is recorded in this way, the host system 9 is notified of the drive busy clearing (S9), and the unrecorded data recovery process is terminated.

As described above, in this embodiment, the storage means for temporarily storing data and the backup power supply for protecting this data are detachably attached to the main body of the apparatus, so that the power supply to the power supply is stopped. Sometimes the data in the storage means is protected by a backup power supply, and unrecorded data can be written to the recording medium when the power supply is restarted, and when the device malfunctions, the storage means and backup power supply must be connected to another normal device. Thus, unrecorded data can be written in the recording medium. Therefore, even if the device fails, the data can be easily protected without requiring any special device, which effectively solves the data loss at the time of device failure, which is a problem of the conventional batch write method. can do.

Next, another embodiment of the information recording / reproducing apparatus of the present invention will be described. FIG. 5 is a block diagram showing an information recording / reproducing apparatus of the present embodiment, 31 is an MPU for controlling the apparatus as a whole, and 32 is a voltage detecting section composed of a plurality of voltage detecting circuits. The specific configuration of the voltage detector 32 will be described later in detail. Reference numeral 33 is an interface section for interfacing with a host system which is a host controller, 34 is a signal processing section for subjecting a signal to be recorded / reproduced to predetermined processing, and 35 is for controlling movement of an optical head (pickup). The optical head controller 36 is a motor controller for controlling a spindle motor for rotating an optical disk used as an information recording medium. Reference numeral 40 is a switch for designating the operation mode of the information recording / reproducing apparatus, which is an ID number when connecting to the interface, whether or not to perform a parity check on the interface, or to automatically start the spindle motor when the power is turned on. Whether or not to perform self-diagnosis immediately after turning on the power is specified. 38 in the figure
Is a reset signal output from the voltage detection unit 32, and 39 is a control bus for the MPU 31 to control each unit or to grasp the operating state of each unit.

FIG. 6 is a diagram showing a concrete structure of the voltage detecting section. Reference numerals 41 to 43 are voltage detecting circuits for detecting the power supply voltage, and 44 is a reference voltage generating means for generating a predetermined reference voltage. A circuit, 45 is a comparison circuit for comparing the output voltage of the voltage detection circuit and the reference voltage. Each voltage detection circuit outputs the detection voltage of the power supply voltage at a different ratio, and when the device is operating, one voltage detection circuit is selected at any time according to the operating state. A specific example of each voltage detection circuit is shown in FIG. In the example of FIG. 7, E output from the MPU 31
When the NB signal is low level, the transistors Q ₃ and Q
_{Since 4} is turned on, the output voltage V _out determined by the power supply voltage V _cc and the voltage division ratio of the resistors R ₅ and R ₆ is output. Also, E
When the NB signal is high level, the transistors Q ₃ and Q ₄
Is turned off, the output impedance becomes high impedance. Here, the voltage detection circuits 41 to 43 use the voltage division ratio α (R ₆ / (R ₅ +) of the resistors R ₅ and R ₆ described above.
R ₆ )) has been changed, and the voltage division ratio of the voltage detection circuit 41 is set to α
₁ , the voltage division ratio of the voltage detection circuit 42 is α ₂ , the voltage detection circuit 4
When the voltage division ratio of ₃ is α ₃ , the constants of the resistors R ₅ and R ₆ of each voltage detection circuit are set so that α ₁ > α ₂ > α ₃ . Therefore, the output voltage of the voltage detection circuit is the product of the power supply voltage V _cc and the voltage division ratio α, so that the output voltage of the voltage detection circuit 41 is V ₁ , the output voltage of the voltage detection circuit 42 is V ₂ , and the voltage detection circuit 43 is If the output voltage is V ₃ , V ₁ <V ₂
<A V _3. The output voltages of these voltage detection circuits are output to the comparison circuit 45 as detection voltages of the power supply voltage _Vcc .

FIG. 8 is a block diagram when the information recording / reproducing apparatus of this embodiment is connected to a personal computer. In the figure, reference numeral 50 is a motherboard having a central function of a personal computer main body, 51 is a floppy disk drive device, 52 is a hard disk drive device, 53 is a keyboard, and 54 is a CRT (display device). Also,
55 is a power source, and 56 is the information recording / reproducing apparatus shown in FIG.
The power supply 55 is configured to supply power to each of the personal computer and the information recording / reproducing device 56. 5
Reference numeral 7 denotes an interface for connecting the mother board 50, the floppy disk drive device 51, the hard disk drive device 52, and the information recording / reproducing device 56, respectively.

Next, the operation will be described. First, when the power supply 55 is turned on, the MPU 31 of the information recording / reproducing apparatus 56 reads the operation mode set by the switch 40. When the operation mode at this time is set so that the spindle motor for driving the disk is automatically started when the power is turned on, the MPU 31 operates the motor control unit 36.
Before instructing the spindle motor to start, the voltage detection circuit in the voltage detection unit 32 is selected. That is, when the power supply of the apparatus is turned on, the respective parts in the personal computer are simultaneously started, and when the spindle motor is started, the power supply voltage is lowered due to a sudden increase in power consumption.
May erroneously output a reset signal. Therefore, the MPU 31 selects the voltage detection circuit 43 having the lowest voltage detection level. Specifically, the MPU 31 supplies the low-level ENB signal only to the voltage detection circuit 43, and the other 2
By outputting a high level signal to the voltage detection circuits 41 and 42, only the voltage detection circuit 43 is permitted to detect the power supply voltage.

When the setting of the voltage detection unit 32 is completed in this way, the MPU 31 instructs the motor control unit 36 to activate the spindle motor and the optical disc starts to rotate.
Of course, at this time, the comparison circuit 45 outputs the low level signal and does not output the reset signal because the power supply voltage detection level V _{3 of the} voltage detection circuit 43 is lower than the reference voltage of the reference voltage generation circuit 44. . When the spindle motor is activated, the MPU 31 outputs a low-level ENB signal to the voltage detection circuit 42 so as to select the voltage detection circuit 42 used in the standby state of the device, and the other voltage detection circuits 4
A high level signal is output to 1 and 43. As a result, only the voltage detection circuit 42 is allowed to detect the power supply voltage, and in this state, the personal computer waits for a recording / reproducing instruction. Then, when a command to record or reproduce information is issued from the motherboard 50 of the host computer via the interface, the MPU 31 records or reproduces information at a voltage level suitable for recording or reproduction, and accordingly, the voltage detection circuit corresponding thereto is used. Only the voltage detection operation is permitted to 41, and the voltage detection operations of the other voltage detection circuits 42 and 43 are prohibited. When the recording / reproducing of information is completed, the apparatus enters the standby state, so that the MPU 31 permits the voltage detection circuit 42 in the default state again to perform the voltage detection operation and prohibits the voltage detection operations of the other voltage detection circuits 41 and 43. To do.

As described above, in this embodiment, a plurality of voltage detecting means for outputting the detection voltage of the power supply voltage at different ratios are provided, and the voltage detecting means is selected according to the operating state of the apparatus. It is possible to solve the problem that the power supply voltage changes depending on the operating state of the device, and in some cases, the device is erroneously reset.

[0024]

As described above, according to the present invention, when a device fails, the data in the storage means can be easily protected without requiring a large-scale device, which is a problem of the conventional batch writing method. Data loss at the time of failure can be effectively resolved. Further, a plurality of voltage detection means for outputting the detection voltage of the power supply voltage at different ratios are provided,
By selecting from among these depending on the operating state of the device, for example, when the power is turned on, the power supply voltage is lowered and a reset signal is erroneously output and the device operation is stopped. You can

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an information recording / reproducing apparatus of the present invention.

FIG. 2 is an explanatory diagram showing a data structure of a buffer memory.

FIG. 3 is a flowchart showing a flow of data writing processing of the embodiment of FIG.

FIG. 4 is a flowchart showing the flow of unrecorded data recovery processing of the embodiment of FIG.

FIG. 5 is a block diagram showing another embodiment of the information recording / reproducing apparatus of the present invention.

FIG. 6 is a block diagram showing a specific example of the voltage detection unit of the embodiment of FIG.

FIG. 7 is a circuit showing a specific circuit configuration of the voltage detection circuit of FIG.

8 is a block diagram showing the configuration of a system when the information recording / reproducing apparatus of FIG. 5 is connected to a personal computer.

FIG. 9 is a block diagram showing a general information recording / reproducing apparatus.

10 is a flowchart showing a flow of data writing processing of the apparatus of FIG.

[Explanation of symbols]

 1 CPU block 2 Interface block 3 Data control block 4 Signal processing block 5, 10 Connector 6 Pickup 11 Buffer memory 12 Backup battery 13 Package 14 Address table 31 MPU 32 Voltage detector 35 Optical head controller 36 Motor controller 41 to 43 Voltage detection circuit 44 Reference voltage generation circuit 45 Comparison circuit

Claims (2)

[Claims] 1. A storage means for temporarily storing data sent from a host controller, and when the information is recorded on an information recording medium, the storage means stores a predetermined amount of data. In the information recording / reproducing apparatus for collectively recording information after the above, a backup power supply for protecting the data in the storage means is provided, and the backup power supply and the storage means are mounted on the same substrate, and An information recording / reproducing apparatus characterized in that a substrate is detachably attached to an apparatus main body. 2. A plurality of voltage detecting means for detecting the power supply voltage and outputting the detected voltages at different ratios respectively, and comparing the detected voltage of the detecting means with the reference voltage, the detected voltage is the reference voltage. And a means for outputting a reset signal indicating an abnormality in the power supply voltage when the voltage becomes lower than that, and a means for selecting one from the plurality of voltage detecting means according to the operating state of the device. An information recording / reproducing apparatus characterized by the above.