JPH06120834A - Current addition type d/a converter - Google Patents

Abstract

PURPOSE:To provide a compact current addition type D/A converter which selectively connects plural constant current sources to a load resistance by a switching means in response to the value of each input digital signal and has the reduced influence of the current value fluctuation of the constant current source caused by the output voltage fluctuation to the nonlinear error of the converter. CONSTITUTION:An earth terminal is provided at a position near a transistor TR M15 of the constant current source that is selected last when the digital input signal is changed to the full scale from the zero scale. Then an earth wiring is set so that the prescribed resistance value is secured toward the smaller value from the larger one of (n) of the TR Mn (n=1-15) of the constant current sources. Thus the source potential and the current value of the constant current source TR are reduced and increased respectively as the value of (n) is increased by the resistance of the earth wiring and the current of each cell.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current addition type D / A converter using a plurality of constant current sources, and in particular, conversion caused by fluctuations in the current value of the constant current source due to fluctuations in output voltage. It is characterized by means for reducing an output non-linearity error.

[0002]

2. Description of the Related Art In recent years, with the progress of digital signal processing technology, there is an increasing demand for higher speed and higher accuracy of D / A converters.

A circuit of a conventional current addition type D / A converter will be described below with reference to the drawings. FIG. 2 is a circuit configuration diagram of a conventional current addition type 4-bit D / A converter, which is an example using 15 constant current sources configured by transistors. In FIG. 2, M1 to M15 are transistors forming a constant current source, the gates of which are connected to a common bias terminal VB, and the drains are selectively connected to the output terminal 4 and the power supply terminal 6 by the current switches S1 to S15. Is configured to be connected to. The source is grounded by a thick ground wiring 5 having a low impedance so that the source potentials of the constant current source transistors M1 to M15 are constant. That is, the transistor Mn
And the same 15 basic cells A1 to A by the switch Sn
15 is formed, and the value n (0
15 to 15), the current switches S1 to Sn are connected to the output terminal side, and the current switches Sn + 1 to S15 are connected to the power source side. Hereinafter, connecting the current switch to the output terminal side is referred to as “selected”. Normally, a resistor R for current-voltage conversion is connected to the output terminal 4, and the other end of this R is connected to a power source. Therefore, a current corresponding to the value n of the digital input signal flows through the resistor R, and the output terminal 4 Thus, the D / A converted output voltage VO can be obtained.

[0004]

By the way, in addition to the variation in the current value of the constant current source of each basic cell, factors other than the non-linearity error, which is an important characteristic of the D / A converter, are exacerbated.
The following phenomena are mentioned. In the constant current source composed of MOS transistors, the drain current changes due to the potential fluctuation between the drain and the source even if the bias voltage between the gate and the source is constant. Since the potential of the drain of the constant current source transistor of the selected basic cell decreases as the potential of the output terminal 4 drops, the current value of the constant current source of these basic cells decreases. The current value of the constant current source of the selected basic cell decreases as the number of selected basic cells increases. As a result, the fluctuation of the current value of the current source has an effect of causing a downward convex non-linearity error in the D / A conversion output. Further, the above phenomenon becomes more prominent as the channel length L of the transistor becomes shorter, so that L cannot be made smaller and the miniaturization of the D / A converter is hindered.

An object of the present invention is to solve the above-mentioned conventional problems, and an object thereof is to provide a compact D / A converter having a small non-linearity error.

[0006]

In order to achieve this object, the current addition type D / A converter of the present invention comprises a plurality of constant current sources, each of which has a switching means of a number corresponding to the value of an input digital signal. In the current addition type D / A converter selectively connected to the load resistance by the above, the constant current sources are configured so that the bias values that determine the current value of the constant current sources are different from each other, and the switching means. Is configured to sequentially select from the constant current sources having the smaller bias value as the value of the input digital signal increases. That is, the bias potential is intentionally provided with a gradient so that the source potential decreases as the transistor having a larger value of n due to the parasitic resistance of the ground wiring and the current of each constant current source.

[0007]

With this configuration, the larger the value of n, the larger the bias of the transistor of the constant current source selected. Therefore, the current value of each constant current source increases as the value of n increases. . As a result, the D / A converter has an effect of causing an upward convex non-linearity error.
On the other hand, the conventional problem is that the D / A converter causes a downward convex non-linearity error. Therefore, the two cancel each other out and the non-linearity error is generated. Can be made smaller.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a current addition type 4-bit D /
It is a circuit block diagram of an A converter. In FIG. 1, each circuit configuration is exactly the same as the conventional configuration of FIG. 2 except for the ground wiring, and the parasitic resistances R1 to R15 of the ground wiring are only changed to non-negligible values. R1 to R15 can obtain a desired resistance value by changing the thickness of the ground wiring. In the D / A converter configured as described above, the resistance values of the parasitic resistances R1 to R15 are determined by performing the following operations (1) to (3).

(1) Parasitic resistance Rn (n = 1 to 15) = 0
The nonlinearity error is obtained by SPICE simulation in consideration of the current value variation of the constant current source due to the potential variation of the output terminal 4 as Ω.

(2) Next, ignoring the fluctuation of the current value of the constant current source due to the fluctuation of the potential of the output terminal 4, the parasitic resistance Rn (n = 1 to 1)
Considering only 15), the current value of the constant current source of each basic cell is obtained, and the non-linearity error is obtained from it.

(3) The non-linearity errors of (1) and (2) are added to combine the two. Change the value of parasitic resistance (2)
Repeat steps (3) and (3) until the best non-linearity error is obtained. FIG. 3 shows the non-linearity error obtained by the above operation. In FIG. 3, X is the non-linearity error obtained by the above operation (1), Y is the non-linearity error obtained by the above operation (2), and Z is the non-linearity error obtained by the above operation (3). Is. As shown in FIG. 3, the non-linearity error X due to the potential fluctuation of the output terminal 4 is canceled by the effect of the parasitic resistance. At this time, the parasitic resistance Rn (n = 1 to 1)
The values of 5) are 78 mΩ each. The sheet resistance of aluminum wiring used in the CMOS process is usually several 10 mΩ.
Since it is / □, the above resistance value can be easily realized. As shown in FIG. 1, Rn (n = 1 to 15) is 78.
It can be understood that a D / A converter excellent in non-linearity error characteristics can be realized by wiring the ground wiring so as to have mΩ.

[0012]

As is apparent from the above description, according to the present invention, it is possible to reduce the deterioration of the non-linearity error due to the fluctuation of the current value of the constant current source of each cell due to the output voltage. As a result, it is not necessary to increase the channel length L of the transistor of the constant current source in FIG. 2 to reduce the current value fluctuation due to the output voltage fluctuation. As a result, the constant current source transistor, which occupies most of the area of the D / A converter, can be miniaturized, so that an excellent small D / A with a small non-linearity error can be obtained.
An A converter can be provided.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of an embodiment of a current addition type D / A converter of the present invention.

FIG. 2 is a circuit configuration diagram showing an example of a conventional current addition type D / A converter.

FIG. 3 is a diagram showing a non-linearity error of a current addition type D / A converter.

[Explanation of symbols]

 1 constant current source 2 current switch 3 bias terminal of constant current source 4 output terminal of D / A converter 5 ground terminal 6 power supply terminal

Claims (1)

[Claims] 1. A current-summing D / A converter in which a plurality of constant current sources are selectively connected to a load resistor by a switching means in an amount corresponding to the value of an input digital signal. , The bias values that determine the current value of the constant current source are different from each other, and the switching means changes from the constant current source having the smaller bias value as the value of the input digital signal increases. A current-summing D / A converter characterized by being configured to select sequentially.