JPH06120241A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a manufacturing method of a semiconductor device wherein a single crystal semiconductor layer on a relatively shallow impurity layer is formed by low temperature growth, in order to prevent the autodoping generated when a plurality of impurity layers are buried in different depths at different positions on the substrate plane of single crystal semiconductor, and to uniform the impurity concentration of the single crystal semiconductor layer on a relatively deep impurity layer. CONSTITUTION:An impurity layer 14 is formed on an Si substrate 11, and an impurity layer 18 is formed in a single crystal Si layer 15 formed on the Si substrate 11. By irradiating the single crystal Si layer 15 with a molecular beam obtained by evaporating compound which contains Si as the element, a single crystal Si layer is formed. The single crystal Si layer obtained by the molecular beam crystal growth can be formed at a low temperature, as compared with a single crystal Si layer formed by heat treatment, so that the autodoping due to the outward diffusion from the impurity layer 18 is not generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a plurality of impurity layers are buried in different depths at different positions in a plane of a single crystal semiconductor substrate.

[0002]

2. Description of the Related Art In a high voltage bipolar transistor, the buried collector is deeply located in order to widen the width of the true collector and sufficiently extend the depletion layer in the PN junction between the base and the collector which is reverse biased. Is formed. On the other hand, in the high-speed bipolar transistor, the buried collector is formed at a shallow position in order to reduce the width of the true collector and reduce the collector series resistance.

Therefore, in order to manufacture a semiconductor device having a high breakdown voltage bipolar transistor and a high speed bipolar transistor on the same single crystal semiconductor substrate, a plurality of buried layers are formed at different positions at different planes of the single crystal semiconductor substrate. It is necessary to form a built-in collector. Such a semiconductor device is conventionally manufactured by a method called a double epitaxial growth method.

3 and 4 are longitudinal sectional views showing a conventional manufacturing method by the double epitaxial growth method. In this conventional example, as shown in FIG. 3 (a), after forming the SiO ₂ film 12 on the entire surface of the Si substrate 11 of P-type single crystal, SiO ₂ in a photolithographic method and an etching method
Openings 13 are selectively formed in the film 12.

Next, as shown in FIG. 3B, the SiO ₂ film 12 is used as a mask to remove the high-concentration N-type impurity layer 14 from S.
It is formed on the i-substrate 11. Then, as shown in FIG.
After removing the SiO ₂ film 12, S is formed by epitaxial growth.
A single crystal Si layer 15 is formed on the i substrate 11. afterwards,
The SiO ₂ film 16 is formed again on the entire surface of the single crystal Si layer 15, and the SiO ₂ film 16 is formed by photolithography and etching.
_{2 The} openings 17 are selectively formed in the film 16.

Next, as shown in FIG. 4A, a high concentration N-type impurity layer 18 is formed in the single crystal Si layer 15 by using the SiO ₂ film 16 as a mask. Then, as shown in FIG. 4B, after removing the SiO ₂ film 16, a single crystal Si layer 19 is formed again on the single crystal Si layer 15 by epitaxial growth, and the Si substrate 11 and the single crystal Si layer 15 are formed. A single crystal Si substrate 20 composed of 19 and 19 is formed.

Although not shown in the subsequent steps, a high breakdown voltage bipolar transistor is formed on the impurity layer 14 of the Si substrate 20 and a high speed bipolar transistor is formed on the impurity layer 18 by a conventionally known method. Form.

[0008]

However, in the above conventional example, a high growth temperature is required for epitaxial growth. The normal growth temperature is 800 to 1200 ° C. for Si.
Is. Furthermore, the single crystal Si layer 1 is formed on the single crystal Si layer 15.
9 is formed, the high-concentration impurity layer 18 is exposed on the surface of the single-crystal Si layer 15, and the single-crystal Si layer 19 is formed at high temperature on the single-crystal Si layer 15 in that state. The auto-doping due to the outward diffusion from the impurity layer 18 occurs. Therefore, a high-concentration N-type impurity layer (not shown) is also formed at the interface between the single crystal Si layer 15 and the single crystal Si layer 19 on the impurity layer 14, and the impurity layer 14 is formed.
The impurity concentration of the upper single crystal Si layers 15 and 19 becomes nonuniform.

Therefore, the extension of the depletion layer from the PN junction between the base and the true collector in the high breakdown voltage bipolar transistor is suppressed by the high-concentration impurity layer formed by autodoping. As a result, especially when the breakdown voltage is determined by the reach through, the depletion layer is prevented from extending at the interface between the single crystal Si layer 15 and the single crystal Si layer 19, so that it is difficult to obtain a desired breakdown voltage. there were.

Therefore, the present invention prevents autodoping which occurs when a plurality of impurity layers are buried in different depths at different positions in a plane of a single crystal semiconductor substrate and prevents the single crystal semiconductor layer on a relatively deep impurity layer. An object of the present invention is to provide a method for manufacturing a semiconductor device in which a single crystal semiconductor layer on a relatively shallow impurity layer is formed by low-temperature growth so as to make the impurity concentration of the semiconductor device uniform.

[0011]

According to the method of manufacturing a semiconductor device of the present invention, the first surface is selectively formed on the surface of the single crystal semiconductor substrate.
The first step of forming the impurity layer, the second step of forming the first single crystal semiconductor layer on the single crystal semiconductor substrate, and the first step among the surface of the first single crystal semiconductor layer. The third step of selectively forming the second impurity layer at a position different from the impurity layer in a plane, and the second single crystal semiconductor by performing low temperature growth by molecular beam irradiation on the first single crystal semiconductor layer. And a fourth step of forming a layer.

[0012]

In the method of manufacturing the semiconductor device according to the present invention, the single crystal semiconductor substrate and the first semiconductor layer are made of the same element on the first single crystal semiconductor layer on which the relatively shallow second impurity layer is formed. The second single crystal semiconductor layer is formed by irradiating the molecular beam obtained by evaporating the compound, and the second single crystal semiconductor layer can be formed at a lower temperature than in the case where the single crystal semiconductor layer is formed by heat treatment. Therefore, a region other than the second impurity layer in the first single crystal semiconductor layer that covers the relatively deep first impurity layer is diffused outward from the second impurity layer. Autodoping does not occur.

[0013]

Embodiments of the present invention applied to the manufacture of a semiconductor device having a high breakdown voltage bipolar transistor and a high speed bipolar transistor will be described below. 1 and 2
FIG. 3 is a vertical cross-sectional view showing one embodiment of the method for manufacturing a semiconductor device of the present invention. The components corresponding to those of the conventional example shown in FIGS. 3 and 4 are designated by the same reference numerals.

In this embodiment, first, as shown in FIG. 1A, SiO ₂ is formed on the entire surface of a single crystal P-type Si substrate 11.
The film 12 is grown, and the opening 13 corresponding to the pattern of the buried collector of the high breakdown voltage bipolar transistor is selectively formed in the SiO ₂ film 12 by the photolithography method and the etching method.

Next, as shown in FIG. 1B, a high-concentration N-type impurity is ion-implanted into the Si substrate 11 through the opening 13 with a high concentration using the SiO ₂ film 12 as a mask. The impurity layer 14 is formed on the Si substrate 11. Then, heat treatment is performed in an oxygen atmosphere to embed the impurity layer 14. Thereafter, as shown in FIG. 1C, the SiO ₂ film 12 is removed, and then a single crystal Si layer 15 is formed on the Si substrate 11 by epitaxial growth.

Next, as shown in FIG. 1D, single crystal Si
Grown SiO ₂ film 16 again on the entire surface of the layer 15, in a photolithography method and an etching method to selectively form an opening 17 corresponding to the pattern of the buried collector of high-speed bipolar transistor in the SiO ₂ film 16.

Next, as shown in FIG. 2 (a), the SiO ₂ film 16 is used as a mask to form an N in the single crystal Si layer 15 from the opening 17.
A high-concentration N-type impurity layer 18 is formed in the single-crystal Si layer 15 by ion-implanting a high-concentration impurity. And
The impurity layer 18 is embedded by heat treatment in an oxygen atmosphere.

Next, as shown in FIG. 2B, after the SiO ₂ film 16 is removed, the substrate temperature is heated to about 450 ° C. by, for example, the MBE method, and evaporated by an electron beam in an ultrahigh vacuum. Is irradiated onto the single crystal Si layer 15 as a molecular beam, and the single crystal Si layer 21 is formed by performing epitaxy under the growth condition of a growth rate of about 5Å / sec. 21 and a single crystal Si substrate 2
Form 2.

As an application of the MBE method, for example, the substrate temperature is first heated to about 100 ° C. and the growth rate is 20Å /
An amorphous Si film is formed on the single crystal Si layer 15 under a growth condition of about sec, and then solid phase epitaxy is performed by heat treatment such as low temperature annealing at about 500 ° C. or laser irradiation to perform the above-mentioned amorphous Si layer. Recrystallize. As a result, the amorphous Si layer becomes the single crystal Si layer 21.

Although not shown in the subsequent steps, a high breakdown voltage bipolar transistor is formed on the impurity layer 14 of the Si substrate 22 and a high speed bipolar transistor is formed on the impurity layer 18 by a conventionally known method. Form.

As described above, in this embodiment, since the single crystal Si layer 21 is formed on the single crystal Si layer 15 by the MBE method,
The single crystal 21 can be formed at a lower temperature than the single crystal Si layer 19 in the above-mentioned conventional example. Therefore, when forming the single crystal Si layer 21, the high concentration impurity 18 can be prevented from diffusing into the epitaxial layer. Therefore, the single crystal Si layer 15 on the impurity layer 14 and the single crystal Si layer
A high-concentration N-type impurity layer is not formed at the interface with the layer 21, and the breakdown voltage of the high breakdown voltage bipolar transistor is not lowered by suppressing the expansion of the depletion layer due to this impurity layer.

Although the present invention is applied to the manufacture of the semiconductor device having the high breakdown voltage bipolar transistor and the high speed bipolar transistor in the above embodiment, for example, the semiconductor having the I ² L transistor and the normal bipolar transistor is used. The present invention can also be applied to the manufacture of devices.

[0023]

According to the method of manufacturing a semiconductor device of the present invention, in the method of burying the first and second impurity layers in different depths at different positions in the plane of the single crystal semiconductor substrate, the relatively shallow second method is used. Since the formation of the second single crystal semiconductor layer over the impurity layer can be performed at a temperature lower than that of a conventional method, the second single crystal semiconductor layer of the first single crystal semiconductor layer which covers the relatively deep first impurity layer can be formed. In regions other than the relatively shallow second impurity layer, it is possible to prevent occurrence of autodoping due to outward diffusion from the second impurity layer. Therefore, the impurity concentration of the first and second single crystal semiconductor layers over the first impurity layer can be kept uniform.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing an embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a vertical cross-sectional view showing an embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 3 is a vertical sectional view showing an example of a conventional method for manufacturing a semiconductor device.

FIG. 4 is a vertical sectional view showing an example of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 11 Si Substrate 14 Impurity Layer 15 Single Crystal Si Layer 18 Impurity Layer 21 Single Crystal Si Layer 22 Si Substrate

Claims (3)

[Claims] 1. A first selective surface on a single crystal semiconductor substrate.
A first step of forming an impurity layer, a second step of forming a first single crystal semiconductor layer on the single crystal semiconductor substrate, and a second step of forming a first single crystal semiconductor layer on the surface of the first single crystal semiconductor layer. A third step of selectively forming a second impurity layer at a position different from the first impurity layer in a plane, and a low temperature growth by molecular beam irradiation on the first single crystal semiconductor layer to perform a second step. And a fourth step of forming a single crystal semiconductor layer. 2. The irradiated molecular beam is obtained by evaporating a compound composed of the same element as the element forming the single crystal semiconductor substrate and the first single crystal semiconductor layer. Item 2. A method of manufacturing a semiconductor device according to item 1. 3. The fourth step of forming the second single crystal semiconductor layer, the fifth step of forming an amorphous semiconductor layer by irradiating a molecular beam, and the amorphous semiconductor layer Sixth step of crystallizing by heat treatment to form a second single crystal semiconductor layer
3. The method for manufacturing a semiconductor device according to claim 1, further comprising: