JPH06119075A - Power factor adjusting device - Google Patents

Abstract

PURPOSE:To uniform-control the charging time and the number of charging of each phase advance capacity by storing the number of charging and the charging time when a switch is charged by measuring them, calculating a unit charging time by dividing the charging time by the number of charging and outputting an opening/closing command by selecting the switch of a long unit charging time. CONSTITUTION:A number of charging storing circuit 9 counts the number of charging when the switch 13 is charged so as to store it and a charging time storing circuit 11 measures the charging time from the charging of the switch 13 to the tripping of it so as to store it. A unit charging time arithmetic circuit 7 calculates the unit charging time by dividing the charging time by the number of charging, selects the switch of the long unit charging time and output the opening/closing command by way of a charging tripping selection circuit 6. A switch charging tripping signal output circuit 5 outputs a signal for charging/ tripping the switch 13 of phase advance capacitors C1 to Cn in accordance with the length of the delay/gain of a power factor detected by a power factor detection circuit 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power factor control device using a phase advancing capacitor in a power distribution system.

[0002]

2. Description of the Related Art A conventional power factor adjusting device includes a current transformer, an instrument transformer, a power factor detecting circuit, a switch closing and tripping signal output circuit,
It consists of a cyclic closing and tripping circuit, and the power factor detection circuit detects the system power factor from the output from the instrument transformer and current transformer, and its output is the switch closing and tripping signal output circuit. Is input to and outputs a closing and tripping signal to the cyclic closing and tripping circuit depending on the amount of delay and lead.

In the cyclic closing trip circuit, in the case of a lag power factor, the phase advancing capacitors are sequentially applied to the system, and when the leading power factor is reached, the system is started in order from the first advancing phase capacitor. It is controlled to pull it off from. Then, when the system has a delayed power factor due to the cyclic closing and tripping circuit, the phase advancing capacitors are sequentially closed.
Depending on the magnitude of the power factor delay, multiple phase advancing capacitors may be connected to the system. Next, when the power factor of the system is advancing, the phase advancing capacitors are separated from the system in the same order in order to equalize the number of turns on / off.

[0004]

As described above, the prior art has a problem that the number of times of making and tripping can be equalized, but the time of making the feeding can not be equalized.

When the power factor fluctuations of the system are not constant in time, or when the phase-advancing capacitor, switch, etc. have failed and are replaced with new ones, the supply time becomes uneven. If the charging time and the number of times of charging are uneven, the lifespan of the phase advancing capacitor and the switch may also become uneven, which makes it difficult to make a facility renewal plan.

The present invention has been made in consideration of the above points, and an object of the present invention is to provide a power factor adjusting device capable of equalizing and controlling the closing time and the number of times of each leading capacitor in the leading capacitor group. To do.

[0007]

The present invention is directed to a current transformer for measuring an alternating current flowing in a power receiving circuit, a transformer for measuring an alternating voltage of the power receiving circuit, and a secondary circuit of the transformer for a measuring instrument. And a power factor detection circuit connected to the secondary circuit of the current transformer to detect the power factor of the received power flowing to the power receiving circuit, a plurality of switches for opening and closing the connection to the power receiving circuit, and connected to these switches And a phase-advancing capacitor that improves the power factor of the received power, and a switch closing trip signal output circuit that outputs a switching signal that switches the switch on or off according to the power factor detected by the power factor detection circuit. A closing trip selection circuit that selects which of the switches is to be closed or opened by a signal, a closing number storage circuit that counts and stores the number of times the switch has been closed, and this closing number storage The number of inputs stored in the circuit The closing frequency reset circuit, the closing time storage circuit that measures and stores the closing time from closing to tripping the switch, and the closing time reset that sets the closing time stored in this closing time memory circuit to zero A circuit and a unit closing time calculation circuit that calculates the unit closing time by dividing the closing time by the number of times of closing, selects a switch with a large unit closing time, and outputs a switching command via the closing trip selection circuit. This is a power factor adjusting device.

[0008]

In the power factor adjusting device of the present invention, the current transformer measures the AC current flowing in the power receiving circuit, the AC voltage of the power receiving circuit is measured using the voltage transformer, and the The power factor detection circuit is connected to the secondary circuit and the secondary circuit of the current transformer to detect the power factor of the received power flowing in the power receiving circuit, open / close the connection to the power receiving circuit, and connect the phase advancing capacitor to the switch. To improve the power factor of the received power, output a switching signal that turns on or off the switch according to the power factor detected by the power factor detection circuit, and turns on or off which switch among the switches according to the switching signal. Select whether to trip, count and store the number of times the switch has been closed, store and measure the closing time from closing the switch to tripping, and divide the closing time by the closing count Calculate the closing time and select the switch with the long unit closing time. , And outputs a switching command via the turned trip selection circuit.

[0009]

EXAMPLE An example of the present invention will be described below. In FIG. 1, 3 is a current transformer for measuring an alternating current flowing through the power receiving circuit 1, 2 is a transformer for measuring instrument for measuring an alternating voltage of the power receiving circuit 1, 4 is a secondary circuit of the transformer for instrument 2 and current transformation. 2 of vessel 3
A power factor detection circuit connected to the next circuit to detect the power factor of the received power flowing to the power receiving circuit 1, 13 is a plurality of switches for opening and closing the connection to the power receiving circuit 1, and C _{1 to} C _n are switches 13. A phase-advancing capacitor 5 connected to improve the power factor of the received power outputs a switch-on trip signal output that outputs an open-close signal to open or close the switch 13 according to the power factor detected by the power-factor detection circuit 4. A circuit, 6 is a closing / triggering selection circuit for selecting which one of the switches 13 is to be closed or opened according to a switching signal, and 9 is a closing count for counting and storing the number of times the switch 13 has been closed. A storage circuit, 8 is a closing frequency reset circuit that sets the closing frequency stored in the closing frequency storage circuit 9 to zero, and 11 is a closing time storage circuit that measures and stores the closing time from closing to opening of the switch 13. 10
Is a closing time reset circuit for setting the closing time stored in the closing time storage circuit 11 to zero, 7 is a unit closing time calculated by dividing the closing time by the number of times of closing, and a switch having a large unit closing time is selected. , A unit closing time calculation circuit that outputs an opening / closing command through a closing trip selection circuit, a current transformer 3 that measures an alternating current flowing in the power receiving circuit 1 and a transformer for an instrument that measures an alternating voltage of the power receiving circuit 1. 2 is connected to the power factor detection circuit 4 for detecting the power factor of the received power, and the opening / closing of the phase advance capacitors C _{1 to} C _n depending on the magnitude of the delay / advance of the power factor detected by the power factor detection circuit 4. The switch closing and tripping signal output circuit 5 that outputs a signal for closing and opening the switch 13 and the signal from the switch closing and tripping signal output circuit 5 selects which phase advancing capacitor to turn on or off. Input And removing selection circuit 6 can, poured count storage circuit for storing the introduced number of phase advancing capacitor C ₁ -C _n 9
And a closing frequency reset circuit 8 for resetting the contents of the closing frequency storage circuit 9, a closing time storage circuit 11 for storing the closing times of the phase advancing capacitors C1 to C, and a closing time for resetting the contents of the closing time storage circuit 11. Reset circuit 10
And a unit closing time calculation circuit 7 that calculates a unit closing time by the output of the closing number storage circuit 9 and the output of the closing time storage circuit 11.

FIG. 2 shows the selection logic of the closing trip selecting circuit 6 of the present invention, in which the unit closing time 14 output from the unit closing time calculation circuit 7 is compared with the unit closing time comparison logic 1
When the unit charging time is 5 and the unit charging time is short 15a, the number of charging opportunities is reduced, but the tripping opportunity is controlled to be long to increase the charging time, and when the unit charging time is 15b, the charging opportunity is increased. However, it has a function of performing control so as to increase the number of trips in order to shorten the charging time, and preferentially charging the one having the smaller number of chargings when the unit charging time is the same 15c.

During normal operation, since the unit charging time is about the same, the control is performed by giving priority to the one having the smaller number of chargings.

The problem is that when the phase advancing capacitor or switch is replaced, the closing time reset circuit 10 is used to make the closing time storage circuit 1.
Reset the input time of 1. Then, the unit closing time is shortened, and thus the replaced phase-advancing capacitor is operated under the control that the opportunity of closing is shortened but the opportunity of tripping is shortened to lengthen the closing time.

When the switch is replaced, the closing circuit of the closing number storage circuit 9 is reset by the closing number reset circuit 8. Then, since the unit closing time becomes long, the phase advancing capacitor connected to the exchanged switch is operated under the control of increasing the opening opportunity and shortening the closing time to increase the tripping opportunity.

[0014]

According to the present invention, even if a part of the phase advancing capacitor or the switch is replaced, the power factor adjusting device can automatically equalize the charging time and the charging frequency while continuing the operation. Can be provided.

[Brief description of drawings]

FIG. 1 is a structural diagram of a power factor adjusting device showing an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a selection logic of a closing and trip selecting circuit of FIG.

[Explanation of symbols]

 4 Power factor detection circuit 5 Switch closing trip signal output circuit 6 Closing trip selection circuit 7 Unit closing time calculation circuit 8 Closing number reset circuit 9 Closing number storage circuit 10 Closing time reset circuit 11 Closing time memory circuit 12 Phase advance capacitor 13 switch

Claims (1)

[Claims] 1. An alternating current device for measuring an alternating current flowing in a power receiving circuit, a transformer for measuring an alternating current voltage of the power receiving circuit, a secondary circuit of the transformer for measuring instrument and a secondary of the current transformer. A power factor detection circuit that is connected to a circuit to detect the power factor of the received power that flows in the power receiving circuit, a plurality of switches that open and close the connection to the power receiving circuit, and the received power that is connected to these switches. A phase advancing capacitor that improves the power factor of the switch, a switch closing trip signal output circuit that outputs a switch signal that closes or opens the switch according to the power factor detected by the power factor detection circuit, and the switch signal. A closing / triggering selection circuit for selecting which one of the switches is to be closed or opened, a closing frequency storage circuit for counting and storing the closing times of the switch, and the closing times. Stored in the memory circuit The closing frequency reset circuit that sets the closing frequency to zero, the closing time storage circuit that measures and stores the closing time from closing to tripping of the switch, and the closing time stored in the closing time storage circuit. A closing time reset circuit for setting the time to zero, a unit closing time is calculated by dividing the closing time by the closing times, a switch having a large unit closing time is selected, and the closing trip selection circuit is used. A power factor adjusting device comprising: a unit closing time calculation circuit that outputs an opening / closing command.