JPH06118152A - Integrated magnetic detector for self-compensating offset voltage - Google Patents

Abstract

PURPOSE:To compensate offset voltage accurately and at the same time achieve high integration by integrating square Hall elements of the same structure/area on a semiconductor substrate along with capacitors and switches and then taking out only a part which depends on magnetic field utilizing the similarity in the characteristic change. CONSTITUTION:An N-type Hall element 401 and an N-type Hall element 402 for compensation are laid out closely on a P-type silicon substrate so that current axes form 90 degrees and then both Hall elements are driven by a current source 415 for driving. NMOS transistors 405-510 are used for electronic switches and are controlled by pulse signals from control elements 411-413. When a control signal for discharging is set to L level and that for charging is set to H level, an electric charge corresponding to the output voltage of the Hall elements 401-402 is accumulated in a pair of capacitors 403-404. When the control signal for addition is set to H level in this state, the voltages of the capacitors 403-404 are added to obtain an output voltage 414 (VB), thus compensating an offset voltage to 1/10 or less as compared with before.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-precision and high-sensitivity magnetic detection device having a Hall element whose offset voltage is self-compensated.

[0002]

2. Description of the Related Art The output signal of a Hall element depends on a magnetic field signal depending on the applied magnetic field and on a magnetic field due to stress or the like generated by an irregular shape of the element, an irregular crystal state, or an external mechanical or thermal action. There are two types of signals that do not. A signal that does not depend on the magnetic field is called an offset voltage, and its generation mechanism has been considered up to now using the equivalent bridge circuit model of the Hall element shown in FIG.
And as a method of compensating for this offset voltage, 2
There is a method of adding the output signals of the Hall elements by rotating the position of the electrodes 90 degrees so that the positions of the individual Hall elements are rotated 90 degrees so that the directions of the offset voltages due to the piezoresistive effect inside the Hall elements are opposite to each other. A differential amplifier that amplifies and adds each output signal is used as the adding circuit. (For example, Takekazu Shindo Masatoshi Takataka “Distortion Voltage Compensation Type Si
Prototype of Hall IC "

FIG. 1 is a diagram showing an equivalent bridge circuit model of a Hall element in a conventional technique.

[Explanation of symbols]

 101 Hall element 102 Driving voltage 103 Equivalent bridge circuit 104 Output terminal 1 105 Output terminal 2 106 Offset voltage

[0003]

In the offset voltage compensation circuit as described above, three amplifier circuits are required for a pair of Hall elements, which complicates the circuit and makes it possible to integrate Hall elements in a unit area. Limited in number.
Further, if the characteristics of the integrated transistor change due to distortion, the offset voltage may not be compensated accurately. It is an object of the present invention to provide an offset voltage compensating method which can eliminate the above-mentioned problems and can be highly integrated.

[0004]

The method of compensating for the offset voltage of the Hall element according to the present invention has a characteristic peculiar to the integrated circuit that adjacent elements in the integrated circuit have extremely similar characteristic changes due to internal and external factors. It is used positively, and the method shown in FIG. 2 can be considered. Two square Hall elements having the same structure and area are prepared, and they are formed on the same semiconductor substrate by arranging the angle formed by the drive current axis direction at 90 degrees. Next, the output signal of each hall element is connected to the capacitor through the electronic switch, and is charged by the output voltage of each hall element according to the signal controlling the electronic switch. The two capacitors connected to the pair of Hall elements are
One terminal of each is also connected through the electronic switch, and when this electronic switch is in the conducting state, the voltage between the other terminals is taken out as the output voltage. Then, this voltage becomes equal to the sum of the output signals of the pair of Hall elements. In addition, each capacitor has an electronic switch connected to both ends of it so that it will not discharge the remaining charge so that it will not affect the next measurement. To In this way, by accumulating the output in the temporary capacitance, the output signal can be separated from the potential of the Hall element, and the processing of the output signal becomes easy.

FIG. 2 is a circuit diagram for explaining a compensation method of the present invention.

[Explanation of symbols]

 201 Hall element 202 Compensation Hall element 203 Capacitance 1 204 Capacitance 2 205 Electronic switch (for charging) 206 Electronic switch (for charging) 207 Electronic switch (for charging) 208 Electronic switch (for charging) 209 Electronic switch (for addition) 210 Electronic switch (for discharging) 211 Electronic switch (for discharging) 212 Output voltage 213 Hall element driving current source

[0005]

When the means according to the present invention is used, a basic cell which can accurately take out only the voltage component dependent on the magnetic field by a simple circuit composed of two Hall elements and two capacitors and seven electronic switches is provided. If a plurality of such cells are arranged and integrated as shown in FIG. 3, it is possible to accurately measure the one-dimensional or two-dimensional magnetic field distribution.

FIG. 3 is an example of an integrated circuit for magnetic field distribution measurement according to the present invention.

[Explanation of symbols]

 301 Transistor Control Terminal (For Charging) 302 Transistor Control Terminal (For Addition) 303 Transistor Control Terminal (For Discharge) 304 Output Terminal 1 305 Output Terminal 2

[0006]

EXAMPLE An example of the present invention is shown below in FIG. The N-type Hall element 401 and the compensating N-type Hall element 402 are arranged close to each other on the P-type silicon substrate so that the angle formed by the respective current axes is 90 degrees, and the Hall element driving current source 40 is provided.
Both Hall elements are driven by 3. Capacitors 404 and 405 are formed by forming an oxide film on silicon in which impurities are implanted and forming an aluminum electrode on the oxide film. NM as an electronic switch
Control terminals 41 using OS transistors 406 to 410
1 to 413 are controlled by pulse signals 501 to 503 in FIG. 5, respectively. The discharge control signal 501 is for keeping the electric charge stored in the capacitor always empty except at the time of measurement, and when this signal becomes L level and the charge control signal 502 becomes H level, a pair of capacitors is stored. Charges are stored according to the output voltage of each of the pair of Hall elements. Further, even if this control signal becomes L level, those voltages are held by the capacitors (504 505).
In this state, when the addition control signal 503 becomes H level,
The voltages of a pair of capacitors are added to give an output voltage (5
06). Further, here, as the pair of capacitors is larger than the load capacitance of the NMOS transistor, the added voltage of the pair of Hall elements appears more accurately at the output terminal 414, but the integration degree and the number of times that can be measured per unit time are reduced. In the magnetic detection device thus formed, the offset voltage due to the distortion contained in the output voltage can be reduced to 1/10 or less of the conventional one, and the integrated magnetic detection device with high sensitivity and high stability and high accuracy can be obtained. I was able to get Further, the area for integration could be reduced to one-fifth or less of that of the conventional case even if the area of Hall elements, MOS transistors, capacitors, etc. is included.

FIG. 4 is a circuit diagram in which an NMOS transistor is used as an electronic switch in the embodiment.

[Explanation of symbols]

 401 N-type Hall element 402 402 Compensating N-type Hall element 403 Capacitance 1 404 Capacitance 2 405 NMOS transistor (for charging) 406 NMOS transistor (for charging) 407 NMOS transistor (for charging) 408 NMOS transistor (for charging) 409 NMOS transistor ( 410 NMOS transistor (for discharging) 411 NMOS transistor (for discharging) 412 Transistor control terminal (for charging) 413 Transistor control terminal (for addition) 414 Transistor control terminal (for discharging) 415 Output terminal 416 Hall element Current source for driving

5 is a control signal diagram for controlling the circuit of FIG. 4 and a diagram showing a state of a capacitance and an output voltage.

[Explanation of symbols]

 501 Transistor control signal (for discharging) 502 Transistor control signal (for charging) 503 Transistor control signal (for addition) 504 Voltage across capacitor 1 505 Voltage across capacitor 2 506 Output voltage

[0007]

As described above, according to the present invention, it is possible to realize a high density integration of the Hall element and the compensating circuit which constantly performs the self-compensating operation with respect to the change with time of the offset voltage. In this embodiment, the electronic switch is an NMO.
Although the S transistor is used, a PMOS transistor can be used, and if a CMOS is used, the signal for operating the electronic switch can be easily simplified. Finally, the Hall element to be compensated can be applied not only to the P type but also to the N type, and the semiconductor substrate for disposing the Hall element and its offset voltage compensation circuit can be applied not only to silicon but also to gallium arsenide and the like. Needless to say, a switch other than a MOS transistor can be used.

[Brief description of drawings]

FIG. 1 Equivalent bridge circuit model diagram of Hall element

FIG. 2 is a diagram of an offset voltage compensation circuit of the present invention.

FIG. 3 is a circuit diagram of a magnetic detection device using the present invention as a basic cell.

FIG. 4 is a circuit diagram used in the embodiment.

5 is a signal diagram for operating the circuit of FIG. 4 and waveforms of various parts in the embodiment.

[Explanation of symbols]

 101 Hall Element 102 Drive Voltage 103 Equivalent Bridge Circuit 104 Output Terminal 1 105 Output Terminal 2 106 Offset Voltage 201 Hall Element 202 Compensating Hall Element 203 Capacitance 1 204 Capacity 2 205 Electronic Switch (Charging) 206 Electronic Switch (Charging) 207 Electronic switch (for charging) 208 Electronic switch (for charging) 209 Electronic switch (for adding) 210 Electronic switch (for discharging) 211 Electronic switch (for discharging) 212 Output voltage 213 Hall element driving current source 301 Transistor control terminal ( 302) Transistor control terminal (for addition) 303 Transistor control terminal (for discharge) 304 Output terminal 1 305 Output terminal 2 401 N-type hall element 402 Compensation N-type hall element 403 Capacitance 1 404 Capacitance 2 405 N OS transistor (for charging) 406 NMOS transistor (for charging) 407 NMOS transistor (for charging) 408 NMOS transistor (for charging) 409 NMOS transistor (for adding) 410 NMOS transistor (for adding) 411 NMOS transistor (for discharging) 412 transistor Control terminal (for charging) 413 Transistor control terminal (for addition) 414 Transistor control terminal (for discharge) 415 Output terminal 416 Hall element driving current source 501 Transistor control signal (for discharge) 502 Transistor control signal ( (For charging) 503 Transistor control signal (for addition) 504 Voltage across capacitor 1 505 Voltage across capacitor 2 506 Output voltage

Claims (1)

[Claims] The electrodes are geometrically different by 90 degrees, and a pair or a plurality of pairs of Hall elements of the same shape arranged close to each other are formed on the semiconductor substrate, and a charge proportional to the output voltage of the pair of Hall elements is generated. An electronic component having a function of accumulating in a pair of capacitances through an electronic switch and a function of connecting the capacitances in series by an electronic switch to add a pair of output voltages of the Hall element together with the Hall element on a single substrate Integrated magnetic sensing device characterized by being integrated on top