JPH06112467A - Solid-state image sensing element and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent data charge from the image sensing region to the storage region of a frame transfer type solid-state image sensing element from deteriorating in transfer efficiency. CONSTITUTION:An impurity region 12 low in impurity concentration in an image sensing region and high in impurity concentration in a storage region is formed in a silicon substrate 11. A buried region 13 is formed on the surface of the impurity region 12 for the formation of a buried channel structure. A thin gate insulating film 14 is formed on an image sensing region, and a thick gate insulating film 15 is formed on a storage region. Transfer electrodes 16 and 17 each of two-layered structure are formed on the gate insulating films 14 and 15 respectively. Therefore, the potential of the buried region 13 is set higher in a storage region than that in an image sensing region, so that data charge is prevented from deteriorating in transfer efficiency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device having a vertical overflow drain structure in which excess charges are absorbed on the substrate side.

[0002]

2. Description of the Related Art FIG. 7 shows a frame transfer type CC.
It is a top view which shows the outline of a D solid-state image sensor. The solid-state imaging device includes an imaging area I for receiving an image from a subject, a storage area S for accumulating information charges, a horizontal transfer section H for horizontally transferring and outputting information charges, and an output for converting a charge amount into a voltage value and outputting the voltage value. The information charges generated in the image pickup area I in accordance with the illuminated subject image are transferred from the image pickup area I to the storage area S in a unit of one screen and temporarily stored therein. Is output to the output unit O via the horizontal transfer unit H. For example, four-phase transfer clocks φ _{I1 to} φ _I4 are supplied to the imaging region I, and information charges are transferred to the storage region S during the blanking period of vertical scanning. Then, in the storage area S, transfer clocks φ _{I1 to} φ _I4
The transfer clocks φ _{S1 to} φ _S4 synchronized with the above are supplied, and the information charges transferred from the imaging region I are transferred to the horizontal transfer unit H one row at a time for each horizontal scanning blanking period, and to the horizontal transfer unit H. Is supplied with the two-phase transfer clocks φ _H1 and φ _H2 , and the information charges transferred from the storage section S are transferred and output to the output section O during the horizontal scanning period. Therefore, the output unit O can obtain a video signal in which the video information for each row is continuous in time series.

In such a solid-state image pickup device, an overflow drain for absorbing an excessive charge is provided in order to suppress so-called blooming in which information charges overflowing from each light receiving pixel of the image pickup section I are mixed into adjacent pixels. .
There are two types of overflow drains: a horizontal type in which a drain is provided in a separation region for separating light receiving pixels to absorb excess charges, and a vertical type in which the substrate itself acts as a drain to sunk excess charges into a deep portion of the substrate. In recent years, there has been a tendency to employ a vertical type, which is advantageous for increasing the density of light receiving pixels.

FIG. 8 is a cross sectional view of a vertical overflow drain type CCD solid state image pickup device, showing a connecting portion between an image pickup region I and a storage region S. N type silicon substrate 1
A P-type impurity region 2 is provided on the surface side of, and an N-type buried region 3 is provided on the surface of the impurity region 2 to form a buried channel structure. A plurality of transfer electrodes 5 having a two-layer structure are arranged in parallel on the buried region 3 with a gate insulating film 4 interposed therebetween.
The transfer clocks φ _{I1 to} φ _I4 and φ _{S1 to} φ _S4 are applied to each. Therefore, inside the silicon substrate 1, as shown in FIG. 9, a potential is formed that has a minimum in the buried region 3 and a maximum in the impurity region 2. The potential in the buried region 3 is controlled by the voltage applied to the transfer electrodes 5, and accumulates information charges in response to transfer clocks φ _{I1 to} φ _I4 and φ _{S1 to} φ _S4 applied to each transfer electrode 5. Transfer. The potential in the impurity region 2 forms a barrier that blocks the information charges in the buried region 3 from flowing to the silicon substrate 1 side, and the difference between the height of the barrier and the depth of the potential in the buried region 3 is a difference. It indicates the storage capacity of information charges. The height of the barrier can be set by the impurity concentration of the impurity region 2 and the potential of the silicon substrate 1, and is usually the imaging region I.
To make it easier for the information charges to pass, and to make it higher in the storage region S to make it harder for the information charges to pass. That is,
In the image pickup region I, since information charges may be excessively generated depending on the light receiving state of each light receiving pixel, it is necessary to absorb the excess amount to the silicon substrate 1 side, whereas in the storage region S, the information transferred from the image pickup region is collected. It is necessary to prevent the information charges from leaking to the substrate side in order to surely accumulate the charges, and by making the impurity concentration of the impurity region 2 in the accumulation region S higher than that of the imaging region I, as shown by a broken line in FIG. In addition, the barrier between the buried region 3 and the silicon substrate 1 is set high.

[0005]

When the impurity concentration of the impurity region 2 in the storage region S is increased to raise the potential barrier, the potential in the buried region 3 becomes shallower.
There arises a problem that the transfer efficiency of the information charges from the imaging region I to the storage region S deteriorates. Therefore, in order to prevent the deterioration of the transfer efficiency, the peak values of the transfer clocks φ _{S1 to} φ _S4 applied to the transfer electrodes 5 in the storage area S are applied to the transfer electrodes 5 in the imaging area I. Transfer clocks φ _{I1 to} φ _I4 Is set to be higher than the peak value of ## EQU1 ## to compensate for the shallow potential of the buried region 3 in the storage region S due to the influence of the impurity concentration. However, in order to obtain two types of transfer clocks having different peak values, corresponding power supplies are required, which complicates the drive circuit of the solid-state image sensor, resulting in a device equipped with the solid-state image sensor. Inviting high costs.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a solid-state image pickup device capable of simplifying a drive circuit without deterioration of transfer efficiency.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an imaging area for receiving an image of a subject and generating information charges corresponding to an image pattern, and an imaging area In a solid-state imaging device in which a storage region for receiving and accumulating the information charges at a constant cycle is formed on the same substrate, a semiconductor substrate of one conductivity type and a semiconductor substrate provided on one main surface of the semiconductor substrate are provided. An impurity region of opposite conductivity type having an impurity concentration higher than that of the imaging region, and an insulating film covering the impurity region and provided on one main surface of the semiconductor substrate and having a thickness greater than that of the imaging region in the accumulation region. And a plurality of transfer electrodes arranged on the insulating film along the transfer direction of the information charges.

Then, in the manufacturing method of the present invention, an impurity of opposite conductivity type is introduced into a first region on one main surface of a semiconductor substrate of one conductivity type to form a first impurity region, and the first impurity region is formed on the one main surface. A step of introducing an impurity of opposite conductivity type into the second region to form a second impurity region having a higher impurity concentration than that of the first impurity region; and a main surface of the semiconductor substrate covering the first and second impurity regions A step of forming an insulating film on the insulating film, thinning the insulating film in a portion other than the second impurity region, and laminating a conductor material on the insulating film partially thinned, Forming the transfer material on the first and second impurity regions by molding the conductor material layer into a desired shape, and
It is characterized in that the impurity region corresponds to the storage region.

[0009]

According to the present invention, the gate insulating film in the storage region is made thicker than the imaging region, so that the potential is formed deeper near the surface of the semiconductor substrate. Therefore, the increase in the impurity concentration and the decrease in the potential are offset by the increase in the thickness of the gate insulating film, and an almost equal potential is formed in the imaging region and the accumulation region near the surface of the semiconductor substrate. The transfer electrodes of the area and the storage area can be driven by the transfer clock of the same level.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view of a CCD solid-state image pickup device of the present invention, showing a connecting portion between an image pickup region and a storage region. A P-type impurity region 12 is formed on the surface side of the N-type silicon substrate 11.
And an N type buried region 13 is further provided on the surface of the impurity region 12. These impurity regions 1
2 and the buried region 13 are the same as those in FIG. 8, and the impurity region 12 is formed to have a high concentration in the accumulation region.

The feature of the present invention resides in that the gate insulating film 14 in the image pickup region is different from the gate insulating film 15 in the storage region.
Is formed thick, and 2 is formed on these gate insulating films 14 and 15.
The transfer electrodes 16 and 17 having a layered structure are arranged respectively. That is, in the buried channel structure, the potential formed in the buried region 13 becomes deeper as the distance between the transfer electrode for applying an electric field to the silicon substrate and the buried region 13 increases, so that the film thickness of the gate insulating film 15 in the storage region. To make the embedded region 13 and the transfer electrode 17 thicker.
And the potential of the buried region 13 is deepened. As a result, as shown in FIG. 2, the potential of the accumulation region is deeper in the buried region 13 as compared with the potential of the imaging region in which the film thickness of the gate insulating film 14 is thin and the impurity concentration of the impurity region 12 is thin. Therefore, the potential barrier of the impurity region 12 is formed to be high. Therefore, even when the transfer electrodes 16 and 17 of the imaging region and the storage region are driven by a clock having the same peak value, the potential of the embedded region 13 does not become shallow in the storage region with respect to the imaging region, and the imaging is performed. The information charges can be efficiently transferred from the area to the storage area, and the information charges transferred from the imaging area can be reliably stored in the storage area.

3 to 6 are cross-sectional views of respective steps for explaining the manufacturing method of the present invention. First, as shown in FIG.
A uniform impurity region 12a is formed by implanting P-type impurities such as boron ions into the entire surface of the silicon substrate 11 having N-type conductivity.
Is formed, and a portion which will be an imaging region later is covered with a resist film 20 and P-type impurities are implanted again to partially implant the impurity region 1.
2b is formed. As a result, the impurity region 12 is formed in which the impurity concentration is high in the storage region with respect to the imaging region. Next, an N-type impurity such as phosphorus is implanted into the surface of the impurity region 12 to form a buried region 13, and the buried region 13 is covered to form a thick oxide film. Subsequently, as shown in FIG. 4, the oxide film is etched and thinned in the imaging region to form a gate oxide film 14. In the storage region, the thick oxide film becomes the gate insulating film 15 as it is. Then, as shown in FIG. 5, a polycrystalline silicon layer is laminated on each of the gate insulating films 14 and 15, and the polycrystalline silicon layer is etched into a desired pattern to transfer the first transfer electrode 16,
Form 17. These first-layer transfer electrodes 14 and 15
After the surface of the is oxidized to form an insulating film, as shown in FIG. 6, a polycrystalline silicon layer is laminated in the same manner as the first layer, and this is etched into a desired pattern to form the transfer electrode of the second layer. Form. As a result, a CCD solid-state imaging device in which the film thickness of the gate insulating film 15 is thicker in the storage region than in the imaging region can be obtained.

The gate insulating films 14 and 15 having different thicknesses are provided.
For the formation of (1), it is conceivable to form a thin oxide film first to form the gate insulating film in the imaging region, and then to partially grow the oxide film to form the gate insulating film 15 in the storage region.

[0014]

According to the present invention, since the gate insulating film is formed thicker in the storage region, the potential of the buried region becomes deeper, so that the information charges can be efficiently transferred from the imaging region to the storage region. Done. Moreover, since the peak values of the transfer clocks supplied to the transfer electrodes in the imaging area and the storage area can be set to be equal, it is possible to simplify the drive circuit that supplies the transfer clocks to the transfer electrodes, and the circuit of the device equipped with the solid-state imaging device Cost can be reduced by reducing the scale.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a main part of a solid-state image sensor according to the present invention.

FIG. 2 is a diagram showing a state of a potential in a depth direction of the solid-state imaging device of the present invention.

FIG. 3 is a cross-sectional view showing a first step of the method for manufacturing a solid-state imaging device of the present invention.

FIG. 4 is a cross-sectional view showing a second step of the method for manufacturing a solid-state imaging device of the present invention.

FIG. 5 is a cross-sectional view showing a third step of the method for manufacturing a solid-state imaging device of the present invention.

FIG. 6 is a cross-sectional view showing a fourth step of the method for manufacturing a solid-state imaging device of the present invention.

FIG. 7 is a schematic view of a frame transfer type CCD solid-state imaging device.

FIG. 8 is a cross-sectional view showing a boundary portion between an imaging area and a storage area of a conventional solid-state imaging device.

FIG. 9 is a diagram showing a state of a potential in a depth direction of a conventional solid-state image sensor.

[Explanation of symbols]

 1, 11 Silicon substrate 2, 12 Impurity region 3, 13 Embedded region 4, 14, 15 Gate insulating film 5, 16, 17 Transfer electrode I Imaging region S Storage region H Horizontal transfer unit O Output unit

Claims (4)

[Claims] 1. An imaging area for receiving an image of a subject and generating information charges corresponding to an image pattern, and an accumulation area for receiving and accumulating the information charges at regular intervals from the imaging area are arranged on the same substrate. In the solid-state image sensor consisting of
A semiconductor substrate of one conductivity type, an impurity region of an opposite conductivity type which is provided on one main surface of the semiconductor substrate and has an impurity concentration higher than that of the imaging region in the storage region, and the impurity region is covered to cover the semiconductor substrate. An insulating film, which is provided on one main surface and has a thickness larger than that of the imaging region in the storage region, and a plurality of transfer electrodes arranged on the insulating film along the transfer direction of the information charges. A solid-state imaging device characterized by the above. 2. The solid-state imaging device according to claim 1, wherein a buried region having the same conductivity type as that of the semiconductor substrate is provided on a surface of the opposite conductivity type impurity region. 3. An image pickup area for receiving an image of a subject and generating information charges corresponding to an image pattern, and an accumulation area for receiving and accumulating the information charges at regular intervals from the image pickup area are arranged on the same substrate. In the method of manufacturing a solid-state imaging device having the above-mentioned structure, an impurity of opposite conductivity type is introduced into a first region on one main surface of a semiconductor substrate of one conductivity type to form a first impurity region, and a first impurity region on the one main surface is formed. Forming a second impurity region having an impurity concentration higher than that of the first impurity region by introducing an impurity of opposite conductivity type into the second region; and covering the first and second impurity regions on one main surface of the semiconductor substrate. An insulating film is formed on the insulating film, and the insulating film is thinned in a portion except on the second impurity region; and a conductive material is laminated on the partially thinned insulating film. The conductor material layer is formed into a desired shape, and the first and And a step of forming a plurality of transfer electrodes on the second impurity region, wherein the second impurity region corresponds to the storage region. 4. The method further comprises the step of implanting an impurity of the same conductivity type as that of the semiconductor substrate into the first and second impurity regions to form a buried region of one conductivity type on the surface of the semiconductor substrate. The method for manufacturing a solid-state image sensor according to claim 3.